公开(公告)号：US08241924B2

公开(公告)日：2012-08-14

申请号：US12394201

申请日：2009-02-27

Applicant: Nai-Han Cheng ,  Chyi Shyuan Chern

Inventor： Nai-Han Cheng ,  Chyi Shyuan Chern

IPC: H01L21/66 ,  G01R31/26

CPC classification number: H01L21/26513 ,  H01L22/12 ,  H01L22/20 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for implant uniformity is provided that includes determining a variation of critical dimensions (CD) of a semiconductor wafer, moving the semiconductor wafer in a two-dimensional mode during an implantation process, and controlling a velocity of the movement of the semiconductor wafer so that an implant dose to the semiconductor wafer is varied based on the variation of CD.

Abstract translation: 提供了一种用于植入均匀性的方法，其包括确定半导体晶片的临界尺寸（CD）的变化，在注入过程期间以二维模式移动半导体晶片，以及控制半导体晶片的移动速度 基于CD的变化改变对半导体晶片的植入剂量的变化。

公开(公告)号：US20100221849A1

公开(公告)日：2010-09-02

申请号：US12394201

申请日：2009-02-27

Applicant: Nai-Han Cheng ,  Chyi Shyuan Chern

Inventor： Nai-Han Cheng ,  Chyi Shyuan Chern

IPC: H01L21/66 ,  B05C11/00

CPC classification number: H01L21/26513 ,  H01L22/12 ,  H01L22/20 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for implant uniformity is provided that includes determining a variation of critical dimensions (CD) of a semiconductor wafer, moving the semiconductor wafer in a two-dimensional mode during an implantation process, and controlling a velocity of the movement of the semiconductor wafer so that an implant dose to the semiconductor wafer is varied based on the variation of CD.

Abstract translation: 提供了一种用于植入均匀性的方法，其包括确定半导体晶片的临界尺寸（CD）的变化，在注入过程期间以二维模式移动半导体晶片，以及控制半导体晶片的移动速度 基于CD的变化改变对半导体晶片的植入剂量的变化。

公开(公告)号：US09024341B2

公开(公告)日：2015-05-05

申请号：US12912900

申请日：2010-10-27

Applicant: Hsiao-Wen Lee ,  Shang-Yu Tsai ,  Tien-Ming Lin ,  Chyi Shyuan Chern ,  Hsin-Hsien Wu ,  Fu-Wen Liu ,  Huai-En Lai ,  Yu-Sheng Tang

Inventor： Hsiao-Wen Lee ,  Shang-Yu Tsai ,  Tien-Ming Lin ,  Chyi Shyuan Chern ,  Hsin-Hsien Wu ,  Fu-Wen Liu ,  Huai-En Lai ,  Yu-Sheng Tang

IPC: H01L33/00 ,  H01L33/54 ,  H01L33/44 ,  H01L33/50 ,  H01L33/56

CPC classification number: H01L33/54 ,  H01L33/44 ,  H01L33/504 ,  H01L33/507 ,  H01L33/56 ,  H01L2224/48091 ,  H01L2924/0002 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2933/005 ,  H01L2924/00 ,  H01L2924/00014

Abstract: Two or more molded ellipsoid lenses are formed on a packaged LED die by injecting a glue material into a mold over the LED die and curing the glue material. After curing, the refractive index of the lens in contact with the LED die is greater than the refractive index of the lens not directly contacting the LED die. At least one phosphor material is incorporated into the glue material for at least one of the lenses not directly contacting the LED die. The lens directly contacting the LED die may also include one or more phosphor material. A high refractive index coating may be applied between the LED die and the lens.

Abstract translation: 在封装的LED模具上形成两个或多个模制的椭圆体透镜，该胶片通过将胶料注入到LED模具中的模具中并固化胶料。 固化后，与LED芯片接触的透镜的折射率大于不直接接触LED芯片的透镜的折射率。 对于不直接接触LED管芯的透镜中的至少一个，将至少一种磷光体材料结合到胶合材料中。 直接接触LED芯片的透镜还可以包括一种或多种荧光体材料。 可以在LED管芯和透镜之间施加高折射率涂层。

公开(公告)号：US08906712B2

公开(公告)日：2014-12-09

申请号：US13112046

申请日：2011-05-20

Applicant: Hsin-Hsien Wu ,  Chyi Shyuan Chern ,  Chun-Lin Chang ,  Ching-Wen Hsiao ,  Kuang-Huan Hsu

Inventor： Hsin-Hsien Wu ,  Chyi Shyuan Chern ,  Chun-Lin Chang ,  Ching-Wen Hsiao ,  Kuang-Huan Hsu

IPC: H01L21/00 ,  H01L21/265 ,  H01L33/22 ,  H01L33/32

CPC classification number: H01L33/22 ,  H01L21/2654 ,  H01L21/26546 ,  H01L21/26593 ,  H01L33/0025 ,  H01L33/06 ,  H01L33/32

Abstract: A method includes providing an LED element including a substrate and a gallium nitride (GaN) layer disposed on the substrate. The GaN layer is treated. The treatment includes performing an ion implantation process on the GaN layer. The ion implantation process may provide a roughened surface region of the GaN layer. In an embodiment, the ion implantation process is performed at a temperature of less than approximately 25 degrees Celsius. In a further embodiment, the substrate is at a temperature less than approximately zero degrees Celsius during the ion implantation process.

Abstract translation: 一种方法包括提供包括衬底和设置在衬底上的氮化镓（GaN）层）的LED元件。 处理GaN层。 该处理包括在GaN层上执行离子注入工艺。 离子注入工艺可以提供GaN层的粗糙化表面区域。 在一个实施例中，离子注入过程在小于约25摄氏度的温度下进行。 在另一个实施例中，在离子注入过程期间，衬底处于低于约零摄氏度的温度。

公开(公告)号：US08466063B2

公开(公告)日：2013-06-18

申请号：US13302520

申请日：2011-11-22

Applicant: Simon Su-Horng Lin ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

Inventor： Simon Su-Horng Lin ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

IPC: H01L21/44

CPC classification number: H01L29/78 ,  C23C14/022 ,  C23C14/046 ,  C23C14/18 ,  C23C14/221 ,  C23C16/0263 ,  C23C16/045 ,  C23C16/06 ,  C23C16/48 ,  C23C16/484 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76865 ,  H01L21/76877 ,  H01L29/4966 ,  H01L29/66545

Abstract: A method of depositing a metal film on a substrate with patterned features includes placing a substrate with patterned features into a photo-induced chemical vapor deposition (PI-CVD) process chamber. The method also includes depositing a metal film by PI-CVD to fill the patterned features from bottom up.

Abstract translation: 在具有图案特征的基板上沉积金属膜的方法包括将具有图案化特征的基板放置在光致化学气相沉积（PI-CVD）处理室中。 该方法还包括通过PI-CVD沉积金属膜以从下向上填充图案化特征。

公开(公告)号：US20130089937A1

公开(公告)日：2013-04-11

申请号：US13267025

申请日：2011-10-06

Applicant: Chyi Shyuan Chern ,  Hsin-Hsien Wu ,  Chih-Kuang Yu ,  Hung-Yi Kuo

Inventor： Chyi Shyuan Chern ,  Hsin-Hsien Wu ,  Chih-Kuang Yu ,  Hung-Yi Kuo

IPC: H01L33/08

CPC classification number: H01L33/62 ,  H01L23/49513 ,  H01L25/0753 ,  H01L33/0095 ,  H01L33/08 ,  H01L2924/0002 ,  H01L2933/0033 ,  H01L2933/0066 ,  H01L2924/00

Abstract: A method of light-emitting diode (LED) packaging includes coupling a number of LED dies to corresponding bonding pads on a sub-mount. A mold apparatus having concave recesses housing LED dies is placed over the sub-mount. The sub-mount, the LED dies, and the mold apparatus are heated in a thermal reflow process to bond the LED dies to the bonding pads. Each recess substantially restricts shifting of the LED die with respect to the bonding pad during the heating.

Abstract translation: 一种发光二极管（LED）封装的方法包括将多个LED管芯耦合到子安装座上的对应焊盘。 具有容纳LED管芯的凹入凹槽的模具装置放置在子安装座上。 子载体，LED管芯和模具装置在热回流过程中被加热以将LED管芯接合到接合焊盘。 每个凹槽在加热期间基本上限制相对于接合焊盘的LED管芯的移位。

公开(公告)号：US08415684B2

公开(公告)日：2013-04-09

申请号：US12944895

申请日：2010-11-12

Applicant: Hsing-Kuo Hsia ,  Chih-Kuang Yu ,  Gordon Kuo ,  Chyi Shyuan Chern

Inventor： Hsing-Kuo Hsia ,  Chih-Kuang Yu ,  Gordon Kuo ,  Chyi Shyuan Chern

IPC: H01L27/15 ,  H01L31/12 ,  H01L33/00

CPC classification number: H01L33/64 ,  H01L25/075 ,  H01L33/54 ,  H01L33/58 ,  H01L33/641 ,  H01L33/642 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014

Abstract: An apparatus includes a wafer with a number of openings therein. For each opening, an LED device is coupled to a conductive carrier and the wafer in a manner so that each of the coupled LED device and a portion of the conductive carrier at least partially fill the opening. A method of fabricating an LED device includes forming a number of openings in a wafer. The method also includes coupling light-emitting diode (LED) devices to conductive carriers. The LED devices with conductive carriers at least partially fill each of the openings.

公开(公告)号：US08580653B2

公开(公告)日：2013-11-12

申请号：US13775907

申请日：2013-02-25

Applicant: Tze-Liang Lee ,  Pei-Ren Jeng ,  Chu-Yun Fu ,  Chyi Shyuan Chern ,  Jui-Hei Huang ,  Chih-Tang Peng ,  Hao-Ming Lien

Inventor： Tze-Liang Lee ,  Pei-Ren Jeng ,  Chu-Yun Fu ,  Chyi Shyuan Chern ,  Jui-Hei Huang ,  Chih-Tang Peng ,  Hao-Ming Lien

IPC: H01L21/76

CPC classification number: H01L21/76224 ,  H01L21/76232

Abstract: A method of fabricating an isolation structure including forming a trench in a top surface of a substrate and partially filling the trench with a first oxide, wherein the first oxide is a pure oxide. Partially filling the trench includes forming a liner layer in the trench and forming the first oxide over the liner layer using silane and oxygen precursors at a pressure less than 10 milliTorr (mTorr) and a temperature ranging from about 500° C. to about 1000° C. The method further includes producing a solid reaction product in a top portion of the first oxide. The method further includes sublimating the solid reaction product by heating the substrate in a chamber at a temperature from 100° C. to 200° C. and removing the sublimated solid reaction product by flowing a carrier gas over the substrate. The method further includes filling the trench with a second oxide.

Abstract translation: 一种制造隔离结构的方法，包括在衬底的顶表面中形成沟槽并用第一氧化物部分地填充沟槽，其中第一氧化物是纯氧化物。 部分地填充沟槽包括在沟槽中形成衬层，并且在低于10毫托（mTorr）的压力和约500℃至约1000℃的温度下使用硅烷和氧前体在衬层上形成第一氧化物 该方法还包括在第一氧化物的顶部产生固体反应产物。 该方法还包括通过在室内在100℃至200℃的温度下加热基底来升华固体反应产物，并通过使载气流过基底而除去升华的固体反应产物。 该方法还包括用第二氧化物填充沟槽。

公开(公告)号：US20100167506A1

公开(公告)日：2010-07-01

申请号：US12347483

申请日：2008-12-31

Applicant: Simon Su-Horng LIN ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

Inventor： Simon Su-Horng LIN ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

IPC: H01L21/30

CPC classification number: H01L21/3115 ,  H01J37/321 ,  H01J37/32706 ,  H01L21/2236 ,  H01L29/66795

Abstract: In some embodiments, a method of doping a semiconductor wafer disposed on a pedestal electrode in an inductive plasma chamber includes generating a plasma having a first voltage with respect to ground in the inductive plasma chamber, and applying a radio frequency (RF) voltage with respect to ground to the pedestal electrode in the inductive plasma chamber. The positive RF voltage is based on the first voltage of the plasma.

Abstract translation: 在一些实施例中，掺杂设置在感应等离子体室中的基座电极上的半导体晶片的方法包括在感应等离子体室中产生相对于接地的第一电压的等离子体，并且施加射频（RF）电压 接地到电感等离子体室中的基座电极。 正RF电压基于等离子体的第一电压。

公开(公告)号：US08609446B2

公开(公告)日：2013-12-17

申请号：US13267025

申请日：2011-10-06

Applicant: Chyi Shyuan Chern ,  Hsin-Hsien Wu ,  Chih-Kuang Yu ,  Hung-Yi Kuo

Inventor： Chyi Shyuan Chern ,  Hsin-Hsien Wu ,  Chih-Kuang Yu ,  Hung-Yi Kuo

IPC: H01L21/00

CPC classification number: H01L33/62 ,  H01L23/49513 ,  H01L25/0753 ,  H01L33/0095 ,  H01L33/08 ,  H01L2924/0002 ,  H01L2933/0033 ,  H01L2933/0066 ,  H01L2924/00

Abstract: A method of light-emitting diode (LED) packaging includes coupling a number of LED dies to corresponding bonding pads on a sub-mount. A mold apparatus having concave recesses housing LED dies is placed over the sub-mount. The sub-mount, the LED dies, and the mold apparatus are heated in a thermal reflow process to bond the LED dies to the bonding pads. Each recess substantially restricts shifting of the LED die with respect to the bonding pad during the heating.

Abstract translation: 一种发光二极管（LED）封装的方法包括将多个LED管芯耦合到子安装座上的对应焊盘。 具有容纳LED管芯的凹入凹槽的模具装置放置在子安装座上。 子载体，LED管芯和模具装置在热回流过程中被加热以将LED管芯接合到接合焊盘。 每个凹槽在加热期间基本上限制相对于接合焊盘的LED管芯的移位。