公开(公告)号：US20130264696A1

公开(公告)日：2013-10-10

申请号：US13906771

申请日：2013-05-31

Applicant: Renesas Eastern Japan Semiconductor, Inc. ,  Renesas Electronics Corporation

Inventor： Ryoichi KAJIWARA ,  Masahiro KOIZUMI ,  Toshiaki MORITA ,  Kazuya TAKAHASHI ,  Munehisa KISHIMOTO ,  Shigeru ISHII ,  Toshinori HIRASHIMA ,  Yasushi TAKAHASHI ,  Toshiyuki HATA ,  Hiroshi SATO ,  Keiichi OOKAWA

IPC: H01L23/495

CPC classification number: H01L23/49555 ,  H01L21/4814 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/495 ,  H01L23/4952 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49582 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/81 ,  H01L24/83 ,  H01L24/84 ,  H01L24/97 ,  H01L29/7833 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/16245 ,  H01L2224/29011 ,  H01L2224/29015 ,  H01L2224/29101 ,  H01L2224/29109 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/37011 ,  H01L2224/40095 ,  H01L2224/40225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/73253 ,  H01L2224/75251 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83138 ,  H01L2224/83191 ,  H01L2224/83825 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/84801 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/0133 ,  H01L2924/0134 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/3011 ,  H05K3/3426 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/01049 ,  H01L2924/01083 ,  H01L2224/29139 ,  H01L2924/3512 ,  H01L2224/48 ,  H01L2924/00012

Abstract: A semiconductor device featuring a semiconductor chip including a MOSFET and having a first main surface and a second, opposing main surface, a source electrode pad and a gate electrode pad over the first main surface, a drain electrode over the second main surface, a source external terminal and a gate external terminal, each having a first main surface electrically connected to the source electrode pad and gate electrode pad of the chip, respectively, and a drain external terminal having a first main surface and a second, opposing main surface and being electrically connected to the second main surface of the chip, each of the source, gate and drain external terminals having second main surfaces thereof in a same plane, and, in a plan view of the external terminals, the gate external terminal has a portion located between the source and drain external terminals in at least one direction.

Abstract translation: 一种半导体器件，其特征在于包括MOSFET的半导体芯片，具有第一主表面和第二主表面，第一主表面上的源极电极焊盘和栅电极焊盘，第二主表面上的漏电极，源极 外部端子和栅极外部端子，每个具有分别电连接到芯片的源电极焊盘和栅电极焊盘的第一主表面和具有第一主表面和第二相对主表面的漏极外部端子，并且是 电连接到芯片的第二主表面，源极，栅极和漏极外部端子中的每一个具有第二主表面在同一平面中，并且在外部端子的平面图中，栅极外部端子具有位于 在至少一个方向上在源极和漏极外部端子之间。

公开(公告)号：US20190311974A1

公开(公告)日：2019-10-10

申请号：US16291872

申请日：2019-03-04

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shoji HASHIZUME ,  Yasushi TAKAHASHI

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/48 ,  H01L23/31

Abstract: A chip mounting portion included in a semiconductor device has a region including a semiconductor chip in plan view. When an average surface roughness of the region is “Ra”, 0.8 μm≤Ra≤3.0 μm holds.

公开(公告)号：US20180096961A1

公开(公告)日：2018-04-05

申请号：US15710619

申请日：2017-09-20

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shoji HASHIZUME ,  Yasushi TAKAHASHI

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/31

CPC classification number: H01L24/49 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49555 ,  H01L23/49562 ,  H01L23/49582 ,  H01L24/06 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/29101 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2224/83862 ,  H01L2224/85205 ,  H01L2224/85385 ,  H01L2224/85439 ,  H01L2224/85455 ,  H01L2224/92247 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/35121 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00

Abstract: To improve a performance of a semiconductor device, a semiconductor device includes a lead electrically coupled to a semiconductor chip via a wire. An inner portion of the lead, the semiconductor chip, and the wire are sealed by a sealing body (a resin sealing body). The wire is bonded to an upper surface of a wire bonding portion of the inner portion of the lead. A metal film is formed on a lower surface of the inner portion of the lead, which is on an opposite side to the upper surface. No metal film is formed on the upper surface of the wire bonding portion.

公开(公告)号：US20130228907A1

公开(公告)日：2013-09-05

申请号：US13768509

申请日：2013-02-15

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Takuya NAKAJO ,  Masaki TAMURA ,  Yasushi TAKAHASHI ,  Keiichi OKAWA ,  Ryoichi KAJIWARA ,  Sigehisa MOTOWAKI ,  Hiroshi HOZOUJI

IPC: H01L21/56 ,  H01L23/28

CPC classification number: H01L21/56 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49548 ,  H01L23/49562 ,  H01L23/49582 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L2224/05624 ,  H01L2224/0603 ,  H01L2224/29111 ,  H01L2224/29116 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/32245 ,  H01L2224/37124 ,  H01L2224/37139 ,  H01L2224/37147 ,  H01L2224/40249 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48472 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48824 ,  H01L2224/4903 ,  H01L2224/49171 ,  H01L2224/49505 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/83439 ,  H01L2224/8392 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/8492 ,  H01L2224/8592 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01082

Abstract: Conventional surface roughening plating technology cannot always improve the adhesion between a leadframe and a plating film and it depends on the material used for surface roughening plating. Conventional surface roughening technology by etching can only be used for leadframes made of limited materials. Improved adhesion cannot therefore be achieved between a metal member such as leadframe and a sealing resin.A manufacturing method of a semiconductor device according to one embodiment is to carry out resin sealing using a metal member such as leadframe which has been subjected to alloying treatment of a base material and Zn plated on the surface thereof.

Abstract translation: 常规的表面粗糙化电镀技术不能总是提高引线框和镀膜之间的粘合性，并且取决于用于表面粗糙化电镀的材料。 通过蚀刻的常规表面粗糙化技术只能用于由有限材料制成的引线框架。 因此，在诸如引线框架的金属构件和密封树脂之间不能实现改进的附着。 根据一个实施例的半导体器件的制造方法是使用已经经过基材的合金化处理的锌引线框架和其表面上镀Zn的金属构件进行树脂密封。