公开(公告)号：US08129824B1

公开(公告)日：2012-03-06

申请号：US12327716

申请日：2008-12-03

申请人： Roger D. St. Amand ,  Nozad O. Karim ,  Joseph M. Longo ,  Lee J. Smith ,  Robert F. Darveaux ,  Jong Ok Chun ,  Jingkun Mao

发明人： Roger D. St. Amand ,  Nozad O. Karim ,  Joseph M. Longo ,  Lee J. Smith ,  Robert F. Darveaux ,  Jong Ok Chun ,  Jingkun Mao

IPC分类号： H01L27/10

CPC分类号： H01L25/0657 ,  H01L23/552 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06558 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/207 ,  H01L2224/05599

摘要： A semiconductor device has a substrate. A first die is electrically attached to a first surface of the substrate. A shield spacer having a first and second surface is provided wherein the second surface of the shield spacer is attached to a first surface of the first die. A plurality of wirebonds are attached to the shield spacer and to the substrate. A mold compound is provided for encapsulating the first die, the shield spacer, and the wirebonds.

摘要翻译： 半导体器件具有基板。 第一裸片电连接至基片的第一表面。 提供具有第一和第二表面的屏蔽间隔件，其中屏蔽间隔件的第二表面附接到第一管芯的第一表面。 多个引线附接到屏蔽间隔件和基板。 提供了一种模制化合物，用于封装第一模具，屏蔽间隔件和引线键合。

公开(公告)号：US09721872B1

公开(公告)日：2017-08-01

申请号：US13398646

申请日：2012-02-16

申请人： Louis W. Nicholls ,  Roger D. St. Amand ,  Jin Seong Kim ,  Woon Kab Jung ,  Sung Jin Yang ,  Robert F. Darveaux

发明人： Louis W. Nicholls ,  Roger D. St. Amand ,  Jin Seong Kim ,  Woon Kab Jung ,  Sung Jin Yang ,  Robert F. Darveaux

IPC分类号： H01L23/498 ,  H01L21/56 ,  H01L23/48

CPC分类号： H01L23/48 ,  H01L21/4846 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49805 ,  H01L23/49811 ,  H01L23/5389 ,  H01L2224/13025 ,  H01L2224/16227 ,  H01L2224/26175 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/19107

摘要： A package includes a substrate having an electronic component flip chip mounted thereto by flip chip bumps. The electronic component includes an active surface and an inactive surface. Electrically conductive columns (TSV) extend through the electronic component between the active surface and the inactive surface. A RDL structure is coupled to the inactive surface, the RDL structure redistributing the pattern of the electrically conductive columns at the inactive surface to a pattern of inactive surface RDL lands. The inactive surface RDL lands are exposed through via apertures of a package body. By using the inactive surface of the electronic component to distribute the inactive surface RDL lands, the allowable size of the electronic component is maximized.

公开(公告)号：US08072083B1

公开(公告)日：2011-12-06

申请号：US12657425

申请日：2010-01-20

申请人： Roger D. St. Amand ,  ChangSuk Han ,  YounSang Kim ,  KyungRok Park ,  Vladimir Perelman

发明人： Roger D. St. Amand ,  ChangSuk Han ,  YounSang Kim ,  KyungRok Park ,  Vladimir Perelman

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L23/49582 ,  B81B2201/0264 ,  B81B2207/07 ,  B81C1/0023 ,  B81C2201/019 ,  G01L19/0084 ,  G01L19/141 ,  H01L23/49548 ,  H01L23/49816 ,  H01L23/49861 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L25/0657 ,  H01L27/14618 ,  H01L2224/27013 ,  H01L2224/274 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29298 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/4899 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83139 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06575 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A film-on-wire spacer covers an entire upper surface of a lower electronic component. Accordingly, an upper electronic component is supported above bond pads and lower bond wires of the lower electronic component. This decreases the stress on the upper electronic component, e.g., during wirebonding, and thus decreases the chance of cracking the upper electronic component. Further, the lower bond wires are enclosed in and protected by the film-on-wire spacer. Further, the film-on-wire spacer is thin resulting in a minimum height of the stacked electronic component package.

摘要翻译： 电影在线隔离物覆盖下电子元件的整个上表面。 因此，上部电子部件被支撑在下部电子部件的接合焊盘和下部接合线之上。 这降低了上电子部件上的应力，例如在引线键合期间，因此减少了上部电子部件破裂的可能性。 此外，下部接合线被包围在膜间隔离器上并由其保护。 此外，薄膜在线间隔物是薄的，导致堆叠的电子部件封装的最小高度。

公开(公告)号：US07768135B1

公开(公告)日：2010-08-03

申请号：US12105196

申请日：2008-04-17

申请人： Roger D. St. Amand ,  Vladimir Perelman

发明人： Roger D. St. Amand ,  Vladimir Perelman

IPC分类号： H01L23/48

CPC分类号： H01L24/48 ,  H01L24/32 ,  H01L24/45 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L25/0657 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/83136 ,  H01L2224/838 ,  H01L2224/8592 ,  H01L2225/0651 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015 ,  H01L2224/4554 ,  H01L2224/85399 ,  H01L2224/05599

摘要： In accordance with the present invention, there is provided multiple embodiments of a semiconductor package including at least two electronic components which are provided in a stacked arrangement, and are each electrically connected to an underlying substrate through the use of conductive wires. In accordance with one embodiment of the present invention, the electronic components are separated from each other by an intervening spacer which is typically fabricated from aluminum, or from silicon coated with aluminum. In this particular embodiment, the uppermost electronic component of the stack is electrically connected to at least one of the conductive wires through the use of a conductive paste layer which is also used to secure the uppermost electronic component to the underlying spacer. In this regard, one end of one of the conductive wires may be embedded in the conductive paste layer adjacent one side of the uppermost electronic component, or between the bottom surface of such electronic component and the spacer.

摘要翻译： 根据本发明，提供了包括至少两个电子部件的半导体封装的多个实施例，该两个电子部件以堆叠的方式设置，并且通过使用导电线电连接到下面的基板。 根据本发明的一个实施例，电子部件通过中间间隔物彼此分离，所述间隔物通常由铝制成，或者由涂覆有铝的硅制成。 在该特定实施例中，堆叠的最上面的电子部件通过使用导电浆料层与至少一个导电线电连接，该导电膏层也用于将最上面的电子部件固定到下面的间隔件上。 在这方面，一根导线的一端可以嵌入在与最上面的电子元件的一侧相邻的导电糊层中，或者在该电子元件的底表面和间隔物之间​​。

公开(公告)号：US07459776B1

公开(公告)日：2008-12-02

申请号：US11529467

申请日：2006-09-27

申请人： Roger D. St. Amand ,  Vladimir Perelman

发明人： Roger D. St. Amand ,  Vladimir Perelman

IPC分类号： H01L23/48 ,  H01L23/34 ,  H01L23/28 ,  H01L23/31 ,  H01L25/065

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L25/0652 ,  H01L2224/05554 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599

摘要： A stack of semiconductor dies is disclosed. A first stack level includes a first semiconductor die and at least one first support that are attached to a substrate surface. A second level includes a second semiconductor die and at least one second support that are attached to the active surface of the first semiconductor die and to a coplanar surface of the first support(s). A third level includes a third semiconductor die attached to the active surface of the second semiconductor die and to a coplanar surface of the second support(s). The second and third semiconductor dies do not overlap bond pads of the first and second semiconductor dies, respectively. An adhesive film overlies the entire inactive surface of the second and third semiconductor dies, and attaches the second and third semiconductor dies to the immediately underlying active surface and support(s).

摘要翻译： 公开了一叠半导体管芯。 第一堆叠级包括第一半导体管芯和附接到衬底表面的至少一个第一支撑件。 第二级包括第二半导体管芯和至少一个第二支撑件，其附接到第一半导体管芯的有源表面和第一支撑件的共面表面。 第三级包括附接到第二半导体管芯的有源表面和第二支撑件的共面的第三半导体管芯。 第二和第三半导体管芯不分别与第一和第二半导体管芯的接合焊盘重叠。 粘合膜覆盖在第二和第三半导体管芯的整个非活性表面上，并且将第二和第三半导体管芯附接到紧邻的有源表面和支撑件。

公开(公告)号：US07132753B1

公开(公告)日：2006-11-07

申请号：US11115706

申请日：2005-04-26

申请人： Roger D. St. Amand ,  Vladimir Perelman

发明人： Roger D. St. Amand ,  Vladimir Perelman

IPC分类号： H01L23/48 ,  H01L23/34 ,  H01L23/28 ,  H01L23/31 ,  H01L25/065

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L25/0652 ,  H01L2224/05554 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599

摘要： A stack of semiconductor dies is disclosed. A first stack level includes a first semiconductor die and at least one first support that are attached to a substrate surface. A second level includes a second semiconductor die and at least one second support that are attached to the active surface of the first semiconductor die and to a coplanar surface of the first support(s). A third level includes a third semiconductor die attached to the active surface of the second semiconductor die and to a coplanar surface of the second support(s). The second and third semiconductor dies do not overlap bond pads of the first and second semiconductor dies, respectively. An adhesive film overlies the entire inactive surface of the second and third semiconductor dies, and attaches the second and third semiconductor dies to the immediately underlying active surface and support(s).

摘要翻译： 公开了一叠半导体管芯。 第一堆叠级包括第一半导体管芯和附接到衬底表面的至少一个第一支撑件。 第二级包括第二半导体管芯和至少一个第二支撑件，其附接到第一半导体管芯的有源表面和第一支撑件的共面表面。 第三级包括附接到第二半导体管芯的有源表面和第二支撑件的共面的第三半导体管芯。 第二和第三半导体管芯不分别与第一和第二半导体管芯的接合焊盘重叠。 粘合膜覆盖在第二和第三半导体管芯的整个非活性表面上，并且将第二和第三半导体管芯附接到紧邻的有源表面和支撑件。

公开(公告)号：US08796561B1

公开(公告)日：2014-08-05

申请号：US12573466

申请日：2009-10-05

申请人： Christopher M. Scanlan ,  Roger D. St. Amand ,  Jae Dong Kim

发明人： Christopher M. Scanlan ,  Roger D. St. Amand ,  Jae Dong Kim

IPC分类号： H01L23/48 ,  H05K1/16 ,  H05K1/18 ,  H01L23/04

CPC分类号： H01L24/19 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/16 ,  H01L24/20 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16265 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32265 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92125 ,  H01L2924/14 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4007 ,  H05K3/465 ,  H05K2203/1469 ,  H01L2924/00012 ,  H01L2924/00

摘要： A fan out build up substrate stackable package includes an electronic component having an active surface including a bond pad. A package body encloses the electronic component, the package body having a first surface coplanar with the active surface of the electronic component. A buildup dielectric layer is applied to the active surface of the electronic component and the first surface of the package body. A circuit pattern is formed within the first buildup dielectric layer and electrically connected to the bond pad, the first circuit pattern including via capture pads. Via capture pad apertures extend through the package body and expose the via capture pads. In this manner, direct connection to the first circuit pattern, i.e., the first metal layer, of the fan out build up substrate stackable package is facilitated. Further, the fan out build up substrate stackable package is extremely thin resulting in extremely thin stacked assemblies.

摘要翻译： 扇出的基板可堆叠封装包括具有包括接合焊盘的有源表面的电子部件。 封装体包围电子部件，封装主体具有与电子部件的有效表面共面的第一表面。 将积聚电介质层施加到电子部件的有源表面和封装主体的第一表面。 电路图案形成在第一累积电介质层内并电连接到接合焊盘，第一电路图案包括通孔捕获垫。 通过捕获垫孔径延伸穿过封装主体并暴露通孔捕获垫。 以这种方式，便利地直接连接到扇形器的第一电路图案，即第一金属层，从而构建基板可堆叠封装。 此外，扇出构建基板可堆叠封装非常薄，导致非常薄的堆叠组件。

公开(公告)号：US07932170B1

公开(公告)日：2011-04-26

申请号：US12144145

申请日：2008-06-23

申请人： Ronald Patrick Huemoeller ,  Roger D. St. Amand ,  Robert Francis Darveaux

发明人： Ronald Patrick Huemoeller ,  Roger D. St. Amand ,  Robert Francis Darveaux

IPC分类号： H01L21/44

CPC分类号： H01L21/4853 ,  H01L24/16 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14

摘要： A method includes forming a patterned buildup layer on a first surface of a dielectric layer, the patterned buildup layer including a patterned buildup layer opening exposing a trace coupled to the dielectric layer. A conductor layer is flash plated on the patterned buildup layer and within the patterned buildup layer opening. The patterned buildup layer opening is filled with a blanket conductive filler layer. The blanket conductive filler layer and the conductor layer are planarized to form a flip chip bump.

摘要翻译： 一种方法包括在电介质层的第一表面上形成图案化的聚集层，所述图案化的构建层包括图案化的积层层，其暴露耦合到电介质层的迹线。 导体层被闪镀在图案化的积层和图案化的积层层开口内。 图案化的积层层开口填充有覆盖层导电填料层。 将覆盖层导电填料层和导体层平坦化以形成倒装芯片凸块。

公开(公告)号：US07675180B1

公开(公告)日：2010-03-09

申请号：US11356921

申请日：2006-02-17

申请人： Roger D. St. Amand ,  ChangSuk Han ,  YounSang Kim ,  KyungRok Park ,  Vladimir Perelman

发明人： Roger D. St. Amand ,  ChangSuk Han ,  YounSang Kim ,  KyungRok Park ,  Vladimir Perelman

IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L23/49582 ,  B81B2201/0264 ,  B81B2207/07 ,  B81C1/0023 ,  B81C2201/019 ,  G01L19/0084 ,  G01L19/141 ,  H01L23/49548 ,  H01L23/49816 ,  H01L23/49861 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L25/0657 ,  H01L27/14618 ,  H01L2224/27013 ,  H01L2224/274 ,  H01L2224/29 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29298 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/4899 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83139 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06575 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A film-on-wire spacer covers an entire upper surface of a lower electronic component. Accordingly, an upper electronic component is supported above bond pads and lower bond wires of the lower electronic component. This decreases the stress on the upper electronic component, e.g., during wirebonding, and thus decreases the chance of cracking the upper electronic component. Further, the lower bond wires are enclosed in and protected by the film-on-wire spacer. Further, the film-on-wire spacer is thin resulting in a minimum height of the stacked electronic component package.

摘要翻译： 电影在线隔离物覆盖下电子元件的整个上表面。 因此，上部电子部件被支撑在下部电子部件的接合焊盘和下部接合线之上。 这降低了上电子部件上的应力，例如在引线键合期间，因此减少了上部电子部件破裂的可能性。 此外，下部接合线被包围在膜间隔离器上并由其保护。 此外，薄膜在线间隔物是薄的，导致堆叠的电子部件封装的最小高度。

公开(公告)号：US20080237824A1

公开(公告)日：2008-10-02

申请号：US11356919

申请日：2006-02-17

申请人： Roger D. St. Amand ,  ChangSuk Han ,  YounSang Kim ,  KyungRok Park

发明人： Roger D. St. Amand ,  ChangSuk Han ,  YounSang Kim ,  KyungRok Park

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L24/27 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19103 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method of fabricating a stacked electronic component package includes placing a single-sided film spacer on an upper surface of a lower electronic component inward of bond pad with a pickup tool. After being adhered to the upper surface of the lower electronic component, the pickup tool is retracted from the single-sided film spacer. An upper surface of a film, e.g., an organic film, of the single-sided film spacer is nonadhesive. Accordingly, the single-sided film spacer does not stick to the pickup tool during retraction of the pickup tool from the single-sided film spacer.

摘要翻译： 一种叠层电子元器件封装的制造方法，包括：用拾取工具将单面胶片间隔物放置在接合焊盘的内侧的下电子部件的上表面。 在粘附到下部电子部件的上表面之后，拾取工具从单面胶片间隔件缩回。 单面膜间隔物的膜（例如有机膜）的上表面是无粘性的。 因此，单面胶片间隔件在拾取工具从单面胶片间隔件缩回时不粘附于拾取工具。