公开(公告)号：US06201298B1

公开(公告)日：2001-03-13

申请号：US09301176

申请日：1999-04-28

申请人： Ryoji Sato ,  Masanori Takeuchi ,  Keiichiro Kata

发明人： Ryoji Sato ,  Masanori Takeuchi ,  Keiichiro Kata

IPC分类号： H01L2352

CPC分类号： H01L23/50 ,  H01L23/49816 ,  H01L23/4985 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05548 ,  H01L2224/16225 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/00

摘要： A printed circuit board is connected to a single-layer wiring tape so as to surround an integrated circuit element which is connected to the single-layer wiring tape. Wiring patterns of the wiring tape are formed from either a power electrode or a ground electrode on the integrated circuit element to a planar metal pattern on the printed circuit board, from the planar metal pattern on the printed circuit board to either an external power terminal or an external ground terminal on the wiring tape, and from a signal electrode on the integrated circuit element to an external signal terminal on the wiring tape.

摘要翻译： 印刷电路板连接到单层布线带，以围绕连接到单层布线带的集成电路元件。 布线带的布线图形从集成电路元件上的电源电极或接地电极到印刷电路板上的平面金属图案，从印刷电路板上的平面金属图案形成为外部电源端子或 布线带上的外部接地端子和集成电路元件上的信号电极到布线带上的外部信号端子。

公开(公告)号：US06339337B1

公开(公告)日：2002-01-15

申请号：US09048045

申请日：1998-03-26

申请人： Shuichi Matsuda ,  Keiichiro Kata ,  Ryoji Sato ,  Masaharu Sato

发明人： Shuichi Matsuda ,  Keiichiro Kata ,  Ryoji Sato ,  Masaharu Sato

IPC分类号： G01R3102

CPC分类号： G01R31/311

摘要： An infrared ray test for a semiconductor chip is conducted by irradiating infrared ray onto a bottom surface of a semiconductor chip, receiving the infrared ray reflected from a bonding pad and displaying the image of the bonding pad on a monitor. The image obtained from the infrared ray has information whether the bonding pad itself or a portion of the silicon substrate underlying the bonding pad has a defect or whether or not there is a deviation of the bonding pad with respect to the bump.

摘要翻译： 通过将红外线照射到半导体芯片的底面上，接收从接合焊盘反射的红外线并将接合焊盘的图像显示在监视器上，进行半导体芯片的红外线测试。 从红外线获得的图像具有关于焊盘本身或接合焊盘下方的硅衬底的一部分是否具有缺陷的焊盘的位置，或者接合焊盘相对于凸块是否存在偏差的信息。

公开(公告)号：US07816782B2

公开(公告)日：2010-10-19

申请号：US11174526

申请日：2005-07-06

申请人： Hideya Murai ,  Tadanori Shimoto ,  Takuo Funaya ,  Katsumi Kikuchi ,  Shintaro Yamamichi ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata ,  Kouji Matsui ,  Shinichi Miyazaki

发明人： Hideya Murai ,  Tadanori Shimoto ,  Takuo Funaya ,  Katsumi Kikuchi ,  Shintaro Yamamichi ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata ,  Kouji Matsui ,  Shinichi Miyazaki

IPC分类号： H01L23/14 ,  H01L23/12

CPC分类号： H01L21/4857 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/5383 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/181 ,  H05K3/007 ,  H05K3/205 ,  H05K3/28 ,  H05K3/4614 ,  H05K3/4682 ,  H05K2201/0376 ,  H05K2203/0152 ,  H05K2203/061 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A wiring substrate for mounting semiconductors is provided with an insulation film, wires formed in the insulation film, and a plurality of electrode pads that electrically connect to the wires through vias. The electrode pads are provided to have their surfaces exposed to both of the front surface and the rear surface of the insulation film, and at least a part of the side surface of the electrode pads is buried in the insulation film. The insulation film is formed by forming electrode pads on the respective two metallic plates, thereafter, laminating an insulation layer and wires on the respective metallic plates to cover the electrode pad, and adhering the insulation layers to each other for integration, and thereafter, removing the metallic plates.

摘要翻译： 用于安装半导体的布线基板设置有绝缘膜，形成在绝缘膜中的布线以及通过通孔电连接到导线的多个电极垫。 电极焊盘被设置为使其表面暴露于绝缘膜的前表面和后表面，并且电极焊盘的侧表面的至少一部分被埋在绝缘膜中。 绝缘膜通过在相应的两个金属板上形成电极焊盘而形成，然后在相应的金属板上层叠绝缘层和电线以覆盖电极焊盘，并将绝缘层彼此粘合在一起，然后除去 金属板。

公开(公告)号：US20060189125A1

公开(公告)日：2006-08-24

申请号：US11411020

申请日：2006-04-26

申请人： Keiichiro Kata ,  Hirokazu Honda ,  Kazuhiro Baba ,  Tadanori Shimoto ,  Katsumi Kikuchi ,  Rokuro Kambe ,  Satoshi Hirano ,  Shinya Miyamoto

发明人： Keiichiro Kata ,  Hirokazu Honda ,  Kazuhiro Baba ,  Tadanori Shimoto ,  Katsumi Kikuchi ,  Rokuro Kambe ,  Satoshi Hirano ,  Shinya Miyamoto

IPC分类号： H01L21/4763

CPC分类号： H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2924/19041 ,  H05K3/0035 ,  H05K3/28 ,  H05K3/4682 ,  H05K2201/2018 ,  H05K2203/0152 ,  H05K2203/0376

摘要： A method of producing a multilayer wiring substrate is disclosed. The multilayer wiring substrate is free from a core substrate and includes a build up layer which includes an insulator layer and a wiring layer. One of a first main surface and a second main surface of the build up layer is formed with a metal supporting frame body. The method includes the steps of: forming a first insulator layer on a first main surface of a metal supporting plate, where the first insulator layer is included in the insulator layer and becomes a first resist layer which is positioned on the first main surface's side of the build up layer, and forming a first metal pad layer in a given position on a first main surface of the first insulator layer, where the first metal pad layer is included in the wiring layer and becomes a metal pad layer.

公开(公告)号：US5759873A

公开(公告)日：1998-06-02

申请号：US733207

申请日：1996-10-17

申请人： Keiichiro Kata ,  Shuichi Matsuda ,  Hironori Ono

发明人： Keiichiro Kata ,  Shuichi Matsuda ,  Hironori Ono

IPC分类号： H01L21/48 ,  H01L21/60 ,  H01L23/544 ,  H01L21/44 ,  H01L21/50

CPC分类号： H01L24/86 ,  H01L21/4803 ,  H01L23/544 ,  H01L2223/54473 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/351 ,  Y10T29/41

摘要： In a method of manufacturing a chip size semiconductor device comprising a semiconductor chip and a carrier tape including an insulating film and wiring patterns formed on one surface of the insulating film, the method comprises the steps of bonding the semiconductor chip and the carrier tape by the use of an adhesive film having a predetermined size corresponding to an adhesive area of the semiconductor chip. The step of bonding comprises the substeps of cutting away the adhesive film by punching from an adhesive film tape held above the semiconductor chip mounted on a table and subsequently setting the adhesive film on the adhesive area by moving the adhesive film downwardly.

摘要翻译： 在制造包括半导体芯片的芯片尺寸半导体器件的方法和包括绝缘膜的载带和形成在绝缘膜的一个表面上的布线图案的方法中，所述方法包括以下步骤：将半导体芯片和载带 使用具有对应于半导体芯片的粘合区域的预定尺寸的粘合剂膜。 接合步骤包括通过从保持在安装在工作台上的半导体芯片上方的粘合薄膜带上冲下来切割粘合剂膜的子步骤，然后通过向下移动粘合剂膜将粘合剂膜设置在粘合剂区域上。

公开(公告)号：US07566834B2

公开(公告)日：2009-07-28

申请号：US12140041

申请日：2008-06-16

申请人： Tadanori Shimoto ,  Katsumi Kikuchi ,  Hideya Murai ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata

发明人： Tadanori Shimoto ,  Katsumi Kikuchi ,  Hideya Murai ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata

IPC分类号： H05K1/00

CPC分类号： H01L23/49816 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/145 ,  H01L23/49822 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0366 ,  H05K3/205 ,  H05K3/423 ,  H05K2201/0376 ,  H05K2201/068 ,  H05K2203/0733 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board has a base insulating film. The base insulating film has a thickness of 20 to 100 μm and is made of a heat-resistant resin which has a glass-transition temperature of 150° C. or higher and which contains reinforcing fibers made of glass or aramid. The base insulating film has the following physical properties (1) to (6) when an elastic modulus at a temperature of T° C. is given as DT (GPa) and a breaking strength at a temperature of T° C. is given as HT (MPa). (1) A coefficient of thermal expansion in the direction of thickness thereof is 90 ppm/K or less. (2) D23≧5 (3) D150≧2.5 (4) (D−65/D150)≦3.0 (5) H23≧140 (6) (H−65/H150)≦2.3.

摘要翻译： 布线板具有基底绝缘膜。 基底绝缘膜的厚度为20〜100μm，由玻璃化转变温度为150℃以上的含有玻璃或芳族聚酰胺的增强纤维的耐热性树脂构成。 当T℃温度下的弹性模量为DT（GPa）时，基体绝缘膜具有以下物理性质（1）〜（6）），在温度T℃下的断裂强度为 HT（MPa）。 （1）其厚度方向的热膨胀系数为90ppm / K以下。 （2）D23> = 5（3）D150> = 2.5（4）（D-65 / D150）<= 3.0（5）H23> = 140（6）（H-65 / H150）<= 2.3。

公开(公告)号：US20050252682A1

公开(公告)日：2005-11-17

申请号：US11125158

申请日：2005-05-10

申请人： Tadanori Shimoto ,  Katsumi Kikuchi ,  Hideya Murai ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata

发明人： Tadanori Shimoto ,  Katsumi Kikuchi ,  Hideya Murai ,  Kazuhiro Baba ,  Hirokazu Honda ,  Keiichiro Kata

IPC分类号： H01L23/12 ,  H01L21/48 ,  H01L21/68 ,  H01L23/14 ,  H01L23/498 ,  H01L25/065 ,  H05K1/03 ,  H05K1/11 ,  H05K3/20 ,  H05K3/42

CPC分类号： H01L23/49816 ,  H01L21/4857 ,  H01L21/6835 ,  H01L23/145 ,  H01L23/49822 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0366 ,  H05K3/205 ,  H05K3/423 ,  H05K2201/0376 ,  H05K2201/068 ,  H05K2203/0733 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A wiring board has a base insulating film. The base insulating film has a thickness of 20 to 100 μm and is made of a heat-resistant resin which has a glass-transition temperature of 150° C. or higher and which contains reinforcing fibers made of glass or aramid. The base insulating film has the following physical properties (1) to (6) when an elastic modulus at a temperature of T° C. is given as DT (GPa) and a breaking strength at a temperature of T° C. is given as HT (MPa). (1) A coefficient of thermal expansion in the direction of thickness thereof is 90 ppm/K or less. (2) D23≧5 (3) D150≧2.5 (4) (D-65/D150)≦3.0 (5) H23≧140 (6) (H-65/H150)≦2.3

摘要翻译： 布线板具有基底绝缘膜。 基底绝缘膜的厚度为20〜100μm，由玻璃化转变温度为150℃以上的含有玻璃或芳族聚酰胺的增强纤维的耐热性树脂构成。 当在T℃的温度下的弹性模量为D T（GPa）时，基体绝缘膜具有以下物理性质（1）至（6））和在温度下的断裂强度 的T℃给出为H T（MPa）。 （1）其厚度方向的热膨胀系数为90ppm / K以下。 （2）D 23 = 5（3）D 150 > = 2.5（4）（D-65 / D 150 <= 3.0（5）H 23 = 140（6）（H-65 / H 150） 2.3

公开(公告)号：US5726489A

公开(公告)日：1998-03-10

申请号：US531271

申请日：1995-09-20

申请人： Shuichi Matsuda ,  Keiichiro Kata

发明人： Shuichi Matsuda ,  Keiichiro Kata

IPC分类号： H01L21/60 ,  H01L23/12 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/552 ,  H01L23/48

CPC分类号： H01L23/3114 ,  H01L23/49572 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/552 ,  H01L2224/16 ,  H01L2924/01079 ,  H01L2924/15311

摘要： A film carrier semiconductor device 10 comprises a semiconductor bare chip 20 and a carrier film 30. Chip electrodes 21 are provided on the bare chip 20. Each chip electrode 21 is electrically connected to the carrier film 30. Bump electrodes 37 are formed and arranged as an array on the carrier film 30 on the side of the other surface 31b of the film 30. Interconnection layers 32 are provided on the carrier film 30 to connect some of the chip electrodes 21b to the bump electrodes 37a and 37b. The semiconductor device 10 also comprises a noise blocking layer 60 provided on the carrier film 30 outside the chip mounting region. The noise blocking layer 60 is electrically connected to at least one of the chip electrodes 21a.

摘要翻译： 膜载体半导体器件10包括半导体裸芯片20和载体膜30.芯片电极21设置在裸芯片20上。每个芯片电极21电连接到载体膜30.凸起电极37形成并布置为 在膜30的另一个表面31b侧的载体膜30上的阵列。在载体膜30上设置有互连层32，以将一些芯片电极21b连接到凸块电极37a和37b。 半导体器件10还包括设置在芯片安装区域外部的载体膜30上的噪声阻挡层60。 噪声阻挡层60电连接到芯片电极21a中的至少一个。

公开(公告)号：US07233066B2

公开(公告)日：2007-06-19

申请号：US11411020

申请日：2006-04-26

申请人： Keiichiro Kata ,  Hirokazu Honda ,  Kazuhiro Baba ,  Tadanori Shimoto ,  Katsumi Kikuchi ,  Rokuro Kambe ,  Satoshi Hirano ,  Shinya Miyamoto

发明人： Keiichiro Kata ,  Hirokazu Honda ,  Kazuhiro Baba ,  Tadanori Shimoto ,  Katsumi Kikuchi ,  Rokuro Kambe ,  Satoshi Hirano ,  Shinya Miyamoto

IPC分类号： H01L23/48

CPC分类号： H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2924/19041 ,  H05K3/0035 ,  H05K3/28 ,  H05K3/4682 ,  H05K2201/2018 ,  H05K2203/0152 ,  H05K2203/0376

摘要： A method of producing a multilayer wiring substrate is disclosed. The multilayer wiring substrate is free from a core substrate and includes a build up layer which includes an insulator layer and a wiring layer. One of a first main surface and a second main surface of the build up layer is formed with a metal supporting frame body. The method includes the steps of: forming a first insulator layer on a first main surface of a metal supporting plate, where the first insulator layer is included in the insulator layer and becomes a first resist layer which is positioned on the first main surface's side of the build up layer, and forming a first metal pad layer in a given position on a first main surface of the first insulator layer, where the first metal pad layer is included in the wiring layer and becomes a metal pad layer.

摘要翻译： 公开了一种制造多层布线基板的方法。 多层布线基板不含芯基板，并且包括包含绝缘体层和布线层的堆积层。 构建层的第一主表面和第二主表面之一形成有金属支撑框体。 该方法包括以下步骤：在金属支撑板的第一主表面上形成第一绝缘体层，其中第一绝缘体层包含在绝缘体层中，并成为位于第一绝缘体层的第一主表面侧的第一抗蚀剂层 并且在第一绝缘体层的第一主表面上的给定位置形成第一金属焊盘层，其中第一金属焊盘层包括在布线层中并且变成金属焊盘层。

公开(公告)号：US07060604B2

公开(公告)日：2006-06-13

申请号：US10454530

申请日：2003-06-05

申请人： Keiichiro Kata ,  Hirokazu Honda ,  Kazuhiro Baba ,  Tadanori Shimoto ,  Katsumi Kikuchi ,  Rokuro Kambe ,  Satoshi Hirano ,  Shinya Miyamoto

发明人： Keiichiro Kata ,  Hirokazu Honda ,  Kazuhiro Baba ,  Tadanori Shimoto ,  Katsumi Kikuchi ,  Rokuro Kambe ,  Satoshi Hirano ,  Shinya Miyamoto

IPC分类号： H01L21/4763

CPC分类号： H01L21/6835 ,  H01L21/4857 ,  H01L2221/68345 ,  H01L2924/19041 ,  H05K3/0035 ,  H05K3/28 ,  H05K3/4682 ,  H05K2201/2018 ,  H05K2203/0152 ,  H05K2203/0376

摘要： A method of producing a multilayer wiring substrate is disclosed. The multilayer wiring substrate is free from a core substrate and includes a build up layer which includes an insulator layer and a wiring layer. One of a first main surface and a second main surface of the build up layer is formed with a metal supporting frame body. The method includes the steps of: forming a first insulator layer on a first main surface of a metal supporting plate, where the first insulator layer is included in the insulator layer and becomes a first resist layer which is positioned on the first main surface's side of the build up layer, and forming a first metal pad layer in a given position on a first main surface of the first insulator layer, where the first metal pad layer is included in the wiring layer and becomes a metal pad layer.

摘要翻译： 公开了一种制造多层布线基板的方法。 多层布线基板不含芯基板，并且包括包含绝缘体层和布线层的堆积层。 构建层的第一主表面和第二主表面之一形成有金属支撑框体。 该方法包括以下步骤：在金属支撑板的第一主表面上形成第一绝缘体层，其中第一绝缘体层包含在绝缘体层中，并成为位于第一绝缘体层的第一主表面侧的第一抗蚀剂层 并且在第一绝缘体层的第一主表面上的给定位置形成第一金属焊盘层，其中第一金属焊盘层包括在布线层中并且变成金属焊盘层。