PLASMA TREATMENT APPARATUS AND PLASMA CVD APPARATUS
    2.
    发明申请
    PLASMA TREATMENT APPARATUS AND PLASMA CVD APPARATUS 审中-公开
    等离子体处理装置和等离子体CVD装置

    公开(公告)号:US20120100309A1

    公开(公告)日:2012-04-26

    申请号:US13273258

    申请日:2011-10-14

    摘要: A plasma treatment apparatus includes a treatment chamber covered with a chamber wall, where an upper electrode faces a lower electrode; and a line chamber separated from the treatment chamber by the upper electrode and an insulator, covered with the chamber wall, and connected to a first gas diffusion chamber between a dispersion plate and a shower plate. The first gas diffusion chamber is connected to a second gas diffusion chamber between the dispersion plate and the upper electrode. The second gas diffusion chamber is connected to a first gas pipe in the upper electrode. The upper electrode and the chamber wall are provided on the same axis. The dispersion plate includes a center portion with no gas hole and a peripheral portion with plural gas holes. The center portion faces a gas introduction port of the first gas pipe, connected to an electrode plane of the upper electrode.

    摘要翻译: 等离子体处理装置包括被室壁覆盖的处理室,其中上电极面向下电极; 以及通过所述上部电极和所述处理室与所述室壁隔开并与所述分隔板和喷淋板之间的第一气体扩散室连接的管线室。 第一气体扩散室与分散板和上部电极之间的第二气体扩散室连接。 第二气体扩散室与上部电极中的第一气体管连接。 上电极和室壁设置在同一轴线上。 分散板包括没有气孔的中心部分和具有多个气孔的周边部分。 中心部分面向与上电极的电极平面连接的第一气体管的气体导入口。

    METHOD FOR MANUFACTURING THIN FILM TRANSISTOR
    4.
    发明申请
    METHOD FOR MANUFACTURING THIN FILM TRANSISTOR 有权
    制造薄膜晶体管的方法

    公开(公告)号:US20100124804A1

    公开(公告)日:2010-05-20

    申请号:US12617406

    申请日:2009-11-12

    IPC分类号: H01L21/336

    摘要: An object is to provide a method for manufacturing a thin film transistor having favorable electric characteristics, with high productivity. A gate electrode is formed over a substrate and a gate insulating layer is formed over the gate electrode. A first semiconductor layer is formed over the gate insulating layer by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a rare gas. Next, a second semiconductor layer including an amorphous semiconductor and a microcrystal semiconductor is formed in such a manner that the first semiconductor layer is partially grown as a seed crystal by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a gas containing nitrogen. Then, a semiconductor layer to which an impurity imparting one conductivity is added is formed and a conductive film is formed. Thus, a thin film transistor is manufactured.

    摘要翻译: 本发明的目的在于提供一种制造具有良好的电特性,高生产率的薄膜晶体管的方法。 在基板上形成栅电极,在栅电极上形成栅极绝缘层。 通过使用包含硅或锗,氢气和稀有气体的沉积气体产生等离子体,在栅绝缘层上形成第一半导体层。 接下来,以这样的方式形成包括非晶半导体和微晶半导体的第二半导体层,使得通过使用包含硅或锗的沉积气体,氢气和含有气体的气体产生等离子体,将第一半导体层部分地生长为晶种 氮。 然后,形成添加有赋予一种导电性的杂质的半导体层,形成导电膜。 因此,制造薄膜晶体管。

    THIN FILM TRANSISTOR
    5.
    发明申请
    THIN FILM TRANSISTOR 有权
    薄膜晶体管

    公开(公告)号:US20120061676A1

    公开(公告)日:2012-03-15

    申请号:US13226775

    申请日:2011-09-07

    IPC分类号: H01L29/04 H01L29/786

    摘要: A highly reliable transistor in which change in electrical characteristics is suppressed is provided. A highly reliable transistor in which change in electrical characteristics is suppressed is manufactured with high productivity. A display device with less image deterioration over time is provided. An inverted staggered thin film transistor which includes, between a gate insulating film and impurity semiconductor films functioning as source and drain regions, a semiconductor stacked body including a microcrystalline semiconductor region and a pair of amorphous semiconductor regions. In the microcrystalline semiconductor region, the nitrogen concentration on the gate insulating film side is low and the nitrogen concentration in a region in contact with the amorphous semiconductor is high. Further, an interface with the amorphous semiconductor has unevenness.

    摘要翻译: 提供了其中抑制电特性变化的高度可靠的晶体管。 以高生产率制造其中抑制电特性变化的高度可靠的晶体管。 提供了具有随时间图像劣化的显示装置。 一种倒置交错薄膜晶体管,其包括在栅极绝缘膜和用作源极和漏极区域的杂质半导体膜之间,包括微晶半导体区域和一对非晶半导体区域的半导体层叠体。 在微晶半导体区域中,栅绝缘膜侧的氮浓度低,与非晶半导体接触的区域的氮浓度高。 此外,与非晶半导体的界面具有不均匀性。

    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND PLASMA OXIDATION TREATMENT METHOD
    6.
    发明申请
    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND PLASMA OXIDATION TREATMENT METHOD 有权
    制造半导体器件和等离子体氧化处理方法

    公开(公告)号:US20120270383A1

    公开(公告)日:2012-10-25

    申请号:US13433563

    申请日:2012-03-29

    摘要: Provided is a method for manufacturing a semiconductor device, in which a degradation of characteristics of a thin film transistor can be suppressed by performing plasma oxidation treatment on a gate insulating film containing nitrogen. An embodiment of the present invention is a method for manufacturing a semiconductor device comprising a thin film transistor including a gate electrode, a gate insulating film containing nitrogen, and a channel region in microcrystalline semiconductor films. The method includes the steps of performing plasma treatment on the gate insulating film in an oxidizing gas atmosphere containing hydrogen and an oxidizing gas containing an oxygen atom, and forming the microcrystalline semiconductor film over the gate insulating film. Formula (1), a/b≧2, and Formula (2), b>0, are satisfied, where the amount of hydrogen and the amount of the oxidizing gas in the oxidizing gas atmosphere are a and b, respectively.

    摘要翻译: 提供一种半导体器件的制造方法,其中通过对含有氮的栅极绝缘膜进行等离子体氧化处理可以抑制薄膜晶体管的特性的劣化。 本发明的一个实施例是一种半导体器件的制造方法,该半导体器件包括薄膜晶体管,该薄膜晶体管包括栅电极,含氮的栅绝缘膜和微晶半导体膜中的沟道区。 该方法包括以下步骤:在包含氢的氧化气体气氛和含有氧原子的氧化气体的栅极绝缘膜上进行等离子体处理,并在栅极绝缘膜上形成微晶半导体膜。 满足式(1),a /b≥2和式(2),b> 0,其中,氢和氧化气体气氛中的氧化气体量分别为a和b。

    SEMICONDUCTOR DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20120299006A1

    公开(公告)日:2012-11-29

    申请号:US13477373

    申请日:2012-05-22

    IPC分类号: H01L27/06

    摘要: An object is to prevent light leakage caused due to misregistration even when the width of a black matrix layer is not expanded to a designed value or larger. One embodiment of the present invention is a semiconductor device including a single-gate thin film transistor in which a first semiconductor layer is sandwiched between a bottom-gate electrode and a first black matrix layer. The first semiconductor layer and the first black matrix layer overlap with each other.

    摘要翻译: 目的是防止黑色矩阵层的宽度未扩大到设计值以上的情况下由于配准不良引起的漏光。 本发明的一个实施例是一种包括单栅极薄膜晶体管的半导体器件,其中第一半导体层夹在底栅电极和第一黑矩阵层之间。 第一半导体层和第一黑矩阵层彼此重叠。

    Light Guide Element, Backlight Unit, and Display Device
    9.
    发明申请
    Light Guide Element, Backlight Unit, and Display Device 审中-公开
    导光元件,背光单元和显示设备

    公开(公告)号:US20120262940A1

    公开(公告)日:2012-10-18

    申请号:US13446244

    申请日:2012-04-13

    IPC分类号: G09F13/04 F21V8/00

    摘要: An object is to provide a novel structure of a backlight unit using color-scan backlight drive, which can relieve a color mixture problem. A backlight unit including a plurality of light guide elements is used. The light guide element has a shape extended in the x direction. The light guide element has a shape of rectangular column. Grooves are provided on a bottom surface of the light guide element so as to traverse it in the y direction. Light sources are provided at the ends of the light guide element in the x direction to supply light into the light guide element. Light supplied into the light guide element is reflected by the grooves in the z direction, and emitted to the outside of the light guide element through the top surface. A reflective layer may be provided under the bottom surface of the light guide element.

    摘要翻译: 本发明的目的是提供使用彩色背光驱动的背光单元的新颖结构,其可以减轻混色问题。 使用包括多个导光元件的背光单元。 导光元件具有沿x方向延伸的形状。 导光体具有矩形柱状。 凹槽设置在导光元件的底表面上,以在y方向上穿过它。 光源设置在导光元件的x方向的端部,以将光提供到导光元件中。 供应到导光元件的光在z方向上被凹槽反射,并且通过顶表面发射到导光元件的外部。 反射层可以设置在导光元件的底表面下方。

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    10.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
    半导体器件及其制造方法

    公开(公告)号:US20120248513A1

    公开(公告)日:2012-10-04

    申请号:US13517879

    申请日:2012-06-14

    申请人: Hidekazu MIYAIRI

    发明人: Hidekazu MIYAIRI

    IPC分类号: H01L29/78

    摘要: A space is provided under part of a semiconductor layer. Specifically, a structure in which an eaves portion (a projecting portion, an overhang portion) is formed in the semiconductor layer. The eaves portion is formed as follows: a stacked-layer structure in which a conductive layer, an insulating layer, and a semiconductor layer are stacked in this order is etched collectively to determine a pattern of a gate electrode; and a pattern of the semiconductor layer is formed while side-etching is performed.

    摘要翻译: 在半导体层的一部分下方设置有空间。 具体而言,在半导体层中形成有檐部(突出部,突出部)的结构。 檐部形成如下:将依次层叠导体层,绝缘层和半导体层的叠层结构体共同地蚀刻,以确定栅电极的图案; 并且在进行侧面蚀刻时形成半导体层的图案。