公开(公告)号：US09520361B2

公开(公告)日：2016-12-13

申请号：US14937406

申请日：2015-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Pil-Kyu Kang ,  Seok-Ho Kim ,  Tae-Yeong Kim ,  Hyo-Ju Kim ,  Byung-Lyul Park ,  Joo-Hee Jang ,  Jin-Ho Chun

IPC: H01L23/532 ,  H01L25/065

CPC classification number: H01L23/53228 ,  H01L21/76843 ,  H01L23/53209 ,  H01L23/53214 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L25/0657 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1469 ,  H01L2224/08121 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate, a first conductive structure on the substrate, and a second conductive structure on the first conductive structure. The semiconductor device includes first and second metal-diffusion-blocking layers on respective sidewalls of the first and second conductive structures. The semiconductor device includes an insulating layer between the first and second metal-diffusion-blocking layers. Moreover, the semiconductor device includes a metal-diffusion-shield pattern in the insulating layer and spaced apart from the first conductive structure.

Abstract translation: 提供半导体器件。 半导体器件包括衬底，衬底上的第一导电结构和第一导电结构上的第二导电结构。 半导体器件包括在第一和第二导电结构的相应侧壁上的第一和第二金属扩散阻挡层。 半导体器件包括在第一和第二金属扩散阻挡层之间的绝缘层。 此外，半导体器件在绝缘层中包括金属扩散屏蔽图案并且与第一导电结构间隔开。

公开(公告)号：US20160141249A1

公开(公告)日：2016-05-19

申请号：US14937406

申请日：2015-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Pil-Kyu Kang ,  Seok-Ho Kim ,  Tae-Yeong Kim ,  Hyo-Ju Kim ,  Byung-Lyul Park ,  Joo-Hee Jang ,  Jin-Ho Chun

IPC: H01L23/532 ,  H01L25/065

CPC classification number: H01L23/53228 ,  H01L21/76843 ,  H01L23/53209 ,  H01L23/53214 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L25/0657 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/14629 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1469 ,  H01L2224/08121 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate, a first conductive structure on the substrate, and a second conductive structure on the first conductive structure. The semiconductor device includes first and second metal-diffusion-blocking layers on respective sidewalls of the first and second conductive structures. The semiconductor device includes an insulating layer between the first and second metal-diffusion-blocking layers. Moreover, the semiconductor device includes a metal-diffusion-shield pattern in the insulating layer and spaced apart from the first conductive structure.

Abstract translation: 提供半导体器件。 半导体器件包括衬底，衬底上的第一导电结构和第一导电结构上的第二导电结构。 半导体器件包括在第一和第二导电结构的相应侧壁上的第一和第二金属扩散阻挡层。 半导体器件包括在第一和第二金属扩散阻挡层之间的绝缘层。 此外，半导体器件在绝缘层中包括金属扩散屏蔽图案并且与第一导电结构间隔开。

公开(公告)号：US10833032B2

公开(公告)日：2020-11-10

申请号：US16052383

申请日：2018-08-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong-Min Son ,  Jeong-Gi Jin ,  Jin-Ho An ,  Jin-Ho Chun ,  Kwang-Jin Moon ,  Ho-Jin Lee

IPC: H01L23/00 ,  H01L23/485 ,  H01L23/522

Abstract: A semiconductor device includes a protective layer, a redistribution pattern, a pad pattern and an insulating polymer layer. The protective layer may be formed on a substrate. The redistribution pattern may be formed on the protective layer. An upper surface of the redistribution may be substantially flat. The pad pattern may be formed directly on the redistribution pattern. An upper surface of the pad pattern may be substantially flat. The insulating polymer layer may be formed on the redistribution pattern and the pad pattern. An upper surface of the insulating polymer layer may be lower than the upper surface of the pad pattern. The semiconductor device may have a high reliability.

公开(公告)号：US09691685B2

公开(公告)日：2017-06-27

申请号：US15163995

申请日：2016-05-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyu-Ha Lee ,  Hyung-Jun Jeon ,  Jum-Yong Park ,  Byung-Lyul Park ,  Ji-Soon Park ,  Jin-Ho An ,  Jin-Ho Chun

IPC: H01L23/544 ,  H01L23/48 ,  H01L23/00 ,  H01L23/532 ,  H01L21/768 ,  H01L21/78

CPC classification number: H01L23/481 ,  H01L21/76852 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/291 ,  H01L23/293 ,  H01L23/31 ,  H01L23/3192 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/544 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L2223/5446 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/06151 ,  H01L2224/06156 ,  H01L2224/06181 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/014

Abstract: A semiconductor device includes a substrate having a die region and a scribe region surrounding the die region, a plurality of via structures penetrating through the substrate in the die region, a portion of the via structure being exposed over a surface of the substrate, and a protection layer pattern structure provided on the surface of the substrate surrounding a sidewall of the exposed portion of the via structure and having a protruding portion covering at least a portion of the scribe region adjacent to the via structure.

公开(公告)号：US11469202B2

公开(公告)日：2022-10-11

申请号：US17029639

申请日：2020-09-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong-Min Son ,  Jeong-Gi Jin ,  Jin-Ho An ,  Jin-Ho Chun ,  Kwang-Jin Moon ,  Ho-Jin Lee

IPC: H01L23/00 ,  H01L23/485 ,  H01L23/522

Abstract: A semiconductor device includes a protective layer, a redistribution pattern, a pad pattern and an insulating polymer layer. The protective layer may be formed on a substrate. The redistribution pattern may be formed on the protective layer. An upper surface of the redistribution may be substantially flat. The pad pattern may be formed directly on the redistribution pattern. An upper surface of the pad pattern may be substantially flat. The insulating polymer layer may be formed on the redistribution pattern and the pad pattern. An upper surface of the insulating polymer layer may be lower than the upper surface of the pad pattern.

公开(公告)号：US20170033032A1

公开(公告)日：2017-02-02

申请号：US15163995

申请日：2016-05-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyu-Ha Lee ,  Hyung-Jun Jeon ,  Jum-Yong Park ,  Byung-Lyul Park ,  Ji-Soon Park ,  Jin-Ho An ,  Jin-Ho Chun

IPC: H01L23/48 ,  H01L21/78 ,  H01L23/532 ,  H01L21/768 ,  H01L23/544 ,  H01L23/00

CPC classification number: H01L23/481 ,  H01L21/76852 ,  H01L21/76898 ,  H01L21/78 ,  H01L23/291 ,  H01L23/293 ,  H01L23/31 ,  H01L23/3192 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/544 ,  H01L24/02 ,  H01L24/05 ,  H01L24/13 ,  H01L2223/5446 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/06151 ,  H01L2224/06156 ,  H01L2224/06181 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/14181 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/94 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/014

Abstract: A semiconductor device includes a substrate having a die region and a scribe region surrounding the die region, a plurality of via structures penetrating through the substrate in the die region, a portion of the via structure being exposed over a surface of the substrate, and a protection layer pattern structure provided on the surface of the substrate surrounding a sidewall of the exposed portion of the via structure and having a protruding portion covering at least a portion of the scribe region adjacent to the via structure.

Abstract translation: 半导体器件包括具有管芯区域和围绕管芯区域的划线区域的衬底，穿过管芯区域中的衬底的多个通孔结构，一部分通孔结构暴露在衬底的表面上，以及 保护层图案结构，其设置在所述基板的表面上，所述表面包围所述通孔结构的所述暴露部分的侧壁，并且具有覆盖所述划线区域的与所述通孔结构相邻的至少一部分的突出部分。

公开(公告)号：US08735281B2

公开(公告)日：2014-05-27

申请号：US13875525

申请日：2013-05-02

Applicant: SAMSUNG Electronics Co., Ltd.

Inventor： Chang-Woo Shin ,  Hyun-Soo Chung ,  Eun-Chul Ahn ,  Jum-Gon Kim ,  Jin-Ho Chun

IPC: H01L21/44 ,  H01L21/4763

CPC classification number: H01L21/76841 ,  H01L23/525 ,  H01L23/53238 ,  H01L24/02 ,  H01L24/13 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/04941 ,  H01L2924/12044

Abstract: A semiconductor device including an interconnection structure including a copper pad, a pad barrier layer and a metal redistribution layer, an interconnection structure thereof and methods of fabricating the same are provided. The semiconductor device includes a copper pad disposed on a first layer, a pad barrier layer including titanium disposed on the copper pad, an inorganic insulating layer disposed on the pad barrier layer, a buffer layer disposed on the inorganic insulating layer, wherein the inorganic insulating layer and the buffer layer expose a portion of the pad barrier layer, a seed metal layer disposed on the exposed buffer layer, a metal redistribution layer disposed on the seed metal layer, and a first protective layer disposed on the metal redistribution layer.

Abstract translation: 提供一种包括铜焊盘，焊盘阻挡层和金属再分布层的互连结构的半导体器件，其互连结构及其制造方法。 半导体器件包括设置在第一层上的铜焊盘，包括设置在铜焊盘上的钛的焊盘阻挡层，设置在焊盘阻挡层上的无机绝缘层，设置在无机绝缘层上的缓冲层，其中无机绝缘 所述缓冲层暴露所述焊盘阻挡层的一部分，设置在所述暴露的缓冲层上的种子金属层，设置在所述种子金属层上的金属再分配层以及设置在所述金属再分配层上的第一保护层。

公开(公告)号：US10580726B2

公开(公告)日：2020-03-03

申请号：US16106645

申请日：2018-08-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-Ho Chun ,  Seong-Min Son ,  Hyung-Jun Jeon ,  Kwang-Jin Moon ,  Jin-Ho An ,  Ho-Jin Lee ,  Atsushi Fujisaki

IPC: H01L23/498 ,  H01L23/525 ,  H01L23/532 ,  H01L23/31 ,  H01L23/00 ,  H01L21/768 ,  H01L23/48

Abstract: A semiconductor device and a method of manufacturing the same, the device including a through-hole electrode structure extending through a substrate; a redistribution layer on the through-hole electrode structure; and a conductive pad, the conductive pad including a penetrating portion extending through the redistribution layer; and a protrusion portion on the penetrating portion, the protrusion portion protruding from an upper surface of the redistribution layer, wherein a central region of an upper surface of the protrusion portion is flat and not closer to the substrate than an edge region of the upper surface of the protrusion portion.

公开(公告)号：US20170125364A1

公开(公告)日：2017-05-04

申请号：US15251575

申请日：2016-08-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Hyun Cho ,  Kwang-Ho Ryu ,  Ji-Hye Shin ,  Jin-Ho Chun

IPC: H01L23/00 ,  H01L23/528 ,  G11C8/10 ,  H01L23/48

CPC classification number: H01L24/02 ,  G11C5/025 ,  G11C8/10 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/528 ,  H01L23/544 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2223/54426 ,  H01L2224/0217 ,  H01L2224/02331 ,  H01L2224/02372 ,  H01L2224/02373 ,  H01L2224/03602 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05024 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/11002 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13026 ,  H01L2224/13082 ,  H01L2224/14181 ,  H01L2924/00014

Abstract: An integrated circuit device can include a first Through Via (TV) region including first TV structures that are spaced apart from one another at a first pitch in first and second directions. A second TV region can include second TV structures that are spaced apart from one another at the first pitch in the first and second directions. A TV free region can separate directly adjacent first and second TV structures from one another by a spacing distance measured in the first or second direction that is greater than the first pitch and an alignment key can be defined as a geometric pattern including one of the second TV structures and the TV free region.

公开(公告)号：US20130313722A1

公开(公告)日：2013-11-28

申请号：US13763294

申请日：2013-02-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Son-Kwan Hwang ,  Byung-Lyul Park ,  Hyun-Soo Chung ,  Jin-Ho Chun ,  Gil-Heyun Choi

IPC: H01L23/498

CPC classification number: H01L23/49827 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K2201/09563 ,  H01L2924/00

Abstract: A semiconductor device includes an insulating layer on a surface of a substrate, a through-via structure vertically passing through the substrate and the insulating layer and being exposed on the insulating layer, and a via pad on a surface of the exposed through-via structure. The via pad includes a via pad body, and a via pad inlay below the via pad body and protruding into the insulating layer and surrounding the through-via structure. The via pad body and the via pad inlay include a via pad barrier layer directly on the insulating layer and a via pad metal layer on the via pad barrier layer.

Abstract translation: 半导体器件包括在衬底的表面上的绝缘层，垂直穿过衬底和绝缘层并且暴露在绝缘层上的通孔结构，以及暴露的通孔结构的表面上的通孔焊盘 。 通孔焊盘包括通孔焊盘主体和通孔焊盘嵌入到通孔焊盘主体下方并突出到绝缘层中并且围绕通孔结构。 通孔焊盘主体和通孔焊盘嵌体包括直接在绝缘层上的通孔焊盘阻挡层和通孔焊盘阻挡层上的通孔焊盘金属层。