摘要:
Etching compositions are provided. The etching composition includes a phosphoric acid, ammonium ions and a silicon compound. The silicon compound includes a silicon atom, an atomic group having an amino group combined with the silicon atom, and at least two oxygen atoms combined with the silicon atom. Methods utilizing the etching compositions are also provided.
摘要:
Etching compositions are provided. The etching composition includes a phosphoric acid, ammonium ions and a silicon compound. The silicon compound includes a silicon atom, an atomic group having an amino group combined with the silicon atom, and at least two oxygen atoms combined with the silicon atom. Methods utilizing the etching compositions are also provided.
摘要:
Etching compositions are provided. The etching composition includes a phosphoric acid, ammonium ions and a silicon compound material. The silicon compound material includes a silicon atom, at least one selected from the group of a nitrogen atom, a phosphorus atom and a sulfur atom combined with the silicon atom, and at least two oxygen atoms combined with the silicon atom. Methods utilizing the etching compositions are also provided.
摘要:
Etching compositions are provided. The etching composition includes a phosphoric acid, ammonium ions and a silicon compound material. The silicon compound material includes a silicon atom, at least one selected from the group of a nitrogen atom, a phosphorus atom and a sulfur atom combined with the silicon atom, and at least two oxygen atoms combined with the silicon atom. Methods utilizing the etching compositions are also provided.
摘要:
A semiconductor memory device includes a stack structure comprising horizontal electrodes sequentially stacked on a substrate including a cell array region and an extension region and horizontal insulating layers between the horizontal electrodes. The semiconductor memory device may further include vertical structures that penetrate the stack structure, a first one of the vertical structures being on the cell array region and a second one of the vertical structures being on the extension region. Each of the vertical structures includes a channel layer, and a tunneling insulating layer, a charge storage layer and a blocking insulating layer which are sequentially stacked on a sidewall of the channel layer. The charge storage layer of the first vertical structure includes charge storage patterns spaced apart from each other in a direction perpendicular to a top surface of the substrate with the horizontal insulating layers interposed therebetween. The charge storage layer of the second vertical structure extends along sidewalls of the horizontal electrodes and sidewalls of the horizontal insulating layers.
摘要:
The inventive concepts provide a method of completely removing a damage region of a surface of an etch target layer after plasma-etching the etch target layer. The method includes performing a first post-etch plasma treatment process using a first post-treatment gas on the plasma-etched etch target layer. A polarity of ions of the first post-treatment gas may be the same as a polarity of bias power applied to a stage in a plasma apparatus.
摘要:
A substrate having an insulating layer including an oxide is loaded into a chamber, and at least a part of the insulating layer is removed by injecting a process gas including an etching source gas into the chamber. The removal process is performed in a pulse type in which a first period and a second period are repeated a plurality of times. The etching source gas is supplied at a first flow rate during the first period and is supplied at a second flow rate less than the first flow rate during the second period. A temperature of the inside of the chamber remains at 100° C. or more during the removal process.
摘要:
An apparatus includes first and second VI sensors, an optical sensor, and an arcing detector. The first VI sensor is disposed in a power filter or on a power supply line connected to a heater disposed in a lower electrode of a process chamber in which a plasma process is performed. The first VI sensor senses a harmonic generated from a first power supply supplying power to the lower electrode and outputs a first signal. The optical sensor senses an intensity of light generated from the process chamber and outputs a second signal. The second VI sensor is disposed on a power supply line connected to an upper electrode and senses a harmonic generated from a second power supply supplying power to the upper electrode and outputs a third signal. The arcing detector determines whether arcing occurs based on one or more of the first, second, and third signals.
摘要:
A plasma etching apparatus includes an etching chamber and at least one processor. The etching chamber is configured to support a target therein. The at least one processor is configured to: determine a process condition for plasma etching the target before execution of a plasma etching process; and control an aspect of the chamber according to the process condition. The process condition includes a unit etching time over which the plasma etching process is to be continuously performed.
摘要:
Three dimensional semiconductor memory devices and methods of fabricating the same are provided. According to the method, sacrificial layers and insulating layers are alternately and repeatedly stacked on a substrate, and a cutting region penetrating an uppermost sacrificial layer of the sacrificial layers is formed. The cutting region is filled with a non sacrificial layer. The insulating layers and the sacrificial layers are patterned to form a mold pattern. The mold pattern includes insulating patterns, sacrificial patterns, and the non sacrificial layer in the cutting region. The sacrificial patterns may be replaced with electrodes. The related semiconductor memory device is also provided.