公开(公告)号：US08872350B2

公开(公告)日：2014-10-28

申请号：US13616549

申请日：2012-09-14

申请人： Shigenori Sawachi ,  Osamu Yamagata ,  Hiroshi Inoue ,  Satoru Itakura ,  Tomoshige Chikai ,  Masahiko Hori ,  Akio Katsumata

发明人： Shigenori Sawachi ,  Osamu Yamagata ,  Hiroshi Inoue ,  Satoru Itakura ,  Tomoshige Chikai ,  Masahiko Hori ,  Akio Katsumata

IPC分类号： H01L23/48 ,  H01L23/495 ,  H01L23/02 ,  H01L23/52

CPC分类号： H01L25/0657 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06135 ,  H01L2224/12105 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/92244 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device containing: a semiconductor element; a support substrate; an insulating material layer for sealing the semiconductor element and a periphery thereof; a metal thin film wiring layer provided in the insulating material layer, with a part thereof being exposed on an external surface; and metal vias provided in the insulating material layer and electrically connected to the metal thin film wiring layer. The semiconductor element is provided in a plurality of units and the respective semiconductor elements are stacked via an insulating material such that a circuit surface of each semiconductor element faces the metal thin film wiring layer, and electrode pads of each semiconductor element are exposed without being hidden by the semiconductor element stacked thereabove.

摘要翻译： 一种半导体器件，包括：半导体元件; 支撑基板; 用于密封半导体元件的绝缘材料层及其周边; 设置在所述绝缘材料层中的金属薄膜布线层，其一部分露出在外表面上; 以及设置在绝缘材料层中并电连接到金属薄膜布线层的金属通孔。 半导体元件设置在多个单元中，并且各个半导体元件经由绝缘材料层叠，使得每个半导体元件的电路表面面对金属薄膜布线层，并且每个半导体元件的电极焊盘暴露而不被隐藏 通过堆叠在其上的半导体元件。

公开(公告)号：US20130026650A1

公开(公告)日：2013-01-31

申请号：US13556448

申请日：2012-07-24

申请人： Osamu Yamagata ,  Akio Katsumata ,  Hiroshi Inoue ,  Shigenori Sawachi ,  Satoru Itakura ,  Yasuhiro Yamaji

发明人： Osamu Yamagata ,  Akio Katsumata ,  Hiroshi Inoue ,  Shigenori Sawachi ,  Satoru Itakura ,  Yasuhiro Yamaji

IPC分类号： H01L23/48 ,  H01L21/50 ,  H01L21/78

CPC分类号： H01L24/97 ,  H01L24/19 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24226 ,  H01L2224/2518 ,  H01L2224/29099 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/0951 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/1579 ,  H01L2924/15798 ,  H01L2924/00014 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor device is made up of an organic substrate; through vias which penetrate the organic substrate in its thickness direction; external electrodes and internal electrodes provided to the front and back faces of the organic substrate and electrically connected to the through vias; a semiconductor element mounted on one main surface of the organic substrate via a bonding layer, with an element circuit surface thereof facing upward; an insulating material layer for sealing the semiconductor element and a periphery thereof; a metal thin film wiring layer provided in the insulating material layer, with a part of this metal thin film wiring layer being exposed on an external surface; metal vias provided in the insulating material layer and electrically connected to the metal thin film wiring layer; and external electrodes formed on the metal thin film wiring layer.

摘要翻译： 半导体器件由有机基片构成; 贯穿有机基板的厚度方向的通孔; 外部电极和内部电极，设置在有机基板的前表面和后表面上并电连接到通孔; 半导体元件经由接合层安装在有机基板的一个主表面上，其元件电路表面朝上; 用于密封半导体元件的绝缘材料层及其周边; 设置在所述绝缘材料层中的金属薄膜布线层，所述金属薄膜布线层的一部分露出在外表面上; 金属通孔，设置在绝缘材料层中并电连接到金属薄膜布线层; 以及形成在金属薄膜布线层上的外部电极。

公开(公告)号：US09196507B1

公开(公告)日：2015-11-24

申请号：US14807193

申请日：2015-07-23

申请人： Hiroshi Inoue ,  Akio Katsumata ,  Shigenori Sawachi ,  Osamu Yamagata

发明人： Hiroshi Inoue ,  Akio Katsumata ,  Shigenori Sawachi ,  Osamu Yamagata

IPC分类号： H01L21/00 ,  H01L23/02 ,  H01L21/48 ,  H01L21/82 ,  H01L23/00

CPC分类号： H01L21/486 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/82 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method of manufacturing a semiconductor device having an insulating substrate, a semiconductor element which is mounted on one main surface of the insulating substrate via adhesive, with an element circuit surface of the semiconductor element facing upwards, a first insulating material layer (A) which seals the element circuit surface of the semiconductor element and the insulating substrate peripheral thereto, a first metal thin film wire layer provided on the first insulating material layer (A) and a portion of which is exposed to an external surface, a first insulating material layer (B) provided on the first metal thin film wire layer, a second insulating material layer provided on a main surface of the insulating substrate where the semiconductor element is not mounted, a second metal thin film wire layer provided inside the second insulating material layer.

摘要翻译： 一种制造具有绝缘基板的半导体器件的方法，半导体元件，其通过粘合剂安装在绝缘基板的一个主表面上，半导体元件的元件电路表面朝上，第一绝缘材料层（A），其 密封半导体元件的元件电路表面和周围的绝缘基板，设置在第一绝缘材料层（A）上并且其一部分暴露于外表面的第一金属薄膜线层，第一绝缘材料层 （B），设置在绝缘基板的未安装半导体元件的主表面上的第二绝缘材料层，设置在第二绝缘材料层内部的第二金属薄膜线层。

公开(公告)号：US09147671B2

公开(公告)日：2015-09-29

申请号：US14190885

申请日：2014-02-26

申请人： Hiroshi Inoue ,  Akio Katsumata ,  Shigenori Sawachi ,  Osamu Yamagata

发明人： Hiroshi Inoue ,  Akio Katsumata ,  Shigenori Sawachi ,  Osamu Yamagata

IPC分类号： H01L23/02 ,  H01L21/00 ,  H01L25/065 ,  H01L23/538 ,  H01L23/13 ,  H01L21/82 ,  H01L25/00

CPC分类号： H01L21/486 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/82 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor device, having an insulating substrate; a semiconductor element which is mounted on one main surface of the insulating substrate via adhesive, with an element circuit surface of the semiconductor element facing upwards; a first insulating material layer which seals the element circuit surface of the semiconductor element and the insulating substrate peripheral thereto; a first metal thin film wire layer which is provided on the first insulating material layer (A) and a portion of which is exposed to an external surface; a first insulating material layer (B) which is provided on the first metal thin film wire layer; a second insulating material layer which is provided on a main surface of the insulating substrate where the semiconductor element is not mounted; and a second metal thin film wire layer which is provided inside the second insulating material layer.

摘要翻译： 一种半导体器件，具有绝缘基板; 半导体元件，其通过粘合剂安装在绝缘基板的一个主表面上，半导体元件的元件电路表面朝上; 第一绝缘材料层，其密封半导体元件的元件电路表面和周边的绝缘基板; 第一金属薄膜线层，其设置在第一绝缘材料层（A）上并且其一部分暴露于外表面; 设置在第一金属薄膜线层上的第一绝缘材料层（B）; 第二绝缘材料层，设置在绝缘基板的未安装半导体元件的主表面上; 以及设置在第二绝缘材料层内部的第二金属薄膜线层。

公开(公告)号：US20100213599A1

公开(公告)日：2010-08-26

申请号：US12704094

申请日：2010-02-11

申请人： Kazuhiro Watanabe ,  Seiki Takata ,  Toshitsune Iijima ,  Tomomi Sato ,  Shigenori Sawachi ,  Takumi Kawana ,  Osamu Yamagata ,  Hiroshi Nomura ,  Yumiko Oshima

发明人： Kazuhiro Watanabe ,  Seiki Takata ,  Toshitsune Iijima ,  Tomomi Sato ,  Shigenori Sawachi ,  Takumi Kawana ,  Osamu Yamagata ,  Hiroshi Nomura ,  Yumiko Oshima

IPC分类号： H01L23/498 ,  H01L21/60

CPC分类号： H01L24/83 ,  H01L23/13 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/24227 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/8385 ,  H01L2224/83951 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor device includes: a flat plate; a semiconductor chip which is disposed on one main surface of the flat plate and whose surface opposite an element circuit surface is fixedly bonded; a single layer of an insulating material layer formed continuously on the element circuit surface of the semiconductor chip and on the main surface of the flat plate; an opening formed at a position, in the insulating material layer, above an electrode disposed on the element circuit surface of the semiconductor chip; a conductive part formed in the opening so as to be connected to the electrode of the semiconductor chip; a wiring layer formed on the insulating material layer so as to be connected to the conductive part, and partly led out to a peripheral area of the semiconductor chip; and external electrodes formed on the wiring layer. Also adoptable is a structure in which a flat plate having a cavity is used, a semiconductor chip is disposed in the cavity, and an insulating material layer is filled and formed in a gap in the cavity. A semiconductor device high in yields and connection reliability, adaptable to a microscopic pitch of electrodes of a semiconductor chip, and excellent in electric characteristic is obtained at low cost.

摘要翻译： 半导体器件包括：平板; 半导体芯片，其设置在平板的一个主表面上，并且与元件电路表面相对的表面固定地接合; 在半导体芯片的元件电路表面上和平板主表面上连续形成的单层绝缘材料层; 在所述绝缘材料层的位置形成有设置在所述半导体芯片的元件电路面上的电极的上方的开口部; 形成在所述开口中以与半导体芯片的电极连接的导电部分; 布线层，形成在所述绝缘材料层上，以连接到所述导电部分，并且部分地引导到所述半导体芯片的周边区域; 以及形成在布线层上的外部电极。 还可以采用的是其中使用具有空腔的平板的结构，在空腔中设置半导体芯片，并且在空腔中的间隙中填充并形成绝缘材料层。 以低成本获得了可以适应于半导体芯片的电极的微观间距和优异的电特性的高产率和连接可靠性的半导体器件。

公开(公告)号：US20100032833A1

公开(公告)日：2010-02-11

申请号：US12535775

申请日：2009-08-05

申请人： Kiichiro Higaki ,  Koichi Sugihara ,  Katsuya Murakami ,  Shigenori Sawachi ,  Mitsuru Oida

发明人： Kiichiro Higaki ,  Koichi Sugihara ,  Katsuya Murakami ,  Shigenori Sawachi ,  Mitsuru Oida

IPC分类号： H01L23/498 ,  H01L21/60

CPC分类号： H05K3/4015 ,  H01L21/563 ,  H01L23/3171 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05555 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/81101 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12044 ,  H01L2924/351 ,  H05K3/325 ,  H05K3/328 ,  H05K3/3457 ,  H05K2201/0367 ,  H05K2201/10734 ,  H05K2203/049 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor chip of a multilayer wiring structure having an insulating film formed on a surface thereof, multiple electrode pads formed at a central part and an outer peripheral part of the insulating film, and multiple protective metal layers formed respectively on the electrode pads. The semiconductor device also includes a substrate having the semiconductor chip mounted thereon and including multiple substrate terminals formed on a surface thereof respectively in positions corresponding to the electrode pads. The semiconductor chip is mounted on the substrate by connecting a stud bump to a solder bump. The stud bump is formed on any one of each of the protective metal layers and each of the substrate terminals and the solder bump is formed on the other one of each of the protective metal layers and each of the substrate terminals.

摘要翻译： 一种半导体器件包括：在其表面上形成有绝缘膜的多层布线结构的半导体芯片，形成在绝缘膜的中心部分和外周部分的多个电极焊盘，以及分别形成在电极上的多个保护金属层 垫 半导体器件还包括其上安装有半导体芯片并且分别在其表面上形成的多个基板端子的对应于电极焊盘的位置的基板。 通过将柱形凸块连接到焊料凸块来将半导体芯片安装在基板上。 在每个保护金属层中的任一个上形成螺柱凸块，并且在每个保护金属层和每个基板端子中的另一个上形成每个基板端子和焊料凸块。

公开(公告)号：US08618657B2

公开(公告)日：2013-12-31

申请号：US12535775

申请日：2009-08-05

申请人： Kiichiro Higaki ,  Koichi Sugihara ,  Katsuya Murakami ,  Shigenori Sawachi ,  Mitsuru Oida

发明人： Kiichiro Higaki ,  Koichi Sugihara ,  Katsuya Murakami ,  Shigenori Sawachi ,  Mitsuru Oida

IPC分类号： H01L23/498 ,  H01L21/60

CPC分类号： H05K3/4015 ,  H01L21/563 ,  H01L23/3171 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05555 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/1134 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/81101 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12044 ,  H01L2924/351 ,  H05K3/325 ,  H05K3/328 ,  H05K3/3457 ,  H05K2201/0367 ,  H05K2201/10734 ,  H05K2203/049 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor device includes a semiconductor chip of a multilayer wiring structure having an insulating film formed on a surface thereof, multiple electrode pads formed at a central part and an outer peripheral part of the insulating film, and multiple protective metal layers formed respectively on the electrode pads. The semiconductor device also includes a substrate having the semiconductor chip mounted thereon and including multiple substrate terminals formed on a surface thereof respectively in positions corresponding to the electrode pads. The semiconductor chip is mounted on the substrate by connecting a stud bump to a solder bump. The stud bump is formed on any one of each of the protective metal layers and each of the substrate terminals and the solder bump is formed on the other one of each of the protective metal layers and each of the substrate terminals.

摘要翻译： 一种半导体器件包括：在其表面上形成有绝缘膜的多层布线结构的半导体芯片，形成在绝缘膜的中心部分和外周部分的多个电极焊盘，以及分别形成在电极上的多个保护金属层 垫 半导体器件还包括其上安装有半导体芯片并且分别在其表面上形成的多个基板端子的对应于电极焊盘的位置的基板。 通过将柱形凸块连接到焊料凸块来将半导体芯片安装在基板上。 在每个保护金属层中的任一个上形成螺柱凸块，并且在每个保护金属层和每个基板端子中的另一个上形成每个基板端子和焊料凸块。