公开(公告)号：US20130026650A1

公开(公告)日：2013-01-31

申请号：US13556448

申请日：2012-07-24

申请人： Osamu Yamagata ,  Akio Katsumata ,  Hiroshi Inoue ,  Shigenori Sawachi ,  Satoru Itakura ,  Yasuhiro Yamaji

发明人： Osamu Yamagata ,  Akio Katsumata ,  Hiroshi Inoue ,  Shigenori Sawachi ,  Satoru Itakura ,  Yasuhiro Yamaji

IPC分类号： H01L23/48 ,  H01L21/50 ,  H01L21/78

CPC分类号： H01L24/97 ,  H01L24/19 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/24226 ,  H01L2224/2518 ,  H01L2224/29099 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/0951 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/1579 ,  H01L2924/15798 ,  H01L2924/00014 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor device is made up of an organic substrate; through vias which penetrate the organic substrate in its thickness direction; external electrodes and internal electrodes provided to the front and back faces of the organic substrate and electrically connected to the through vias; a semiconductor element mounted on one main surface of the organic substrate via a bonding layer, with an element circuit surface thereof facing upward; an insulating material layer for sealing the semiconductor element and a periphery thereof; a metal thin film wiring layer provided in the insulating material layer, with a part of this metal thin film wiring layer being exposed on an external surface; metal vias provided in the insulating material layer and electrically connected to the metal thin film wiring layer; and external electrodes formed on the metal thin film wiring layer.

摘要翻译： 半导体器件由有机基片构成; 贯穿有机基板的厚度方向的通孔; 外部电极和内部电极，设置在有机基板的前表面和后表面上并电连接到通孔; 半导体元件经由接合层安装在有机基板的一个主表面上，其元件电路表面朝上; 用于密封半导体元件的绝缘材料层及其周边; 设置在所述绝缘材料层中的金属薄膜布线层，所述金属薄膜布线层的一部分露出在外表面上; 金属通孔，设置在绝缘材料层中并电连接到金属薄膜布线层; 以及形成在金属薄膜布线层上的外部电极。

公开(公告)号：US20130200523A1

公开(公告)日：2013-08-08

申请号：US13616549

申请日：2012-09-14

申请人： Shigenori SAWACHI ,  Osamu Yamagata ,  Hiroshi Inoue ,  Satoru Itakura ,  Tomoshige Chikai ,  Masahiko Hori ,  Akio Katsumata

发明人： Shigenori SAWACHI ,  Osamu Yamagata ,  Hiroshi Inoue ,  Satoru Itakura ,  Tomoshige Chikai ,  Masahiko Hori ,  Akio Katsumata

IPC分类号： H01L23/48 ,  H01L21/50

CPC分类号： H01L25/0657 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06135 ,  H01L2224/12105 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/92244 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device containing: a semiconductor element; a support substrate; an insulating material layer for sealing the semiconductor element and a periphery thereof; a metal thin film wiring layer provided in the insulating material layer, with a part thereof being exposed on an external surface; and metal vias provided in the insulating material layer and electrically connected to the metal thin film wiring layer. The semiconductor element is provided in a plurality of units and the respective semiconductor elements are stacked via an insulating material such that a circuit surface of each semiconductor element faces the metal thin film wiring layer, and electrode pads of each semiconductor element are exposed without being hidden by the semiconductor element stacked thereabove.

摘要翻译： 一种半导体器件，包括：半导体元件; 支撑基板; 用于密封半导体元件的绝缘材料层及其周边; 设置在所述绝缘材料层中的金属薄膜布线层，其一部分露出在外表面上; 以及设置在绝缘材料层中并电连接到金属薄膜布线层的金属通孔。 半导体元件设置在多个单元中，并且各个半导体元件经由绝缘材料层叠，使得每个半导体元件的电路表面面对金属薄膜布线层，并且每个半导体元件的电极焊盘暴露而不被隐藏 通过堆叠在其上的半导体元件。

公开(公告)号：US08872350B2

公开(公告)日：2014-10-28

申请号：US13616549

申请日：2012-09-14

申请人： Shigenori Sawachi ,  Osamu Yamagata ,  Hiroshi Inoue ,  Satoru Itakura ,  Tomoshige Chikai ,  Masahiko Hori ,  Akio Katsumata

发明人： Shigenori Sawachi ,  Osamu Yamagata ,  Hiroshi Inoue ,  Satoru Itakura ,  Tomoshige Chikai ,  Masahiko Hori ,  Akio Katsumata

IPC分类号： H01L23/48 ,  H01L23/495 ,  H01L23/02 ,  H01L23/52

CPC分类号： H01L25/0657 ,  H01L23/49816 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06135 ,  H01L2224/12105 ,  H01L2224/24226 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82031 ,  H01L2224/82039 ,  H01L2224/92244 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device containing: a semiconductor element; a support substrate; an insulating material layer for sealing the semiconductor element and a periphery thereof; a metal thin film wiring layer provided in the insulating material layer, with a part thereof being exposed on an external surface; and metal vias provided in the insulating material layer and electrically connected to the metal thin film wiring layer. The semiconductor element is provided in a plurality of units and the respective semiconductor elements are stacked via an insulating material such that a circuit surface of each semiconductor element faces the metal thin film wiring layer, and electrode pads of each semiconductor element are exposed without being hidden by the semiconductor element stacked thereabove.

摘要翻译： 一种半导体器件，包括：半导体元件; 支撑基板; 用于密封半导体元件的绝缘材料层及其周边; 设置在所述绝缘材料层中的金属薄膜布线层，其一部分露出在外表面上; 以及设置在绝缘材料层中并电连接到金属薄膜布线层的金属通孔。 半导体元件设置在多个单元中，并且各个半导体元件经由绝缘材料层叠，使得每个半导体元件的电路表面面对金属薄膜布线层，并且每个半导体元件的电极焊盘暴露而不被隐藏 通过堆叠在其上的半导体元件。

公开(公告)号：US09196507B1

公开(公告)日：2015-11-24

申请号：US14807193

申请日：2015-07-23

申请人： Hiroshi Inoue ,  Akio Katsumata ,  Shigenori Sawachi ,  Osamu Yamagata

发明人： Hiroshi Inoue ,  Akio Katsumata ,  Shigenori Sawachi ,  Osamu Yamagata

IPC分类号： H01L21/00 ,  H01L23/02 ,  H01L21/48 ,  H01L21/82 ,  H01L23/00

CPC分类号： H01L21/486 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/82 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method of manufacturing a semiconductor device having an insulating substrate, a semiconductor element which is mounted on one main surface of the insulating substrate via adhesive, with an element circuit surface of the semiconductor element facing upwards, a first insulating material layer (A) which seals the element circuit surface of the semiconductor element and the insulating substrate peripheral thereto, a first metal thin film wire layer provided on the first insulating material layer (A) and a portion of which is exposed to an external surface, a first insulating material layer (B) provided on the first metal thin film wire layer, a second insulating material layer provided on a main surface of the insulating substrate where the semiconductor element is not mounted, a second metal thin film wire layer provided inside the second insulating material layer.

摘要翻译： 一种制造具有绝缘基板的半导体器件的方法，半导体元件，其通过粘合剂安装在绝缘基板的一个主表面上，半导体元件的元件电路表面朝上，第一绝缘材料层（A），其 密封半导体元件的元件电路表面和周围的绝缘基板，设置在第一绝缘材料层（A）上并且其一部分暴露于外表面的第一金属薄膜线层，第一绝缘材料层 （B），设置在绝缘基板的未安装半导体元件的主表面上的第二绝缘材料层，设置在第二绝缘材料层内部的第二金属薄膜线层。

公开(公告)号：US09147671B2

公开(公告)日：2015-09-29

申请号：US14190885

申请日：2014-02-26

申请人： Hiroshi Inoue ,  Akio Katsumata ,  Shigenori Sawachi ,  Osamu Yamagata

发明人： Hiroshi Inoue ,  Akio Katsumata ,  Shigenori Sawachi ,  Osamu Yamagata

IPC分类号： H01L23/02 ,  H01L21/00 ,  H01L25/065 ,  H01L23/538 ,  H01L23/13 ,  H01L21/82 ,  H01L25/00

CPC分类号： H01L21/486 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/82 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor device, having an insulating substrate; a semiconductor element which is mounted on one main surface of the insulating substrate via adhesive, with an element circuit surface of the semiconductor element facing upwards; a first insulating material layer which seals the element circuit surface of the semiconductor element and the insulating substrate peripheral thereto; a first metal thin film wire layer which is provided on the first insulating material layer (A) and a portion of which is exposed to an external surface; a first insulating material layer (B) which is provided on the first metal thin film wire layer; a second insulating material layer which is provided on a main surface of the insulating substrate where the semiconductor element is not mounted; and a second metal thin film wire layer which is provided inside the second insulating material layer.

摘要翻译： 一种半导体器件，具有绝缘基板; 半导体元件，其通过粘合剂安装在绝缘基板的一个主表面上，半导体元件的元件电路表面朝上; 第一绝缘材料层，其密封半导体元件的元件电路表面和周边的绝缘基板; 第一金属薄膜线层，其设置在第一绝缘材料层（A）上并且其一部分暴露于外表面; 设置在第一金属薄膜线层上的第一绝缘材料层（B）; 第二绝缘材料层，设置在绝缘基板的未安装半导体元件的主表面上; 以及设置在第二绝缘材料层内部的第二金属薄膜线层。

公开(公告)号：US20100213599A1

公开(公告)日：2010-08-26

申请号：US12704094

申请日：2010-02-11

申请人： Kazuhiro Watanabe ,  Seiki Takata ,  Toshitsune Iijima ,  Tomomi Sato ,  Shigenori Sawachi ,  Takumi Kawana ,  Osamu Yamagata ,  Hiroshi Nomura ,  Yumiko Oshima

发明人： Kazuhiro Watanabe ,  Seiki Takata ,  Toshitsune Iijima ,  Tomomi Sato ,  Shigenori Sawachi ,  Takumi Kawana ,  Osamu Yamagata ,  Hiroshi Nomura ,  Yumiko Oshima

IPC分类号： H01L23/498 ,  H01L21/60

CPC分类号： H01L24/83 ,  H01L23/13 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/32 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2224/24227 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/8385 ,  H01L2224/83951 ,  H01L2224/92 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/06524 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor device includes: a flat plate; a semiconductor chip which is disposed on one main surface of the flat plate and whose surface opposite an element circuit surface is fixedly bonded; a single layer of an insulating material layer formed continuously on the element circuit surface of the semiconductor chip and on the main surface of the flat plate; an opening formed at a position, in the insulating material layer, above an electrode disposed on the element circuit surface of the semiconductor chip; a conductive part formed in the opening so as to be connected to the electrode of the semiconductor chip; a wiring layer formed on the insulating material layer so as to be connected to the conductive part, and partly led out to a peripheral area of the semiconductor chip; and external electrodes formed on the wiring layer. Also adoptable is a structure in which a flat plate having a cavity is used, a semiconductor chip is disposed in the cavity, and an insulating material layer is filled and formed in a gap in the cavity. A semiconductor device high in yields and connection reliability, adaptable to a microscopic pitch of electrodes of a semiconductor chip, and excellent in electric characteristic is obtained at low cost.

摘要翻译： 半导体器件包括：平板; 半导体芯片，其设置在平板的一个主表面上，并且与元件电路表面相对的表面固定地接合; 在半导体芯片的元件电路表面上和平板主表面上连续形成的单层绝缘材料层; 在所述绝缘材料层的位置形成有设置在所述半导体芯片的元件电路面上的电极的上方的开口部; 形成在所述开口中以与半导体芯片的电极连接的导电部分; 布线层，形成在所述绝缘材料层上，以连接到所述导电部分，并且部分地引导到所述半导体芯片的周边区域; 以及形成在布线层上的外部电极。 还可以采用的是其中使用具有空腔的平板的结构，在空腔中设置半导体芯片，并且在空腔中的间隙中填充并形成绝缘材料层。 以低成本获得了可以适应于半导体芯片的电极的微观间距和优异的电特性的高产率和连接可靠性的半导体器件。

公开(公告)号：US07462511B2

公开(公告)日：2008-12-09

申请号：US11330155

申请日：2006-01-12

申请人： Osamu Yamagata

发明人： Osamu Yamagata

IPC分类号： H01L21/44 ,  H01L21/48

CPC分类号： H01L24/10 ,  H01L23/3114 ,  H01L23/5283 ,  H01L23/562 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01021 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2224/13099 ,  H01L2224/11 ,  H01L2924/00 ,  H01L2924/00014

摘要： A SiP type semiconductor device and a method of producing the same is provided wherein curvature of a wafer is suppressed in the production steps, workability does not decline, and high throughput can be attained. An insulation layer is formed by stacking a plurality of resin layers on a semiconductor substrate, wiring layers are formed by being buried in the insulation layer so as to be connected to an electronic circuit, an insulating buffer layer is formed on the insulation layer, a conductive post is formed through the buffer layer and connected to the wiring layer, and a projecting electrode is formed projecting from a surface of the buffer layer and connected to the conductive post.

摘要翻译： 提供了一种SiP型半导体器件及其制造方法，其在制造步骤中抑制晶片的曲率，可加工性不下降，并且可以实现高生产率。 通过在半导体衬底上堆叠多个树脂层形成绝缘层，通过埋在绝缘层中形成布线层，以连接到电子电路，在绝缘层上形成绝缘缓冲层， 导电柱通过缓冲层形成并连接到布线层，并且突出电极形成为从缓冲层的表面突出并连接到导电柱。

公开(公告)号：US20070246165A1

公开(公告)日：2007-10-25

申请号：US11589130

申请日：2006-10-30

申请人： Osamu Yamagata

发明人： Osamu Yamagata

IPC分类号： G03D15/04

CPC分类号： H01L24/27 ,  H01L21/67132 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/2919 ,  H01L2224/83101 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/00

摘要： A method of producing a semiconductor package enabling a sheet-like adhesive film to be used as it is and thereby reducing loss and enabling mounting without the piece of adhesive film sticking out from the semiconductor chip, comprising forming cutting-off notches in an adhesive film provided on a support film from the adhesive film side down to the surface of the support film or a depth D in the middle and cutting the adhesive film to pieces of predetermined size, then stretching the support film to separate the cut individual piece of the adhesive film, attaching semiconductor chip to the cut individual piece of the adhesive film, and mounting the semiconductor chip on a substrate by the piece of adhesive film, and an apparatus for producing a semiconductor package and adhesive film for use with that method.

公开(公告)号：US20060118959A1

公开(公告)日：2006-06-08

申请号：US11330155

申请日：2006-01-12

申请人： Osamu Yamagata

发明人： Osamu Yamagata

IPC分类号： H01L23/52

CPC分类号： H01L24/10 ,  H01L23/3114 ,  H01L23/5283 ,  H01L23/562 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13022 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01021 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2224/13099 ,  H01L2224/11 ,  H01L2924/00 ,  H01L2924/00014

摘要： A SiP type semiconductor device and a method of producing the same is provided wherein curvature of a wafer is suppressed in the production steps, workability does not decline, and high throughput can be attained. An insulation layer is formed by stacking a plurality of resin layers on a semiconductor substrate, wiring layers are formed by being buried in the insulation layer so as to be connected to an electronic circuit, an insulating buffer layer is formed on the insulation layer, a conductive post is formed through the buffer layer and connected to the wiring layer, and a projecting electrode is formed projecting from a surface of the buffer layer and connected to the conductive post.

摘要翻译： 提供了一种SiP型半导体器件及其制造方法，其在制造步骤中抑制晶片的曲率，可加工性不下降，并且可以实现高生产率。 通过在半导体衬底上堆叠多个树脂层形成绝缘层，通过埋在绝缘层中形成布线层，以连接到电子电路，在绝缘层上形成绝缘缓冲层， 导电柱通过缓冲层形成并连接到布线层，并且突出电极形成为从缓冲层的表面突出并连接到导电柱。

公开(公告)号：US20050093095A1

公开(公告)日：2005-05-05

申请号：US10998651

申请日：2004-11-30

申请人： Osamu Yamagata

发明人： Osamu Yamagata

IPC分类号： H01L23/12 ,  H01L23/50 ,  H01L23/538 ,  H01L25/04 ,  H01L25/065 ,  H01L25/18 ,  H01L21/44

CPC分类号： H01L23/645 ,  H01L23/50 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L25/0652 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05548 ,  H01L2224/16225 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/85399 ,  H01L2224/45099 ,  H01L2224/05647 ,  H01L2224/05099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A SiP (System-in-Package) having large-capacity passive elements incorporated therein or mounted thereon is provided. On an interposer made of a silicon substrate, metal substrate or glass substrate having via-holes formed therein, IC chips, or a plurality of chips, passive elements formed on a silicon substrate, metal substrate or glass substrate, are mounted in a face-up manner and re-wired en bloc on the chip. Because all of the silicon substrate, metal substrate and glass substrate are durable against high-temperature annealing for crystallizing a high-dielectric-constant material, large-capacity passive elements can be formed on the substrate which serves as an interposer or on the re-wiring of the chips to be mounted. It is also allowable that large-capacity passive elements formed on the silicon substrate, metal substrate or glass substrate is divided into chips, and that the resultant chips are mounted together with the IC chips.

摘要翻译： 提供了具有并入其中或安装在其上的大容量无源元件的SiP（系统级封装）。 在由硅基板，具有形成有通孔的金属基板或玻璃基板的内插件，形成在硅基板，金属基板或玻璃基板上的无芯元件，IC芯片或多个芯片安装在面板上， 在芯片上整体重新布线。 因为所有的硅衬底，金属衬底和玻璃衬底都耐高温退火以使高介电常数材料结晶，所以可以在用作插入件的衬底上或者重新形成大尺寸的无源元件， 要安装的芯片的接线。 也可以将形成在硅基板，金属基板或玻璃基板上的大容量无源元件分割成芯片，并且将所得芯片与IC芯片一起安装。