公开(公告)号：US06391797B1

公开(公告)日：2002-05-21

申请号：US08923246

申请日：1997-09-04

Applicant: Shinobu Takehiro ,  Satoshi Yamauchi ,  Masaki Yoshimaru

Inventor： Shinobu Takehiro ,  Satoshi Yamauchi ,  Masaki Yoshimaru

IPC: H01L2120

CPC classification number: H01L21/02197 ,  H01L21/02266 ,  H01L21/31691 ,  H01L28/55

Abstract: A method of manufacturing a semiconductor device, comprises the following steps of growing a dielectric film made of a dielectric material whose dielectric constant is improved by crystallization thereof, on a semiconductor substrate to utilize the dielectric film as a capacitor film, and applying a voltage to the semiconductor substrate in a plasma atmosphere to increase a grown interface temperature by “dielectric heating” upon growth of the dielectric film

Abstract translation: 一种制造半导体器件的方法，包括以下步骤：在半导体衬底上生长由电介质材料制成的电介质材料，其介电常数通过结晶而改善，以利用电介质膜作为电容器膜，并将电压施加到 半导体衬底在等离子体气氛中，通过在电介质膜生长时通过“电介质加热”来增加生长的界面温度

公开(公告)号：US5940677A

公开(公告)日：1999-08-17

申请号：US81562

申请日：1998-05-19

Applicant: Satoshi Yamauchi ,  Shinobu Takehiro ,  Masaki Yoshimaru

Inventor： Satoshi Yamauchi ,  Shinobu Takehiro ,  Masaki Yoshimaru

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/311 ,  H01L21/314 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108

CPC classification number: H01L27/10852 ,  H01L21/31111 ,  H01L28/55

Abstract: In a process where a capacitor using a BST film for a dielectric film is incorporated into a DRAM, the film is selectively removed by wet etching for forming a contact hole. For this purpose, a bottom electrode is formed and then an amorphous film is formed on the entire surface of a silicon wafer. And after forming a crystalline top electrode on this film, lamp heating is performed to crystallize only the area that is in contact with the electrode. Then wet etching is performed using a solution of hydrogen and ammonium fluoride (1:2), which allows removing only the amorphous area selectively.

Abstract translation: 在使用用于电介质膜的BST膜的电容器被并入到DRAM中的过程中，通过用于形成接触孔的湿蚀刻选择性地去除膜。 为此，形成底电极，然后在硅晶片的整个表面上形成非晶膜。 并且在该膜上形成晶体顶部电极之后，进行灯加热仅结晶与电极接触的区域。 然后使用氢和氟化铵（1：2）的溶液进行湿蚀刻，其仅允许仅选择性地去除非晶区域。

公开(公告)号：US06284587B1

公开(公告)日：2001-09-04

申请号：US09081567

申请日：1998-05-19

Applicant: Satoshi Yamauchi ,  Shinobu Takehiro ,  Masaki Yoshimaru

Inventor： Satoshi Yamauchi ,  Shinobu Takehiro ,  Masaki Yoshimaru

IPC: H01L218242

CPC classification number: H01L28/40 ,  H01L21/31683 ,  H01L21/76888 ,  H01L27/10852 ,  H01L28/60

Abstract: In the fabrication of capacitors, a TiO2 film is formed from a TiN film by means of heat-treatment within an atmosphere which does not contain oxygen. This serves to prevent the polysilicon which forms the bottom electrode from being oxidized during heat-treatment. Thus, once the bottom electrode has been formed on the silicon wafer, a TiN film and RuO2 film are formed, and the silicon wafer is heat-treated in an atmosphere which does not contain oxygen. In this manner, a dielectric film that is a TiO2 film and a top electrode that is a ruthenium film are obtained.

Abstract translation: 在电容器的制造中，通过在不含氧的气氛中进行热处理，由TiN膜形成TiO 2膜。 这用于防止形成底部电极的多晶硅在热处理期间被氧化。 因此，一旦在硅晶片上形成底部电极，就形成TiN膜和RuO 2膜，并且在不含氧的气氛中对硅晶片进行热处理。 以这种方式，获得作为TiO 2膜的电介质膜和作为钌膜的顶部电极。

公开(公告)号：US06403441B1

公开(公告)日：2002-06-11

申请号：US09291306

申请日：1999-04-15

Applicant: Shinobu Takehiro ,  Masaki Yoshimaru

Inventor： Shinobu Takehiro ,  Masaki Yoshimaru

IPC: H01L2120

CPC classification number: H01L28/56 ,  H01L28/60

Abstract: A method for manufacturing a semiconductor device by laminating a plurality of ruthenium-type conductive electrodes and a dielectric film having a perovskite structure, includes forming a first conductive electrode at the semiconductor substrate, forming a first area where elements constituting the first conductive electrodes and elements constituting a first dielectric film are melded, forming a transitional layer by performing a heat treatment on the first meld area within a non-oxidizing atmosphere and forming the first dielectric film on the first conductive electrode. Accordingly, a transitional layer having a consistent composition can be formed with a high degree of efficiency at the interface of the ruthenium-type electrode and the dielectric substance having a perovskite structure, so that a capacitor structure employing a very thin dielectric film having a high dielectric constant can be produced with ease and at low cost.

Abstract translation: 一种通过层叠多个钌型导电电极和具有钙钛矿结构的电介质膜来制造半导体器件的方法，包括在半导体衬底处形成第一导电电极，形成构成第一导电电极和元件的元件的第一区域 构成第一电介质膜，通过对非氧化性气氛中的第一熔融区域进行热处理，在第一导电电极上形成第一电介质膜，形成过渡层。 因此，可以在钌型电极和具有钙钛矿结构的电介质的界面处以高效率形成具有一致组成的过渡层，从而使用具有高电位的非常薄的电介质膜的电容器结构 可以容易且低成本地制造介电常数。

公开(公告)号：US20110189849A1

公开(公告)日：2011-08-04

申请号：US13087026

申请日：2011-04-14

Applicant: Junichi KOIKE ,  Makoto Wada ,  Shingo Takahashi ,  Noriyoshi Shimizu ,  Hideki Shibata ,  Satoshi Nishikawa ,  Takamasa Usui ,  Hayato Nasu ,  Masaki Yoshimaru

Inventor： Junichi KOIKE ,  Makoto Wada ,  Shingo Takahashi ,  Noriyoshi Shimizu ,  Hideki Shibata ,  Satoshi Nishikawa ,  Takamasa Usui ,  Hayato Nasu ,  Masaki Yoshimaru

IPC: H01L21/768

CPC classification number: H01L21/76844 ,  H01L21/76831 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76867 ,  H01L21/76873 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device, including forming an opening in an interlevel insulating film disposed on a semiconductor substrate, forming an auxiliary film containing a predetermined metal element, to cover an inner surface of the opening, forming a main film to fill the opening after forming the auxiliary film, the main film containing, as a main component, Cu used as a material of an interconnection main layer, and performing a heat treatment before or after forming the main film, thereby diffusing the predetermined metal element of the auxiliary film onto a surface of the interlevel insulating film facing the auxiliary film, so as to form a barrier film on the interlevel insulating film within the opening, the barrier film containing, as a main component, a compound of the predetermined metal element with a component element of the interlevel insulating film.

Abstract translation: 一种制造半导体器件的方法，包括在设置在半导体衬底上的层间绝缘膜中形成开口，形成含有预定金属元素的辅助膜，以覆盖开口的内表面，形成主膜以填充开口 在形成辅助膜之后，主膜含有用作互连主层的材料的Cu，并且在形成主膜之前或之后进行热处理，从而扩散辅助膜的预定金属元素 在面向辅助膜的层间绝缘膜的表面上，以在开口内的层间绝缘膜上形成阻挡膜，所述阻挡膜以预定的金属元素与成分元素为主要成分， 的层间绝缘膜。

公开(公告)号：US07932508B2

公开(公告)日：2011-04-26

申请号：US12838985

申请日：2010-07-19

Applicant: Sumio Hosaka ,  Hayato Sone ,  Masaki Yoshimaru ,  Takashi Ono ,  Mayumi Nakasato

Inventor： Sumio Hosaka ,  Hayato Sone ,  Masaki Yoshimaru ,  Takashi Ono ,  Mayumi Nakasato

IPC: H01L29/02

CPC classification number: G11C11/5678 ,  G11C13/0004 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1226 ,  H01L45/144 ,  H01L45/148

Abstract: A multi-value recording phase-change memory device that can stably record multi-value information, and that can reproduce information with high reliability, comprises a first electrode layer 26, a second electrode layer 28, and a memory layer 30 provided between the first and second electrode layers 26 and 28 and containing a phase-change material layer formed from a phase-change material which is stable in either an amorphous phase or a crystalline phase at room temperature, wherein the memory layer 30 includes a plurality of mutually isolated sub-memory layers 32, 34, 36, and 38 between the first and second electrode layers 26 and 28.

Abstract translation: 可以稳定地记录多值信息并且可以高可靠性再现信息的多值记录相变存储器件包括：第一电极层26，第二电极层28和存储层30， 和第二电极层26和28，并且包含由在室温下在非晶相或结晶相中稳定的相变材料形成的相变材料层，其中存储层30包括多个相互隔离的子 内存层32,34,36和38在第一和第二电极层26和28之间。

公开(公告)号：US07838439B2

公开(公告)日：2010-11-23

申请号：US12146835

申请日：2008-06-26

Applicant: Masaharu Oshima ,  Haruhiko Takahashi ,  Koji Usuda ,  Ziyuan Liu ,  Liu Guo-lin ,  Kazuto Ikeda ,  Masaki Yoshimaru

Inventor： Masaharu Oshima ,  Haruhiko Takahashi ,  Koji Usuda ,  Ziyuan Liu ,  Liu Guo-lin ,  Kazuto Ikeda ,  Masaki Yoshimaru

IPC: H01L21/31 ,  H01L21/469 ,  H01L21/336

CPC classification number: H01L21/28176 ,  H01L21/28035 ,  H01L29/513 ,  H01L29/517

Abstract: A stacked film has an insulating film containing hafnium formed above a silicon layer and a polysilicon layer formed on the insulating film. The stacked film is heated in an atmosphere containing oxygen and nitrogen and having the total pressure approximately equal to a partial pressure of the nitrogen.

Abstract translation: 层叠膜具有在硅层上形成的含有铪的绝缘膜和形成在绝缘膜上的多晶硅层。 层叠的膜在含氧和氮气的气氛中加热，其总压力近似等于氮的分压。

公开(公告)号：US07782630B2

公开(公告)日：2010-08-24

申请号：US12222232

申请日：2008-08-05

Applicant: Naohiko Kajio ,  Masaki Yoshimaru

Inventor： Naohiko Kajio ,  Masaki Yoshimaru

IPC: H05K7/14

CPC classification number: H05K7/1492 ,  H05K1/0263 ,  H05K1/14 ,  H05K1/141 ,  H05K1/148 ,  H05K2201/044 ,  H05K2201/10272 ,  H05K2201/10287

Abstract: A second printed wiring board is opposed to a surface of the first printed wiring board. A support member supports the first and second printed wiring boards. A first connector is mounted on the first printed wiring board. A second connector is mounted on the second printed wiring board. A wiring connects the first printed wiring board to the second printed wiring board. The first and second connectors are separately mounted on the first and second printed wiring boards, respectively. The sizes of the first and second printed wiring boards can be reduced as compared with the case where connectors are arranged in a row on a single printed wiring board, for example. This results in a reduction in the size of the printed circuit board unit. A large number of the printed circuit board units can be coupled to the back panel.

Abstract translation: 第二印刷线路板与第一印刷线路板的表面相对。 支撑构件支撑第一和第二印刷线路板。 第一连接器安装在第一印刷线路板上。 第二连接器安装在第二印刷线路板上。 布线将第一印刷布线板连接到第二印刷布线板。 第一和第二连接器分别安装在第一和第二印刷电路板上。 与在单个印刷电路板上连接成排配置的情况相比，可以减小第一和第二印刷电路板的尺寸。 这导致印刷电路板单元的尺寸的减小。 大量印刷电路板单元可以耦合到后面板。

公开(公告)号：US20090057739A1

公开(公告)日：2009-03-05

申请号：US12230448

申请日：2008-08-28

Applicant: Hiroshi Iwai ,  Takeo Hattori ,  Kazuo Tsutsui ,  Kuniyuki Kakushima ,  Parhat Ahmet ,  Jaeyeol Song ,  Masaki Yoshimaru ,  Yasuyoshi Mishima ,  Tomonori Aoyama ,  Hiroshi Oji ,  Yoshitake Kato

Inventor： Hiroshi Iwai ,  Takeo Hattori ,  Kazuo Tsutsui ,  Kuniyuki Kakushima ,  Parhat Ahmet ,  Jaeyeol Song ,  Masaki Yoshimaru ,  Yasuyoshi Mishima ,  Tomonori Aoyama ,  Hiroshi Oji ,  Yoshitake Kato

IPC: H01L29/78 ,  H01L21/3205

CPC classification number: H01L29/517 ,  C23C14/021 ,  C23C14/024 ,  C23C14/08 ,  C23C14/18 ,  C23C14/30 ,  H01L21/28158 ,  H01L21/28255 ,  H01L21/31604 ,  H01L29/78

Abstract: The Ge channel device comprises: a Ge channel layer (2); a Si-containing interface layer (4) formed on the Ge channel layer (2); a La2O3 layer (6) formed on the interface layer (4); and an electrically conductive layer (8) formed on the La2O3 layer (6). In this device, the Si-containing interface layer (4) functions to suppress the diffusion of Ge atoms into the La2O3 layer (6) and thereby prevents the formation of Ge oxide in the La2O3 layer (6); accordingly, a Ge channel device whose C-V characteristic exhibits only a small hysteresis can be achieved.

Abstract translation: Ge沟道器件包括：Ge沟道层（2）; 形成在所述Ge沟道层（2）上的含Si界面层（4）; 在所述界面层（4）上形成的La 2 O 3层（6）; 和形成在La 2 O 3层（6）上的导电层（8）。 在该器件中，含Si界面层（4）用于抑制Ge原子扩散到La2O3层（6）中，从而防止La2O3层（6）中Ge氧化物的形成; 因此，可以实现其C-V特性仅具有小滞后的Ge通道器件。

公开(公告)号：US20080057704A1

公开(公告)日：2008-03-06

申请号：US11877243

申请日：2007-10-23

Applicant: Junichi Koike ,  Makoto Wada ,  Shingo Takahashi ,  Noriyoshi Shimizu ,  Hideki Shibata ,  Satoshi Nishikawa ,  Takamasa Usui ,  Hayato Nasu ,  Masaki Yoshimaru

Inventor： Junichi Koike ,  Makoto Wada ,  Shingo Takahashi ,  Noriyoshi Shimizu ,  Hideki Shibata ,  Satoshi Nishikawa ,  Takamasa Usui ,  Hayato Nasu ,  Masaki Yoshimaru

IPC: H01L21/4763

CPC classification number: H01L21/76844 ,  H01L21/76831 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76867 ,  H01L21/76873 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device, including forming an opening in an interlevel insulating film disposed on a semiconductor substrate, forming an auxiliary film containing a predetermined metal element, to cover an inner surface of the opening, forming a main film to fill the opening after forming the auxiliary film, the main film containing, as a main component, Cu used as a material of an interconnection main layer, and performing a heat treatment before or after forming the main film, thereby diffusing the predetermined metal element of the auxiliary film onto a surface of the interlevel insulating film facing the auxiliary film, so as to form a barrier film on the interlevel insulating film within the opening, the barrier film containing, as a main component, a compound of the predetermined metal element with a component element of the interlevel insulating film.

Abstract translation: 一种制造半导体器件的方法，包括在设置在半导体衬底上的层间绝缘膜中形成开口，形成含有预定金属元素的辅助膜，以覆盖开口的内表面，形成主膜以填充开口 在形成辅助膜之后，主膜含有用作互连主层的材料的Cu，并且在形成主膜之前或之后进行热处理，从而扩散辅助膜的预定金属元素 在面向辅助膜的层间绝缘膜的表面上，以在开口内的层间绝缘膜上形成阻挡膜，所述阻挡膜以预定的金属元素与成分元素为主要成分， 的层间绝缘膜。