公开(公告)号：US07002249B2

公开(公告)日：2006-02-21

申请号：US10294423

申请日：2002-11-12

申请人： Thomas P. Duffy ,  John Ryan Goodfellow ,  Robert T. Carroll ,  Kevin J. Cote ,  Sampath K. V. Karikalan ,  Suresh Golwalkar

发明人： Thomas P. Duffy ,  John Ryan Goodfellow ,  Robert T. Carroll ,  Kevin J. Cote ,  Sampath K. V. Karikalan ,  Suresh Golwalkar

IPC分类号： H01L23/495 ,  H01L27/02 ,  H01L23/48

CPC分类号： H01L24/85 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/50 ,  H01L24/05 ,  H01L24/06 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/4809 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48465 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/48799 ,  H01L2224/49052 ,  H01L2224/49111 ,  H01L2224/49113 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/49174 ,  H01L2224/49175 ,  H01L2224/49431 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01079 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10329 ,  H01L2924/10336 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  Y10S257/916 ,  H01L2924/01004 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45147 ,  H01L2924/0132 ,  H01L2924/2075 ,  H01L2924/013 ,  H01L2924/00013 ,  H01L2924/00011

摘要： A semiconductor device package is disclosed which includes inter-digitated input and output bond wires configured to increase the negative mutual inductive coupling between the wires, thus reducing the overall parasitic inductance of the device. In one embodiment, the microelectronic component includes a semiconductor device coupled to a substrate, such as a lead frame, a first set of bond wires connected to the semiconductor device for providing current flow into the semiconductor device, and a second set of bond wires that are in a current loop with the first set of bond wires and are connected to the semiconductor device for providing current flow out of the semiconductor device, wherein the first and second set of bond wires are configured in an inter-digitated pattern to increase the magnitude of mutual inductive coupling between the first and second set of bond wires. In one embodiment, the semiconductor device comprises a single semiconductor chip and the lead frame comprises a Quad Flat No-Lead (QFN) lead frame. Other embodiments include multiple chips and/or multiple lead frames.

摘要翻译： 公开了一种半导体器件封装，其包括配置为增加导线之间的负互感耦合的数字化输入和输出接合线，从而减小器件的总体寄生电感。 在一个实施例中，微电子部件包括耦合到诸如引线框架的基板的半导体器件，连接到半导体器件的用于提供电流流入半导体器件的第一组接合线，以及第二组接合线， 与第一组接合线处于电流回路中并且连接到半导体器件，用于提供从半导体器件流出的电流，其中第一组和第二组接合线被配置为数字化的图案以增加幅度 的第一组和第二组接合线之间的互感耦合。 在一个实施例中，半导体器件包括单个半导体芯片，并且引线框架包括四边形扁平无引线（QFN）引线框架。 其他实施例包括多个芯片和/或多个引线框架。

公开(公告)号：US07023672B2

公开(公告)日：2006-04-04

申请号：US10358066

申请日：2003-02-03

申请人： John Ryan Goodfellow ,  Robert T. Carroll ,  Malay Trivedi ,  Erik McShane ,  Kevin Mori

发明人： John Ryan Goodfellow ,  Robert T. Carroll ,  Malay Trivedi ,  Erik McShane ,  Kevin Mori

IPC分类号： H02H3/22

CPC分类号： H02M3/1584 ,  H02M3/157 ,  H02M3/1588 ,  Y02B70/1466

摘要： Disclosed is a digitally controlled multi-phase voltage regulator system providing regulated power to electronic components that have variable power requirements. Power is supplied by one or more power integrated circuits (IC) each having a high side power switch controlled by pulse width modulated signals and a low side power switch. The power IC senses voltage at the load and has an on-chip current mirror for generating a current that is a ratio of current delivered to the load. The power IC also has current limiting and on-chip temperature sensing components. The voltage and current information is digitized and provided to a control integrated circuit (IC). The control IC receives this digitized information as well as user provided parameters and, in the regulation mode of operation, provides digitized pulse width modulated control signals to the power IC. In an active transient response mode of operation, the control IC provides signals to turn either the high side switches or low side switches ON. Fault detection circuitry identifies over voltage, under voltage, and excessive temperatures. All communications between the control IC and the power IC are digital providing high bandwidth, optimal control frequency response, noise immunity and efficient active transient response.

摘要翻译： 公开了一种数字控制的多相电压调节器系统，为具有可变功率要求的电子元件提供稳压电源。 电源由一个或多个功率集成电路（IC）提供，每个功率集成电路均具有由脉冲宽度调制信号控制的高侧功率开关和低侧功率开关。 功率IC感测负载上的电压，并且具有用于产生作为传送到负载的电流的比率的电流的片上电流镜。 电源IC还具有电流限制和片上温度感测元件。 电压和电流信息被数字化并提供给控制集成电路（IC）。 控制IC接收该数字化信息以及用户提供的参数，并且在调节操作模式下，向功率IC提供数字化的脉宽调制控制信号。 在有效的瞬态响应操作模式中，控制IC提供信号以使高侧开关或低侧开关接通。 故障检测电路识别过电压，欠电压和过高的温度。 控制IC和电源IC之间的所有通信都是提供高带宽，最佳控制频率响应，抗噪声和有效的主动瞬态响应的数字。