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公开(公告)号：US08786105B1
公开(公告)日：2014-07-22
申请号：US13739045
申请日：2013-01-11
申请人： Thorsten Meyer , Sven Albers , Christian Geissler , Andreas Wolter , Markus Brunnbauer , David O'Sullivan , Frank Zudock , Jan Proschwitz
发明人： Thorsten Meyer , Sven Albers , Christian Geissler , Andreas Wolter , Markus Brunnbauer , David O'Sullivan , Frank Zudock , Jan Proschwitz
CPC分类号： H01L23/315 , H01L21/565 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/562 , H01L24/19 , H01L2224/02375 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor device is described having at least one semiconductor chip, the chip having an active area on a top side thereof, the active area formed at least in part of low-k material, said low-k material defining a low-k subarea of said active area; an embedding material, in which said at least one semiconductor chip is embedded, at least part of the embedding material forming a coplanar area with said active area; at least one contact area within the low-k subarea; a redistribution layer on the coplanar area, the redistribution layer connected to said contact areas; at least one first-level interconnect, located outside said low-k subarea, the first-level interconnect electrically connected to at least one of said contact areas via the redistribution layer.
摘要翻译： 描述了半导体器件，其具有至少一个半导体芯片，该芯片在其顶侧具有有源区，至少部分形成在低k材料上的有源区，所述低k材料限定低k分区 说活跃区; 嵌入材料，其中所述至少一个半导体芯片被嵌入，所述嵌入材料的至少一部分与所述有源区域形成共面区域; 低k子区域内的至少一个接触区域; 在共面区域上的再分配层，再分配层连接到所述接触区域; 位于所述低k子区域外的至少一个第一级互连，所述第一级互连经由再分配层电连接到所述接触区域中的至少一个。
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公开(公告)号：US20140197530A1
公开(公告)日：2014-07-17
申请号：US13739045
申请日：2013-01-11
申请人： Thorsten Meyer , Sven Albers , Christian Geissler , Andreas Wolter , Markus Brunnbauer , David O'Sullivan , Frank Zudock , Jan Proschwitz
发明人： Thorsten Meyer , Sven Albers , Christian Geissler , Andreas Wolter , Markus Brunnbauer , David O'Sullivan , Frank Zudock , Jan Proschwitz
CPC分类号： H01L23/315 , H01L21/565 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/562 , H01L24/19 , H01L2224/02375 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor device is described having at least one semiconductor chip, the chip having an active area on a top side thereof, the active area formed at least in part of low-k material, said low-k material defining a low-k subarea of said active area; an embedding material, in which said at least one semiconductor chip is embedded, at least part of the embedding material forming a coplanar area with said active area; at least one contact area within the low-k subarea; a redistribution layer on the coplanar area, the redistribution layer connected to said contact areas; at least one first-level interconnect, located outside said low-k subarea, the first-level interconnect electrically connected to at least one of said contact areas via the redistribution layer.
摘要翻译： 描述了半导体器件，其具有至少一个半导体芯片，该芯片在其顶侧具有有源区，至少部分形成在低k材料上的有源区，所述低k材料限定低k分区 说活跃区; 嵌入材料，其中所述至少一个半导体芯片被嵌入，所述嵌入材料的至少一部分与所述有源区域形成共面区域; 低k子区域内的至少一个接触区域; 在共面区域上的再分配层，再分配层连接到所述接触区域; 位于所述低k子区域外的至少一个第一级互连，所述第一级互连经由再分配层电连接到所述接触区域中的至少一个。
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公开(公告)号：US08093711B2
公开(公告)日：2012-01-10
申请号：US12364340
申请日：2009-02-02
IPC分类号： H01L23/04
CPC分类号： H01L24/82 , H01L21/568 , H01L21/6835 , H01L23/3107 , H01L23/3121 , H01L23/481 , H01L23/5389 , H01L24/25 , H01L24/96 , H01L24/97 , H01L25/105 , H01L25/18 , H01L25/50 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/2518 , H01L2224/97 , H01L2225/1035 , H01L2225/1058 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01047 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15331 , H01L2224/82
摘要： A semiconductor device includes a semiconductor chip having a through-connection extending between a first main face of the semiconductor chip and a second main face of the semiconductor chip opposite the first main face, encapsulation material at least partially encapsulating the semiconductor chip, and a first metal layer disposed over the encapsulation material and connected with the through-connection.
摘要翻译： 一种半导体器件包括半导体芯片，其具有在半导体芯片的第一主面之间延伸的贯通连接和与第一主面相对的半导体芯片的第二主面，至少部分地封装半导体芯片的封装材料，以及第一 金属层设置在封装材料上并与通孔连接。
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公开(公告)号：US20100193928A1
公开(公告)日：2010-08-05
申请号：US12364340
申请日：2009-02-02
IPC分类号： H01L25/11 , H01L23/538 , H01L21/768
CPC分类号： H01L24/82 , H01L21/568 , H01L21/6835 , H01L23/3107 , H01L23/3121 , H01L23/481 , H01L23/5389 , H01L24/25 , H01L24/96 , H01L24/97 , H01L25/105 , H01L25/18 , H01L25/50 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/2518 , H01L2224/97 , H01L2225/1035 , H01L2225/1058 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01047 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15331 , H01L2224/82
摘要： A semiconductor device includes a semiconductor chip having a through-connection extending between a first main face of the semiconductor chip and a second main face of the semiconductor chip opposite the first main face, encapsulation material at least partially encapsulating the semiconductor chip, and a first metal layer disposed over the encapsulation material and connected with the through-connection.
摘要翻译： 一种半导体器件包括半导体芯片，其具有在半导体芯片的第一主面之间延伸的贯通连接和与第一主面相对的半导体芯片的第二主面，至少部分地封装半导体芯片的封装材料，以及第一 金属层设置在封装材料上并与通孔连接。
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公开(公告)号：US20150262866A1
公开(公告)日：2015-09-17
申请号：US14205093
申请日：2014-03-11
IPC分类号： H01L21/768 , H01L23/522 , H01L23/00 , H01L23/532 , H01L21/311 , H01L21/3213 , H01L21/02 , H01L23/528
CPC分类号： H01L24/11 , H01L21/02282 , H01L21/02318 , H01L21/311 , H01L21/31111 , H01L21/31116 , H01L21/76802 , H01L21/76834 , H01L21/7685 , H01L21/76871 , H01L23/525 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/81 , H01L24/94 , H01L2224/02311 , H01L2224/02313 , H01L2224/02331 , H01L2224/0345 , H01L2224/03462 , H01L2224/0361 , H01L2224/0381 , H01L2224/03914 , H01L2224/0401 , H01L2224/05083 , H01L2224/05144 , H01L2224/05147 , H01L2224/05164 , H01L2224/05166 , H01L2224/05171 , H01L2224/05548 , H01L2224/12105 , H01L2224/13022 , H01L2224/131 , H01L2224/16227 , H01L2224/211 , H01L2224/8112 , H01L2224/81191 , H01L2224/81801 , H01L2224/821 , H01L2224/82105 , H01L2224/94 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01046 , H01L2924/01079 , H01L2924/12042 , H01L2924/143 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2924/014 , H01L2924/00014 , H01L2924/01074 , H01L2224/03
摘要： Embodiments of the present disclosure are directed towards a method of assembling an integrated circuit package. In embodiments the method may include providing a wafer having an unpatterned passivation layer to prevent corrosion of metal conductors embedded in the wafer. The method may further include laminating a dielectric material on the passivation layer to form a dielectric layer and selectively removing dielectric material to form voids in the dielectric layer. These voids may reveal portions of the passivation layer disposed over the metal conductors. The method may then involve removing the portions of the passivation layer to reveal the metal conductors. Other embodiments may be described and/or claimed.
摘要翻译： 本公开的实施例涉及组装集成电路封装的方法。 在实施例中，该方法可以包括提供具有未图案化钝化层的晶片以防止嵌入晶片中的金属导体的腐蚀。 该方法还可以包括将绝缘材料层压在钝化层上以形成电介质层，并选择性地去除电介质材料以在电介质层中形成空隙。 这些空隙可以露出设置在金属导体上的钝化层的部分。 该方法可以包括去除钝化层的部分以露出金属导体。 可以描述和/或要求保护其他实施例。
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