公开(公告)号：US07155300B2

公开(公告)日：2006-12-26

申请号：US10401209

申请日：2003-03-27

申请人： Salman Akram ,  Warren M. Farnworth ,  Derek J. Gochnour ,  David R. Hembree ,  Michael E. Hess ,  John O. Jacobson ,  James M. Wark ,  Alan G. Wood

发明人： Salman Akram ,  Warren M. Farnworth ,  Derek J. Gochnour ,  David R. Hembree ,  Michael E. Hess ,  John O. Jacobson ,  James M. Wark ,  Alan G. Wood

IPC分类号： G06F19/00

CPC分类号： G06F11/006 ,  H01L2223/5444

摘要： An inventive method in an integrated circuit (IC) manufacturing process for using data regarding repair procedures conducted on IC's at probe to determine whether any further repairs will be conducted later in the manufacturing process includes storing the data in association with a fuse ID of each of the IC's. The ID codes of the IC's are automatically read, for example, at an opens/shorts test during the manufacturing process. The data stored in association with the ID codes of the IC's is then accessed, and additional repair procedures the IC's may undergo are selected in accordance with the accessed data. Thus, for example, the accessed data may indicate that an IC is unrepairable, so the IC can proceed directly to a scrap bin without having to be queried to determine whether it is repairable, as is necessary in traditional IC manufacturing processes.

公开(公告)号：US07022533B2

公开(公告)日：2006-04-04

申请号：US10792230

申请日：2004-03-03

申请人： Warren M. Farnworth ,  Derek J. Gochnour

发明人： Warren M. Farnworth ,  Derek J. Gochnour

IPC分类号： G01R31/26 ,  H01L21/66

CPC分类号： H01L23/544 ,  H01L24/83 ,  H01L2223/54413 ,  H01L2223/5442 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/83192 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  Y10T29/49004 ,  Y10T29/49146 ,  Y10T29/53043 ,  Y10T29/53178 ,  Y10T29/53187 ,  H01L2924/00

摘要： A method for fabricating semiconductor die packages including a mounting substrate and dice attached thereto. The mounting substrate includes multiple die attach sites and a designator having substrate identification information. The die attach sites are evaluated and categorized as either good or defective die attach sites, wherein the evaluated information is saved in an electronic file as mapped information. A die is attached to the die attach sites in accord with the information, wherein known good dice are attached to the good die attach sites and known defective dice are attached to the defective die attach sites. The assembly is then encapsulated in a transfer molding operation.

公开(公告)号：US06888159B2

公开(公告)日：2005-05-03

申请号：US10280415

申请日：2002-10-25

申请人： Warren M. Farnworth ,  Derek J. Gochnour

发明人： Warren M. Farnworth ,  Derek J. Gochnour

IPC分类号： H01L23/544 ,  H01L23/58

CPC分类号： H01L23/544 ,  H01L24/83 ,  H01L2223/54413 ,  H01L2223/5442 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/83192 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  Y10T29/49004 ,  Y10T29/49146 ,  Y10T29/53043 ,  Y10T29/53178 ,  Y10T29/53187 ,  H01L2924/00

摘要： A method and apparatus relating to fabricating semiconductor die packages including a mounting substrate and dice attached thereto. The mounting substrate includes multiple die attach sites and a designator having substrate identification information. The die attach sites are evaluated and categorized as either good or defective die attach sites, wherein the evaluated information is saved in an electronic file as mapped information. A die attach apparatus attaches dice to the die attach sites in accord with the mapped information, wherein known good dice are attached to the good die attach sites and known defective dice are attached to the defective die attach sites. The assembly is then encapsulated in a transfer molding operation.

公开(公告)号：US06553276B2

公开(公告)日：2003-04-22

申请号：US10071961

申请日：2002-02-05

申请人： Salman Akram ,  Warren M. Farnworth ,  Derek J. Gochnour ,  David R. Hembree ,  Michael E. Hess ,  John O Jacobson ,  James M. Wark ,  Alan G. Wood

发明人： Salman Akram ,  Warren M. Farnworth ,  Derek J. Gochnour ,  David R. Hembree ,  Michael E. Hess ,  John O Jacobson ,  James M. Wark ,  Alan G. Wood

IPC分类号： G06F1900

CPC分类号： G06F11/006 ,  H01L2223/5444

摘要： An inventive method in an integrated circuit (IC) manufacturing process for using data regarding repair procedures conducted on IC's at probe to determine whether any further repairs will be conducted later in the manufacturing process includes storing the data in association with a fuse ID of each of the IC's. The ID codes of the IC's are automatically read, for example, at an opens/shorts test during the manufacturing process. The data stored in association with the ID codes of the IC's is then accessed, and additional repair procedures the IC's may undergo are selected in accordance with the accessed data. Thus, for example, the accessed data may indicate that an IC is unrepairable, so the IC can proceed directly to a scrap bin without having to be queried to determine whether it is repairable, as is necessary in traditional IC manufacturing processes.

摘要翻译： 一种集成电路（IC）制造过程中的发明方法，用于使用关于在探针上的IC进行的修复程序的数据，以确定是否在制造过程中稍后进行进一步的修复，包括将数据与每个的保险丝ID相关联地存储 IC的。 例如，在制造过程中，IC的ID代码将自动读取，例如打开/短路测试。 然后访问与IC的ID代码相关联存储的数据，并且根据访问的数据选择IC可能经历的附加修复过程。 因此，例如，访问的数据可以指示IC不可修复，因此IC可以直接进入废料仓，而不必被查询以确定其是否可修复，如在传统IC制造过程中所必需的。

公开(公告)号：US06369595B1

公开(公告)日：2002-04-09

申请号：US09234593

申请日：1999-01-21

申请人： Warren M. Farnworth ,  Derek J. Gochnour ,  David R. Hembree

发明人： Warren M. Farnworth ,  Derek J. Gochnour ,  David R. Hembree

IPC分类号： G01R3102

CPC分类号： H05K1/112 ,  G01R1/0483 ,  H05K3/325 ,  H05K2201/09472 ,  H05K2201/09827 ,  H05K2201/10734

摘要： A BGA test socket for use in standard testing and burn-in testing of BGA dies and method for testing such dies is disclosed wherein a die contact insert made of silicon or ceramic using standard IC fabrication technology is used. Through using such an insert, even small scale (pitch) BGA dies can be reliably tested including chip scale packaged (“CSP”) BGA dies. Furthermore, using such an insert allows a conventional socket to be adapted for use with a wide variety of both BGA dies and other varieties. A method for using the device is disclosed which overcomes current static electricity problems experienced in testing CSP BGA dies through closing the test socket before removing the die deposit probe.

公开(公告)号：US5907492A

公开(公告)日：1999-05-25

申请号：US871015

申请日：1997-06-06

申请人： Salman Akram ,  Warren M. Farnworth ,  Derek J. Gochnour ,  David R. Hembree ,  Michael E. Hess ,  John O. Jacobson ,  James M. Wark ,  Alan G. Wood

发明人： Salman Akram ,  Warren M. Farnworth ,  Derek J. Gochnour ,  David R. Hembree ,  Michael E. Hess ,  John O. Jacobson ,  James M. Wark ,  Alan G. Wood

IPC分类号： G06F11/00 ,  G06F19/00

CPC分类号： G06F11/006 ,  H01L2223/5444

摘要： An inventive method in an integrated circuit (IC) manufacturing process for using data regarding repair procedures conducted on IC's at probe to determine whether any further repairs will be conducted later in the manufacturing process includes storing the data in association with a fuse ID of each of the IC's. The ID codes of the IC's are automatically read, for example, at an opens/shorts test during the manufacturing process. The data stored in association with the ID codes of the IC's is then accessed, and additional repair procedures the IC's may undergo are selected in accordance with the accessed data. Thus, for example, the accessed data may indicate that an IC is unrepairable, so the IC can proceed directly to a scrap bin without having to be queried to determine whether it is repairable, as is necessary in traditional IC manufacturing processes.

公开(公告)号：US5342807A

公开(公告)日：1994-08-30

申请号：US976093

申请日：1992-11-13

申请人： Larry D. Kinsman ,  Derek J. Gochnour ,  Alan G. Wood ,  Warren M. Farnworth

发明人： Larry D. Kinsman ,  Derek J. Gochnour ,  Alan G. Wood ,  Warren M. Farnworth

IPC分类号： G01R1/04 ,  G01R1/073 ,  G01R3/00 ,  G01R31/28 ,  H01L21/60 ,  H01L21/66 ,  H01L21/68 ,  H01L23/13 ,  H01L23/498 ,  H05K3/00 ,  H05K3/40 ,  H05K3/42

CPC分类号： G01R1/0466 ,  G01R1/0483 ,  G01R31/2893 ,  H01L21/6835 ,  H01L22/20 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/85 ,  H05K3/4007 ,  G01R1/0735 ,  G01R3/00 ,  G01R31/2863 ,  H01L2224/05554 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48455 ,  H01L2224/48472 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78313 ,  H01L2224/85001 ,  H01L2224/85099 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85214 ,  H01L2225/06562 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15174 ,  H01L2924/16195 ,  H01L2924/20751 ,  H01L2924/20753 ,  H05K2201/0133 ,  H05K2201/0347 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2203/0307 ,  H05K2203/0723 ,  H05K3/0058 ,  H05K3/0067 ,  H05K3/423 ,  Y10S228/904 ,  Y10T29/49004

摘要： On a semiconductor integrated circuit die, a semipermanent electrical connection is effected by the use of wirebond techniques, in which the parameters of the wirebond are controlled, so that less bonding force retains the leadwires to the bondpads than the attachment strength of the bondpads to the die. The wirebond techniques include attaching leadwires to bondpads on the die, using ultrasonic wedge bonding. The strength of the bond between the leadwires is significantly less than the attachment strength of the bondpads, preferably by a ratio which ensures that the bondpads are not lifted from the die when the leadwires are removed by breaking the bond between the leadwires and the bondpads. Subsequent to testing and burnin, the bond between the leadwires and the bondpads is severed. The die are then removed from the package body and the bondpads may then be attached by conventional means. The technique is useful in providing known good die.

摘要翻译： 在半导体集成电路管芯上，通过使用引线接合技术来实现半永久性电连接，其中引线键合的参数被控制，使得较少的结合力将导线保持在粘合垫上，而不是粘合垫的附着强度 死。 引线接合技术包括使用超声波楔形接合将引线连接到管芯上的焊盘。 引线之间的结合强度显着小于粘合垫的附着强度，优选地通过确保当引线通过断开引线和粘合垫之间的键而去除引线时，粘合垫不会从模具上提起的比例。 在测试和燃烧之后，引线和焊盘之间的接合被切断。 然后将模具从包装体中取出，然后可以通过常规方法将粘合垫连接起来。 该技术在提供已知的好的模具中是有用的。

公开(公告)号：US5336649A

公开(公告)日：1994-08-09

申请号：US976221

申请日：1992-11-13

申请人： Larry D. Kinsman ,  Derek J. Gochnour ,  Alan G. Wood ,  Warren M. Farnworth

发明人： Larry D. Kinsman ,  Derek J. Gochnour ,  Alan G. Wood ,  Warren M. Farnworth

IPC分类号： G01R1/04 ,  G01R1/073 ,  G01R3/00 ,  G01R31/28 ,  H01L21/60 ,  H01L21/66 ,  H01L21/68 ,  H01L23/13 ,  H01L23/498 ,  H05K3/00 ,  H05K3/40 ,  H05K3/42

CPC分类号： G01R1/0466 ,  G01R1/0483 ,  G01R31/2893 ,  H01L21/6835 ,  H01L22/20 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/85 ,  H05K3/4007 ,  G01R1/0735 ,  G01R3/00 ,  G01R31/2863 ,  H01L2224/05554 ,  H01L2224/16145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48455 ,  H01L2224/48472 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/78313 ,  H01L2224/85001 ,  H01L2224/85099 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85214 ,  H01L2225/06562 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15174 ,  H01L2924/16195 ,  H01L2924/20751 ,  H01L2924/20753 ,  H05K2201/0133 ,  H05K2201/0347 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2203/0307 ,  H05K2203/0723 ,  H05K3/0058 ,  H05K3/0067 ,  H05K3/423

摘要： In order to provide pretested bare semiconductor integrated circuit die, a temporary mechanical connection is effected by the use of a soluble material. A semipermanent electrical connection is effected, in which the parameters of the connection are controlled, so that the die remains functional subsequent to burnin and test. Subsequent to testing and burnin, the die are removed from the package body. The technique is useful in providing known good die.

摘要翻译： 为了提供预先测试的裸半导体集成电路管芯，通过使用可溶性材料实现临时机械连接。 进行半永久电连接，其中连接的参数被控制，使得模具在燃烧和测试之后保持功能。 在测试和燃烧之后，将模具从包装体中取出。 该技术在提供已知的好的模具中是有用的。

公开(公告)号：US06841796B2

公开(公告)日：2005-01-11

申请号：US10280200

申请日：2002-10-25

申请人： Warren M. Farnworth ,  Derek J. Gochnour

发明人： Warren M. Farnworth ,  Derek J. Gochnour

IPC分类号： H01L23/544 ,  H01L23/55

CPC分类号： H01L23/544 ,  H01L24/83 ,  H01L2223/54413 ,  H01L2223/5442 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/83192 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  Y10T29/49004 ,  Y10T29/49146 ,  Y10T29/53043 ,  Y10T29/53178 ,  Y10T29/53187 ,  H01L2924/00

摘要： A method and apparatus relating to fabricating semiconductor die packages including a mounting substrate and dice attached thereto. The mounting substrate includes multiple die attach sites and a designator having substrate identification information. The die attach sites are evaluated and categorized as either good or defective die attach sites, wherein the evaluated information is saved in an electronic file as mapped information. A die attach apparatus attaches dice to the die attach sites in accord with the mapped information, wherein known good dice are attached to the good die attach sites and known defective dice are attached to the defective die attach sites. The assembly is then encapsulated in a transfer molding operation.

摘要翻译： 涉及制造半导体管芯封装的方法和装置，包括安装衬底和附着于其上的裸片。 安装基板包括多个管芯附接位置和具有衬底识别信息的指示符。 芯片附着位点被评估并分类为良好或有缺陷的裸片附着位点，其中所评估的信息作为映射信息保存在电子文件中。 芯片连接装置根据映射信息将裸片附着到裸片附着位置，其中已知的良好裸片附着到裸片附着位置，并且已知的有缺陷的裸片附着到有缺陷的裸片附着位置上。 然后将组件封装在传递模制操作中。

公开(公告)号：US06808947B2

公开(公告)日：2004-10-26

申请号：US10423127

申请日：2003-04-25

申请人： Warren M. Farnworth ,  Derek J. Gochnour

发明人： Warren M. Farnworth ,  Derek J. Gochnour

IPC分类号： H01L2166

CPC分类号： H01L23/544 ,  H01L24/83 ,  H01L2223/54413 ,  H01L2223/5442 ,  H01L2223/54473 ,  H01L2223/54486 ,  H01L2224/83192 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  Y10T29/49004 ,  Y10T29/49146 ,  Y10T29/53043 ,  Y10T29/53178 ,  Y10T29/53187 ,  H01L2924/00

摘要： A method for fabricating semiconductor die packages including a mounting substrate and dice attached thereto. The mounting substrate includes multiple die attach sites and a designator having substrate identification information. The die attach sites are evaluated and categorized as either good or defective die attach sites, wherein the evaluated information is saved in an electronic file as mapped information. A die is attached to the die attach sites in accord with the information, wherein known good dice are attached to the good die attach sites and known defective dice are attached to the defective die attach sites. The assembly is then encapsulated in a transfer molding operation.

摘要翻译： 一种制造半导体管芯封装的方法，包括安装基板和附接到其上的裸片。 安装基板包括多个管芯附接位置和具有衬底识别信息的指示符。 芯片附着位点被评估并分类为良好或有缺陷的裸片附着位点，其中所评估的信息作为映射信息保存在电子文件中。 根据信息将模具附接到管芯附着位置，其中已知的好的裸片附接到良好的裸片附着位置，并且已知的有缺陷的裸片附着到有缺陷的芯片附着位置。 然后将组件封装在传递模制操作中。