公开(公告)号：US5962344A

公开(公告)日：1999-10-05

申请号：US999229

申请日：1997-12-29

申请人： Yeur-Luen Tu ,  Shiang-Peng Cheng ,  Kwong-Jr Tsai ,  Liang-Gi Yao

发明人： Yeur-Luen Tu ,  Shiang-Peng Cheng ,  Kwong-Jr Tsai ,  Liang-Gi Yao

IPC分类号： H01L21/318 ,  H01L21/441

CPC分类号： H01L21/3185

摘要： A plasma treatment method used to form improved PECVD silicon nitride film passivation layers over metal interconnections on ULSI circuits is achieved. The process is carried out in a single PECVD reactor. After depositing a thin silicon oxide stress-release layer over the metal lines, a plasma-enhanced CVD silicon nitride layer is deposited, and subsequently a plasma treatment step is carried out on the silicon nitride layer. The use of a sufficiently thin silicon nitride layer eliminates photoresist trapping at the next photoresist process step that would otherwise be trapped in the voids (keyholes) that typically form in the silicon nitride passivation layer between the closely spaced metal lines, and can cause corrosion of the metal. The plasma treatment in He, Ar, or a mixture of the two, is then used to densify the silicon nitride layer and to substantially reduce pinholes that would otherwise cause interlevel metal shorts.

摘要翻译： 实现了用于在ULSI电路上的金属互连上形成改进的PECVD氮化硅膜钝化层的等离子体处理方法。 该过程在单个PECVD反应器中进行。 在金属线上沉积薄氧化硅应力释放层之后，沉积等离子体增强的CVD氮化硅层，随后在氮化硅层上进行等离子体处理步骤。 使用足够薄的氮化硅层在下一个光刻胶工艺步骤消除光致抗蚀剂捕获，否则将被捕获在通常在紧密间隔的金属线之间的氮化硅钝化层中形成的空隙（键槽）中，并且可能导致腐蚀 金属。 然后，使用He，Ar中的等离子体处理或两者的混合物来使氮化硅层致密化并且基本上减少否则将引起层间金属短路的针孔。

公开(公告)号：US5851603A

公开(公告)日：1998-12-22

申请号：US891910

申请日：1997-07-14

申请人： Kwong-Jr Tsai ,  Shiang-Peng Cheng ,  Yeur-Luen Tu ,  Ing-Ruey Liaw

发明人： Kwong-Jr Tsai ,  Shiang-Peng Cheng ,  Yeur-Luen Tu ,  Ing-Ruey Liaw

IPC分类号： H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/532 ,  B05D3/06

CPC分类号： H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3145 ,  H01L21/31612 ,  H01L21/3185 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/5329 ,  H01L21/76837 ,  H01L2924/0002 ,  Y10S438/938 ,  Y10T428/24917

摘要： A method was achieved for forming a multilayer passivation layer comprised of a silicon oxide/silicon nitride/silicon oxide/silicon nitride by depositing the layers consecutively in a single PECVD system. The method consists of depositing a first SiO.sub.2 layer that serves as a stress-release layer, a thin Si.sub.3 N.sub.4 layer that serves as a buffer layer that minimizes cracking and as a passivation layer that prevents mobile alkaline ion penetration, a thin second SiO.sub.2 layer to fill and seal any remaining cracks and pinholes in the first Si.sub.3 N.sub.4 layer, and a main Si.sub.3 N.sub.4 passivation layer that prevents water and/or other corrosive chemicals from attacking the metal. Since this multilayer passivation layer can be deposited essentially pinhole-free to a thickness that is less than the prior art's passivation layer of 8000 Angstroms needed to prevent pinholes, it can be used on 0.38 to 0.25 um DRAM technology, which eliminates voids that could otherwise trap photoresist which can later cause corrosion of the metal lines.

摘要翻译： 通过在单个PECVD系统中连续沉积层来形成由氧化硅/氮化硅/氧化硅/氮化硅组成的多层钝化层的方法。 该方法包括沉积用作应力释放层的第一SiO 2层，用作最小化裂纹的缓冲层的薄Si 3 N 4层，以及防止移动碱性离子渗透的钝化层，稀的第二SiO 2层填充 并且密封第一Si 3 N 4层中的任何剩余的裂纹和针孔，以及防止水和/或其它腐蚀性化学物质侵蚀金属的主要Si 3 N 4钝化层。 由于这种多层钝化层可以基本上无针孔地沉积到比现有技术的防止针孔所需的8000埃的钝化层的厚度，所以它可以用于0.38到0.25微米的DRAM技术，这消除了否则的空隙 陷阱光致抗蚀剂可以后来导致金属线的腐蚀。

公开(公告)号：US5943599A

公开(公告)日：1999-08-24

申请号：US920133

申请日：1997-08-27

申请人： Liang-Gi Yao ,  Yeur-Luen Tu ,  Sen-Huan Huang ,  Kwong-Jr Tsai ,  Meng-Jaw Cherng

发明人： Liang-Gi Yao ,  Yeur-Luen Tu ,  Sen-Huan Huang ,  Kwong-Jr Tsai ,  Meng-Jaw Cherng

IPC分类号： H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  H01L21/4763

CPC分类号： H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/31612 ,  H01L21/3185 ,  H01L21/3145 ,  Y10S438/958

摘要： A metal layer (24) is formed on an isolation layer (22) to act as interconnections. Subsequently, a thin liner layer (26) is optionally formed along the surface of the metal layer (24) to serve as a buffer layer. An undoped silicate glass (USG) layer (28) is deposited on the liner layer (26). The USG layer (28) is formed using ozone and tetraethylorthosilicate (TEOS) as a source at a temperature of approximately 380 to 420.degree. C. Oxygen gas is used as a carrier for the ozone. The flow rate of the oxygen gas is approximately 4000 to 6000 sccm. Helium gas is used as a carrier for the TEOS. The flow rate of the helium is approximately 3000 to 5000 sccm. A silicon nitride layer (30) is deposited on the USG layer (28) using plasma enhanced chemical vapor deposition (PECVD). The silicon nitride layer (30) serves as a main passivation layer. The thickness of the silicon nitride layer (30) is approximately 3000 to 7000 angstroms.

摘要翻译： 金属层（24）形成在隔离层（22）上以用作互连。 随后，沿着金属层（24）的表面可选地形成薄衬层（26），用作缓冲层。 未掺杂的硅酸盐玻璃（USG）层（28）沉积在衬层（26）上。 USG层（28）使用臭氧和原硅酸四乙酯（TEOS）作为源，在约380至420℃的温度下形成。氧气用作臭氧的载体。 氧气的流量约为4000〜6000sccm。 氦气用作TEOS的载体。 氦气的流量约为3000〜5000sccm。 使用等离子体增强化学气相沉积（PECVD）在USG层（28）上沉积氮化硅层（30）。 氮化硅层（30）用作主钝化层。 氮化硅层（30）的厚度约为3000至7000埃。

公开(公告)号：US6017614A

公开(公告)日：2000-01-25

申请号：US157510

申请日：1998-09-21

申请人： Kwong-Jr Tsai ,  Shiang-Peng Cheng ,  Yeur-Luen Tu ,  Ing-Ruey Liaw

发明人： Kwong-Jr Tsai ,  Shiang-Peng Cheng ,  Yeur-Luen Tu ,  Ing-Ruey Liaw

IPC分类号： H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  H01L21/768 ,  H01L23/532 ,  B32B3/00

CPC分类号： H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3145 ,  H01L21/31612 ,  H01L21/3185 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/5329 ,  H01L21/76837 ,  H01L2924/0002 ,  Y10S438/938 ,  Y10T428/24917

摘要： A method was achieved for forming a multilayer passivation layer comprised of a silicon oxide/silicon nitride/silicon oxide/silicon nitride by depositing the layers consecutively in a single PECVD system. The method consists of depositing a first SiO.sub.2 layer that serves as a stress-release layer, a thin Si.sub.3 N.sub.4 layer that serves as a buffer layer that minimizes cracking and as a passivation layer that prevents mobile alkaline ion penetration, a thin second SiO.sub.2 layer to fill and seal any remaining cracks and pinholes in the first Si.sub.3 N.sub.4 layer, and a main Si.sub.3 N.sub.4 passivation layer that prevents water and/or other corrosive chemicals from attacking the metal. Since this multilayer passivation layer can be deposited essentially pinhole-free to a thickness that is less than the prior art's passivation layer of 8000 Angstroms needed to prevent pinholes, it can be used on 0.38 to 0.25 um DRAM technology, which eliminates voids that could otherwise trap photoresist which can later cause corrosion of the metal lines.

摘要翻译： 通过在单个PECVD系统中连续沉积层来形成由氧化硅/氮化硅/氧化硅/氮化硅组成的多层钝化层的方法。 该方法包括沉积用作应力释放层的第一SiO 2层，用作最小化裂纹的缓冲层的薄Si 3 N 4层，以及防止移动碱性离子渗透的钝化层，稀的第二SiO 2层填充 并且密封第一Si 3 N 4层中的任何剩余的裂纹和针孔，以及防止水和/或其它腐蚀性化学物质侵蚀金属的主要Si 3 N 4钝化层。 由于这种多层钝化层可以基本上无针孔地沉积到比现有技术的防止针孔所需的8000埃的钝化层的厚度，所以它可以用于0.38到0.25微米的DRAM技术，这消除了否则的空隙 陷阱光致抗蚀剂可以后来导致金属线的腐蚀。

公开(公告)号：US06143664A

公开(公告)日：2000-11-07

申请号：US928205

申请日：1997-09-12

申请人： Liang-Gi Yao ,  Chung-Ju Lee ,  Yue-Feng Chen ,  Wei-Ray Lin ,  Yeur-Luen Tu

发明人： Liang-Gi Yao ,  Chung-Ju Lee ,  Yue-Feng Chen ,  Wei-Ray Lin ,  Yeur-Luen Tu

IPC分类号： H01L21/768 ,  H01L21/00

CPC分类号： H01L21/76819

摘要： A method of planarizing a structure having an interpoly layer is disclosed. The method includes forming an undoped silica glass layer on at least a polysilicon region formed on a semiconductor substrate. Next, a spin-on-glass layer is formed over the undoped silica glass layer. Finally, the spin-on-glass layer is etched back, thereby planarizing the structure having the interpoly layer.

摘要翻译： 公开了一种平面化具有多晶硅层的结构的方法。 该方法包括在至少形成在半导体衬底上的多晶硅区域上形成未掺杂的二氧化硅玻璃层。 接下来，在未掺杂的二氧化硅玻璃层上形成旋涂玻璃层。 最后，将旋涂玻璃层回蚀刻，从而使具有多晶硅层的结构平坦化。

公开(公告)号：US09099389B2

公开(公告)日：2015-08-04

申请号：US13371303

申请日：2012-02-10

申请人： Chung Chien Wang ,  Yeur-Luen Tu ,  Cheng-Ta Wu ,  Chia-Shiung Tsai

发明人： Chung Chien Wang ,  Yeur-Luen Tu ,  Cheng-Ta Wu ,  Chia-Shiung Tsai

IPC分类号： H01L21/268 ,  H01L27/146

CPC分类号： H01L21/268 ,  G01B11/14 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689

摘要： A method for reducing stripe patterns comprising receiving scattered light signals from a backside surface of a laser annealed backside illuminated image sensor wafer, generating a backside surface image based upon the scattered light signals, determining a distance between an edge of a sensor array of the laser anneal backside illuminated image sensor wafer and an adjacent boundary of a laser beam and re-calibrating the laser beam if the distance is less than a predetermined value.

摘要翻译： 一种用于减少条纹图案的方法，包括从激光退火背面照射图像传感器晶片的背面接收散射光信号，基于散射光信号产生背面图像，确定激光器的传感器阵列的边缘之间的距离 退火背面照射的图像传感器晶片和激光束的相邻边界，并且如果距离小于预定值则重新校准激光束。

公开(公告)号：US09059057B2

公开(公告)日：2015-06-16

申请号：US13492258

申请日：2012-06-08

申请人： Chun-Han Tsao ,  Chih-Yu Lai ,  Chih-Hui Huang ,  Cheng-Ta Wu ,  Yeur-Luen Tu ,  Ching-Chun Wang ,  Shyh-Fann Ting ,  Chia-Shiung Tsai

发明人： Chun-Han Tsao ,  Chih-Yu Lai ,  Chih-Hui Huang ,  Cheng-Ta Wu ,  Yeur-Luen Tu ,  Ching-Chun Wang ,  Shyh-Fann Ting ,  Chia-Shiung Tsai

IPC分类号： H01L31/102 ,  H01L21/00 ,  H01L27/146 ,  H01L27/148

CPC分类号： H01L31/02164 ,  H01L27/14623 ,  H01L27/14632 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14687 ,  H01L27/148 ,  H01L51/4273

摘要： An image sensor device including a semiconductor substrate that includes an array region and a black level correction region. The array region contains a plurality of radiation-sensitive pixels. The black level correction region contains one or more reference pixels. The substrate has a front side and a back side. The image sensor device includes a first compressively-stressed layer formed on the back side of the substrate. The first compressively-stressed layer contains silicon oxide, and is negatively charged. The second compressively-stressed layer contains silicon nitride, and is negatively charged. A metal shield is formed over at least a portion of the black level correction region. The image sensor device includes a third compressively-stressed layer formed on the metal shield and the second compressively-stressed layer. The third compressively-stressed layer contains silicon oxide. A sidewall of the metal shield is protected by the third compressively-stressed layer.

摘要翻译： 一种包括具有阵列区域和黑色电平校正区域的半导体衬底的图像传感器装置。 阵列区域包含多个辐射敏感像素。 黑色电平校正区域包含一个或多个参考像素。 基板具有前侧和后侧。 图像传感器装置包括形成在基板的背面上的第一压缩应力层。 第一压应力层含有氧化硅，带负电荷。 第二压应力层含有氮化硅，带负电荷。 在黑色电平校正区域的至少一部分上形成金属屏蔽。 图像传感器装置包括形成在金属屏蔽和第二压缩应力层上的第三压缩应力层。 第三压缩应力层含有氧化硅。 金属屏蔽层的侧壁由第三压应力层保护。

公开(公告)号：US08802457B2

公开(公告)日：2014-08-12

申请号：US13205179

申请日：2011-08-08

申请人： Chih-Yu Lai ,  Cheng-Ta Wu ,  Kai-Chun Hsu ,  Yeur-Luen Tu ,  Ching-Chun Wang ,  Chia-Shiung Tsai

发明人： Chih-Yu Lai ,  Cheng-Ta Wu ,  Kai-Chun Hsu ,  Yeur-Luen Tu ,  Ching-Chun Wang ,  Chia-Shiung Tsai

IPC分类号： H01L21/00 ,  H01L21/46 ,  H01L21/322

CPC分类号： H01L27/14687 ,  H01L27/1464

摘要： A method includes performing a grinding to a backside of a semiconductor substrate, wherein a remaining portion of the semiconductor substrate has a back surface. A treatment is then performed on the back surface using a method selected from the group consisting essentially of a dry treatment and a plasma treatment. Process gases that are used in the treatment include oxygen (O2). The plasma treatment is performed without vertical bias in a direction perpendicular to the back surface.

摘要翻译： 一种方法包括对半导体衬底的背面进行研磨，其中半导体衬底的剩余部分具有背面。 然后使用基本上由干法处理和等离子体处理组成的组中的方法在背面进行处理。 用于处理的工艺气体包括氧（O 2）。 在垂直于后表面的方向上进行等离子体处理而没有垂直偏压。

公开(公告)号：US08610229B2

公开(公告)日：2013-12-17

申请号：US13087192

申请日：2011-04-14

申请人： Hung-Wen Hsu ,  Shih-Chang Liu ,  Yeur-Luen Tu

发明人： Hung-Wen Hsu ,  Shih-Chang Liu ,  Yeur-Luen Tu

IPC分类号： H01L27/146

CPC分类号： H01L27/14685 ,  H01L27/14623 ,  H01L27/14627 ,  H01L27/1464

摘要： The present disclosure provides an image sensor device and a method for manufacturing the image sensor device. An exemplary image sensor device includes a substrate having a front surface and a back surface; a plurality of sensor elements disposed at the front surface of the substrate, each of the plurality of sensor elements being operable to sense radiation projected towards the back surface of the substrate; a radiation-shielding feature disposed over the back surface of the substrate and horizontally disposed between each of the plurality of sensor elements; a dielectric feature disposed between the back surface of the substrate and the radiation-shielding feature; and a metal layer disposed along sidewalls of the dielectric feature.

摘要翻译： 本公开提供了一种图像传感器装置和用于制造图像传感器装置的方法。 示例性的图像传感器装置包括具有前表面和后表面的基板; 设置在所述基板的前表面处的多个传感器元件，所述多个传感器元件中的每一个可操作以感测朝向所述基板的后表面投射的辐射; 辐射屏蔽特征设置在所述基板的所述背表面上并且水平地设置在所述多个传感器元件中的每一个之间; 设置在基板的背面和辐射屏蔽特征之间的电介质特征; 以及沿着电介质特征的侧壁设置的金属层。

公开(公告)号：US07824998B2

公开(公告)日：2010-11-02

申请号：US12357661

申请日：2009-01-22

申请人： Yuan-Hung Liu ,  Ming Chyi Liu ,  Yeur-Luen Tu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

发明人： Yuan-Hung Liu ,  Ming Chyi Liu ,  Yeur-Luen Tu ,  Chi-Hsin Lo ,  Chia-Shiung Tsai

IPC分类号： H01L21/20

CPC分类号： H01L21/02274 ,  H01L21/02115 ,  H01L21/28273 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/3146 ,  H01L21/76816 ,  H01L21/7682 ,  H01L21/76885 ,  H01L21/76897 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/14632 ,  H01L27/14687 ,  H01L28/91 ,  H01L29/42328 ,  H01L29/7881

摘要： A method includes forming an amorphous carbon layer over a first dielectric layer formed over a substrate, forming a second dielectric layer over the amorphous carbon layer; and forming an opening within the amorphous carbon layer and second dielectric layer by a first etch process to partially expose a top surface of the first dielectric layer. A substantially conformal metal-containing layer is formed over the second dielectric layer and within the opening. The second dielectric layer and a portion of the metal-containing layer are removed. The amorphous carbon layer is removed by an oxygen-containing plasma process to expose a top surface of the first dielectric layer. An insulating layer is formed over the metal-containing layer, and a second metal-containing layer is formed over the insulating layer to form a capacitor.

摘要翻译： 一种方法包括在形成在衬底上的第一电介质层上形成无定形碳层，在非晶碳层上形成第二电介质层; 以及通过第一蚀刻工艺在所述非晶碳层和所述第二介电层内形成开口，以部分地暴露所述第一介电层的顶表面。 在第二电介质层上并在开口内形成基本上共形的含金属层。 去除第二电介质层和一部分含金属层。 通过含氧等离子体工艺除去无定形碳层以暴露第一介电层的顶表面。 在含金属层的上方形成有绝缘层，在绝缘层上形成第二含金属层，形成电容器。