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45 条记录 (耗时 0.044 秒)

    Methods of selectively forming silicon-on-insulator structures using selective expitaxial growth process
    6.
    发明授权
    Methods of selectively forming silicon-on-insulator structures using selective expitaxial growth process 有权
    使用选择性外延生长工艺选择性地形成绝缘体上硅结构的方法

    公开(公告)号：US08735265B2

    公开(公告)日：2014-05-27

    申请号：US13082861

    申请日：2011-04-08

    申请人： Pil-Kyu Kang ,  Dae-Lok Bae ,  Gil-Heyun Choi ,  Jong-Myeong Lee

    发明人： Pil-Kyu Kang ,  Dae-Lok Bae ,  Gil-Heyun Choi ,  Jong-Myeong Lee

    IPC分类号： H01L21/20

    CPC分类号： H01L21/02381 ,  G02B6/13 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02675

    摘要： A method of forming a silicon based optical waveguide can include forming a silicon-on-insulator structure including a non-crystalline silicon portion and a single crystalline silicon portion of an active silicon layer in the structure. The non-crystalline silicon portion can be replaced with an amorphous silicon portion and maintaining the single crystalline silicon portion and the amorphous portion can be crystallized using the single crystalline silicon portion as a seed to form a laterally grown single crystalline silicon portion including the amorphous and single crystalline silicon portions.

    摘要翻译： 形成硅基光波导的方法可以包括在该结构中形成包括非晶硅部分和活性硅层的单晶硅部分的绝缘体上硅结构。 可以用非晶硅部分替代非晶硅部分，并且使用单晶硅部分作为种子来保持单晶硅部分和非晶部分可以结晶，以形成横向生长的单晶硅部分，其包括非晶态和 单晶硅部分。

    METHOD FOR FORMING LIGHT GUIDE LAYER IN SEMICONDUCTOR SUBSTRATE
    8.
    发明申请
    METHOD FOR FORMING LIGHT GUIDE LAYER IN SEMICONDUCTOR SUBSTRATE 有权
    在半导体衬底中形成光导层的方法

    公开(公告)号：US20120088323A1

    公开(公告)日：2012-04-12

    申请号：US13243763

    申请日：2011-09-23

    申请人： DAE-LOK BAE ,  Byung-Lyul Park ,  Pil-Kyu Kang ,  Gil-Heyun Choi ,  Kwang-Jin Moon

    发明人： DAE-LOK BAE ,  Byung-Lyul Park ,  Pil-Kyu Kang ,  Gil-Heyun Choi ,  Kwang-Jin Moon

    IPC分类号： H01L33/58 ,  H01L33/02

    CPC分类号： G02B6/138 ,  G02B6/136

    摘要： A method for forming a light guide layer with improved transmission reliability in a semiconductor substrate, the method including forming a trench in the semiconductor substrate, forming a cladding layer and a preliminary light guide layer in the trench such that only one of opposite side end portions of the preliminary light guide layer is in contact with an inner sidewall of the trench, and performing a thermal treatment on the substrate to change the preliminary light guide layer into the light guide layer.

    摘要翻译： 一种在半导体衬底中形成具有改善的透射可靠性的导光层的方法，所述方法包括在所述半导体衬底中形成沟槽，在所述沟槽中形成包覆层和预备导光层，使得只有一个相对侧端部 所述预备光导层与所述沟槽的内侧壁接触，并对所述基板进行热处理，以将所述初步导光层改变为所述导光层。

    Methods of Laterally Forming Single Crystalline Thin Film Regions from Seed Layers
    9.
    发明申请
    Methods of Laterally Forming Single Crystalline Thin Film Regions from Seed Layers 失效
    从种子层单面形成单晶薄膜区域的方法

    公开(公告)号：US20080194083A1

    公开(公告)日：2008-08-14

    申请号：US12061253

    申请日：2008-04-02

    申请人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Pil-Kyu Kang

    发明人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Pil-Kyu Kang

    IPC分类号： H01L21/36

    CPC分类号： H01L21/8221 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02667 ,  H01L27/0688 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/1285 ,  H01L29/78675

    摘要： In a method of manufacturing a semiconductor device, a string structure including a selection transistor and a memory cell on a substrate. An insulation layer pattern is formed on the substrate to cover the string structure. The insulation layer pattern includes at least one opening exposing a portion of the substrate adjacent to the selection transistor. A seed layer including a single-crystalline material is formed in the opening. An amorphous thin film including an amorphous material is formed on the insulation layer pattern and the seed layer. The amorphous thin film is transformed into a single-crystalline thin film, using the single-crystalline material in the seed layer as a seed during a phase transition of the amorphous thin film, to form a channel layer on the insulation layer pattern and the seed layer. Therefore, the semiconductor device including the channel layer having the single-crystalline thin film may be manufactured.

    摘要翻译： 在制造半导体器件的方法中，包括在衬底上的选择晶体管和存储单元的串联结构。 在衬底上形成绝缘层图案以覆盖串结构。 绝缘层图案包括暴露基板的与选择晶体管相邻的部分的至少一个开口。 在开口中形成包括单晶材料的晶种层。 在绝缘层图案和种子层上形成包含非晶材料的非晶态薄膜。 在非晶薄膜的相变期间，将晶种层中的单晶材料作为种子，将非晶薄膜转变为单晶薄膜，以在绝缘层图案和种子上形成沟道层 层。 因此，可以制造包括具有单晶薄膜的沟道层的半导体器件。

    Integrated circuit devices including a transcription-preventing pattern and methods of manufacturing the same
    10.
    发明申请
    Integrated circuit devices including a transcription-preventing pattern and methods of manufacturing the same 失效
    包括转录阻止图案的集成电路装置及其制造方法

    公开(公告)号：US20080093601A1

    公开(公告)日：2008-04-24

    申请号：US11974293

    申请日：2007-10-12

    申请人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Byeong-Chan Lee ,  In-Soo Jung

    发明人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Byeong-Chan Lee ,  In-Soo Jung

    IPC分类号： H01L29/786 ,  H01L29/12 ,  H01L21/84

    CPC分类号： H01L21/823425 ,  H01L21/823475

    摘要： Integrated circuit devices are provided including a first single-crystalline layer and an insulating layer pattern on the first single-crystalline layer. The insulating layer pattern has an opening therein that partially exposes the first single-crystalline layer. A seed layer is in the opening. A second single-crystalline layer is on the insulating layer pattern and the seed layer. The second single-crystalline layer has a crystalline structure substantially the same as that of the seed layer. A transcription-preventing pattern is on the second single-crystalline layer and a third single-crystalline layer on the transcription-preventing pattern and the second single-crystalline layer. The transcription-preventing pattern is configured to limit transcription of defective portions in the second single-crystalline layer into the third single-crystalline layer.

    摘要翻译： 在第一单晶层上提供包括第一单晶层和绝缘层图案的集成电路器件。 绝缘层图案在其中具有部分地暴露第一单晶层的开口。 种子层在开口处。 第二单晶层位于绝缘层图案和籽晶层上。 第二单晶层具有与种子层基本相同的晶体结构。 转录阻止图案位于转录阻止图案和第二单晶层上的第二单晶层和第三单晶层上。 转录阻止图案被配置为将第二单晶层中的缺陷部分的转录限制为第三单晶层。