公开(公告)号：US09002497B2

公开(公告)日：2015-04-07

申请号：US10883372

申请日：2004-07-01

申请人： William Volk ,  James Wiley ,  Sterling Watson ,  Sagar A. Kekare ,  Carl Hess ,  Paul Frank Marella ,  Sharon McCauley ,  Ellis Chang

发明人： William Volk ,  James Wiley ,  Sterling Watson ,  Sagar A. Kekare ,  Carl Hess ,  Paul Frank Marella ,  Sharon McCauley ,  Ellis Chang

IPC分类号： G06F19/00 ,  G03F1/84 ,  G01N21/95 ,  G01N21/956 ,  G03F7/20

CPC分类号： G06T7/0006 ,  G01N21/9501 ,  G01N21/956 ,  G01N2021/95676 ,  G03F1/84 ,  G03F7/7065 ,  G06T7/0008 ,  G06T2207/30148

摘要： Methods and systems for inspection of wafers and reticles using designer intent data are provided. One computer-implemented method includes identifying nuisance defects on a wafer based on inspection data produced by inspection of a reticle, which is used to form a pattern on the wafer prior to inspection of the wafer. Another computer-implemented method includes detecting defects on a wafer by analyzing data generated by inspection of the wafer in combination with data representative of a reticle, which includes designations identifying different types of portions of the reticle. An additional computer-implemented method includes determining a property of a manufacturing process used to process a wafer based on defects that alter a characteristic of a device formed on the wafer. Further computer-implemented methods include altering or simulating one or more characteristics of a design of an integrated circuit based on data generated by inspection of a wafer.

摘要翻译： 提供了使用设计人员意图数据检查晶圆和标线的方法和系统。 一种计算机实现的方法包括基于通过检查光罩产生的检查数据来识别晶片上的有害缺陷，其用于在晶片检查之前在晶片上形成图案。 另一种计算机实现的方法包括通过分析通过检查晶片产生的数据来结合表示标线的数据来检测晶片上的缺陷，该数据包括标识掩模版的不同类型的部分的标记。 附加的计算机实现的方法包括基于改变晶片上形成的器件的特性的缺陷来确定用于处理晶片的制造工艺的特性。 进一步的计算机实现的方法包括基于通过检查晶片产生的数据来改变或模拟集成电路的设计的一个或多个特性。

公开(公告)号：US08831767B2

公开(公告)日：2014-09-09

申请号：US13219607

申请日：2011-08-27

申请人： Kurt Lehman ,  Charles Chen ,  Ronald L. Allen ,  Robert Shinagawa ,  Anantha Sethuraman ,  Christopher F. Bevis ,  Thanassis Trikas ,  Haiguang Chen ,  Ching Ling Meng

发明人： Kurt Lehman ,  Charles Chen ,  Ronald L. Allen ,  Robert Shinagawa ,  Anantha Sethuraman ,  Christopher F. Bevis ,  Thanassis Trikas ,  Haiguang Chen ,  Ching Ling Meng

IPC分类号： G06F19/00 ,  B24B37/013 ,  B24B49/10 ,  B24B41/04 ,  B24B49/12 ,  B24B49/04 ,  B24B37/04

CPC分类号： B24B37/013 ,  B24B37/042 ,  B24B41/04 ,  B24B49/04 ,  B24B49/10 ,  B24B49/12

摘要： Methods and systems for monitoring a parameter of a measurement device during polishing, damage to a specimen during polishing, a characteristic of a polishing pad, or a characteristic of a polishing tool are provided. One method includes scanning a specimen with a measurement device during polishing of a specimen to generate output signals at measurement spots on the specimen. The method also includes determining if the output signals are outside of a range of output signals. Output signals outside of the range may indicate that a parameter of the measurement device is out of control limits. In a different embodiment, output signals outside of the range may indicate damage to the specimen. Another method includes scanning a polishing pad with a measurement device to generate output signals at measurement spots on the polishing pad. The method also includes determining a characteristic of the polishing pad from the output signals.

摘要翻译： 提供了用于在抛光期间监测测量装置的参数的方法和系统，在抛光期间对样本的损坏，抛光垫的特性或抛光工具的特性。 一种方法包括在样品抛光期间用测量装置扫描样品，以在样品上的测量点产生输出信号。 该方法还包括确定输出信号是否在输出信号的范围之外。 超出范围的输出信号可能表示测量设备的参数失控。 在不同的实施例中，在该范围之外的输出信号可以指示对样本的损伤。 另一种方法包括用测量装置扫描抛光垫以在抛光垫上的测量点产生输出信号。 该方法还包括从输出信号确定抛光垫的特性。

公开(公告)号：US08765496B2

公开(公告)日：2014-07-01

申请号：US12110759

申请日：2008-04-28

申请人： Mehran Nasser-Ghodsi ,  Mark Borowicz ,  Dave Bakker ,  Mehdi Vaez-Iravani ,  Prashant Aji ,  Rudy Garcia ,  Tzu Chin Chuang

发明人： Mehran Nasser-Ghodsi ,  Mark Borowicz ,  Dave Bakker ,  Mehdi Vaez-Iravani ,  Prashant Aji ,  Rudy Garcia ,  Tzu Chin Chuang

IPC分类号： H01L21/00

CPC分类号： H01J37/317 ,  G01N1/32 ,  H01J37/244 ,  H01J37/3005 ,  H01J2237/2814 ,  H01J2237/3174 ,  H01J2237/31745

摘要： Methods and systems for measuring a characteristic of a substrate or preparing a substrate for analysis are provided. One method for measuring a characteristic of a substrate includes removing a portion of a feature on the substrate using an electron beam to expose a cross-sectional profile of a remaining portion of the feature. The feature may be a photoresist feature. The method also includes measuring a characteristic of the cross-sectional profile. A method for preparing a substrate for analysis includes removing a portion of a material on the substrate proximate to a defect using chemical etching in combination with an electron beam. The defect may be a subsurface defect or a partially subsurface defect. Another method for preparing a substrate for analysis includes removing a portion of a material on a substrate proximate to a defect using chemical etching in combination with an electron beam and a light beam.

摘要翻译： 提供了用于测量基板的特性或准备用于分析的基板的方法和系统。 用于测量衬底的特性的一种方法包括使用电子束去除衬底上的特征的一部分以暴露特征的剩余部分的横截面轮廓。 该特征可以是光致抗蚀剂特征。 该方法还包括测量横截面轮廓的特性。 制备用于分析的基板的方法包括使用化学蚀刻与电子束结合来去除靠近缺陷的衬底上的材料的一部分。 缺陷可能是地下缺陷或部分地下缺陷。 制备用于分析的衬底的另一种方法包括使用化学蚀刻与电子束和光束组合地去除邻近缺陷的衬底上的材料的一部分。

公开(公告)号：US08139843B2

公开(公告)日：2012-03-20

申请号：US13115957

申请日：2011-05-25

申请人： Ashok Kulkarni ,  Brian Duffy ,  Kais Maayah ,  Gordon Rouse

发明人： Ashok Kulkarni ,  Brian Duffy ,  Kais Maayah ,  Gordon Rouse

IPC分类号： G06K9/00

CPC分类号： G06F17/5045 ,  H01L21/67005

摘要： Various methods and systems for utilizing design data in combination with inspection data are provided. One computer-implemented method for binning defects detected on a wafer includes comparing portions of design data proximate positions of the defects in design data space. The method also includes determining if the design data in the portions is at least similar based on results of the comparing step. In addition, the method includes binning the defects in groups such that the portions of the design data proximate the positions of the defects in each of the groups are at least similar. The method further includes storing results of the binning step in a storage medium.

摘要翻译： 提供了与检测数据结合使用设计数据的各种方法和系统。 用于对在晶片上检测到的缺陷进行合并的计算机实现的方法包括将设计数据的部分靠近设计数据空间中的缺陷的位置进行比较。 该方法还包括基于比较步骤的结果确定部分中的设计数据是否至少相似。 此外，该方法包括将组中的缺陷合并成使得设计数据中靠近每个组中的缺陷的位置的部分至少相似。 该方法还包括将合并步骤的结果存储在存储介质中。

公开(公告)号：US07894659B2

公开(公告)日：2011-02-22

申请号：US11680152

申请日：2007-02-28

申请人： Chien-Huei (Adam) Chen ,  Xiaoming Wang ,  Eugene Shifrin ,  Tsung-Pao Fang

发明人： Chien-Huei (Adam) Chen ,  Xiaoming Wang ,  Eugene Shifrin ,  Tsung-Pao Fang

IPC分类号： G06K9/00

CPC分类号： G06T7/001 ,  G06T7/11 ,  G06T7/187 ,  G06T2207/10056 ,  G06T2207/30148

摘要： Methods for identifying an edge of a care area for an array area formed on a wafer and/or for binning defects detected in the array area are provided. One method for identifying an edge of a care area for an array area formed on a wafer includes determining a value for a difference image as a function of position from a position known to be inside the array area to a position known to be outside of the array area. The method also includes identifying the position that is located closest to the inside of the array area and that has the value greater than a threshold as a position of the edge of the care area.

摘要翻译： 提供了用于识别在晶片上形成的阵列区域的护理区域的边缘和/或用于合并在阵列区域中检测到的缺陷的方法。 用于识别形成在晶片上的阵列区域的护理区域的边缘的一种方法包括从已知在阵列区域内的位置到已知在阵列区域外的位置确定作为位置的函数的差异图像的值 阵列区域。 该方法还包括识别位于最靠近阵列区域内部并且具有大于阈值的值作为护理区域的边缘的位置的位置。

公开(公告)号：US07867693B1

公开(公告)日：2011-01-11

申请号：US11681008

申请日：2007-03-01

申请人： Walter D. Mieher

发明人： Walter D. Mieher

IPC分类号： G03F7/20 ,  G03F7/00 ,  G03F7/26 ,  G03F7/40

CPC分类号： H01L21/32139 ,  G03F7/70466 ,  H01L21/0337

摘要： Methods for forming device structures on a wafer are provided. One method includes transferring approximately an inverse of patterned features formed in a positive resist layer on the wafer to a device material on the wafer to form the device structures in the device material. Another method includes transferring approximately an inverse of patterned features formed in a sacrificial layer on the wafer to a device material on the wafer to form the device structures in the device material.

摘要翻译： 提供了在晶片上形成器件结构的方法。 一种方法包括将形成在晶片上的正抗蚀剂层中的图案化特征的大致倒数转移到晶片上的器件材料上，以在器件材料中形成器件结构。 另一种方法包括将形成在晶片上的牺牲层中的图案化特征的大致倒数转移到晶片上的器件材料上以在器件材料中形成器件结构。

公开(公告)号：US07711521B1

公开(公告)日：2010-05-04

申请号：US12119179

申请日：2008-05-12

申请人： Sean Wu ,  Haiguang Chen ,  Michael D. Kirk

发明人： Sean Wu ,  Haiguang Chen ,  Michael D. Kirk

IPC分类号： G06F11/30

CPC分类号： G06T7/0006 ,  G01N21/8851 ,  G01N21/9501 ,  G06T2207/10056 ,  G06T2207/20061 ,  G06T2207/30148

摘要： Various methods and systems for detection of selected defects particularly in relatively noisy inspection data are provided. One method includes applying a spatial filter algorithm to raw inspection data acquired across an area on a substrate to determine a first portion of the raw inspection data that has a higher probability of being a selected type of defect than a second portion of the raw inspection data. The selected type of defect includes a non-point defect. The method also includes generating a raw two-dimensional map illustrating the first portion of the raw inspection data. In addition, the method includes searching the raw two-dimensional map for an event that has spatial characteristics that approximately match spatial characteristics of the selected type of defect. The method further includes determining if the event corresponds to a defect having the selected type.

摘要翻译： 提供用于检测所选缺陷的各种方法和系统，特别是在相对嘈杂的检查数据中。 一种方法包括将空间滤波器算法应用于跨越衬底上的区域获取的原始检查数据，以确定原始检查数据的第一部分与原始检查数据的第二部分相比具有较高选择类型的缺陷概率 。 所选择的缺陷类型包括非点缺陷。 该方法还包括生成示出原始检查数据的第一部分的原始二维映射。 此外，该方法包括搜索原始二维地图中具有与所选择的缺陷类型的空间特征近似匹配的空间特征的事件。 该方法还包括确定事件是否对应于具有所选类型的缺陷。

公开(公告)号：US07689966B2

公开(公告)日：2010-03-30

申请号：US11226698

申请日：2005-09-14

申请人： Gaurav Verma ,  Lance Glasser ,  Moshe E. Preil

发明人： Gaurav Verma ,  Lance Glasser ,  Moshe E. Preil

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G03F1/36

摘要： Various computer-implemented methods are provided. One method for evaluating reticle layout data includes generating a simulated image using the reticle layout data as input to a model of a reticle manufacturing process. The simulated image illustrates how features of the reticle layout data will be formed on a reticle by the reticle manufacturing process. The method also includes determining manufacturability of the reticle layout data using the simulated image. The manufacturability is a measure of how accurately the features will be formed on the reticle. Also provided are various carrier media that include program instructions executable on a computer system for performing a method for evaluating reticle layout data as described herein. In addition, systems configured to evaluate reticle layout data are provided. The systems include a computer system and a carrier medium that includes program instructions executable on the computer system for performing method(s) described herein.

摘要翻译： 提供了各种计算机实现的方法。 用于评估标线布局数据的一种方法包括使用标线布局数据作为对标线制造工艺的模型的输入来生成模拟图像。 模拟图像说明如何通过标线制造过程在掩模版上形成标线布局数据的特征。 该方法还包括使用模拟图像确定标线布局数据的可制造性。 可制造性是衡量在光罩上形成特征的准确度。 还提供了各种载体介质，其包括可在计算机系统上执行的程序指令，用于执行如本文所述的用于评估标线布局数据的方法。 此外，还提供了配置为评估标线布局数据的系统。 该系统包括计算机系统和载体介质，其包括可在计算机系统上执行以执行本文所述的方法的程序指令。

公开(公告)号：US07678516B2

公开(公告)日：2010-03-16

申请号：US11187609

申请日：2005-07-22

申请人： Kevin Monahan ,  Brad Eichelberger ,  Ady Levy

发明人： Kevin Monahan ,  Brad Eichelberger ,  Ady Levy

IPC分类号： G03F7/00 ,  G01R31/26 ,  H01L21/66

CPC分类号： G03F7/70633 ,  G03F7/70625 ,  G03F7/70641 ,  G03F7/70683 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

摘要： Various test structures and methods for monitoring or controlling a semiconductor fabrication process are provided. One test structure formed on a wafer as a monitor for a lithography process includes a bright field target that includes first grating structures. The test structure also includes a dark field target that includes second grating structures. The first and second grating structures have one or more characteristics that are substantially the same as one or more characteristics of device structures formed on the wafer. In addition, the test structure includes a phase shift target having characteristics that are substantially the same as the characteristics of the bright field or dark field target except that grating structures of the phase shift target are shifted in optical phase from the first or second grating structures. One or more characteristics of the targets can be measured and used to determine parameter(s) of the lithography process.

摘要翻译： 提供了用于监测或控制半导体制造工艺的各种测试结构和方法。 在作为光刻处理的监视器的晶片上形成的一个测试结构包括包括第一光栅结构的明场目标。 测试结构还包括包括第二光栅结构的暗场目标。 第一和第二光栅结构具有与形成在晶片上的器件结构的一个或多个特性基本上相同的一个或多个特性。 此外，测试结构包括具有与亮场或暗场目标的特性基本相同的特性的相移靶，除了相移靶的光栅结构从光学相位从第一或第二光栅结构 。 可以测量目标的一个或多个特性并用于确定光刻工艺的参数。

公开(公告)号：US07671982B2

公开(公告)日：2010-03-02

申请号：US12251227

申请日：2008-10-14

申请人： Christian H. Wolters ,  Anatoly Romanovsky

发明人： Christian H. Wolters ,  Anatoly Romanovsky

IPC分类号： G01N21/00

CPC分类号： G01N21/47 ,  G01N21/21 ,  G01N21/9501 ,  G01N21/95607

摘要： Inspection systems, circuits, and methods are provided to enhance defect detection by reducing thermal damage to large particles by dynamically altering the incident laser beam power level supplied to the specimen during a surface inspection scan. In one embodiment, an inspection system includes an illumination subsystem for directing light to a specimen at a first power level, a detection subsystem for detecting light scattered from the specimen, and a power attenuator subsystem for dynamically altering the power level directed to the specimen based on the scattered light detected from the specimen. The power attenuator subsystem may reduce the directed light to a second power level, which is lower than the first, if the detected scattered light exceeds a predetermined threshold level. The systems and methods described herein may also be used to extend the measurement detection range of an inspection system by providing a variable-power inspection system.

摘要翻译： 提供检查系统，电路和方法以通过在表面检查扫描期间动态地改变提供给样本的入射激光束功率水平来减小对大颗粒的热损伤来增强缺陷检测。 在一个实施例中，检查系统包括用于将光引导到第一功率级的样本的照明子系统，用于检测从样本散射的光的检测子系统和用于动态地改变针对标本的功率水平的功率衰减器子系统 对从样品检测到的散射光。 如果检测到的散射光超过预定的阈值电平，则功率衰减器子系统可将定向光减少至低于第一功率电平的第二功率电平。 本文所述的系统和方法还可以用于通过提供可变功率检查系统来扩展检查系统的测量检测范围。