公开(公告)号：EP4439660A1

公开(公告)日：2024-10-02

申请号：EP24164787.4

申请日：2024-03-20

申请人： STMicroelectronics International N.V.

发明人： SUTERA, Dario

IPC分类号： H01L23/495 ,  H01L25/07

CPC分类号： H01L23/49562 ,  H01L23/49575 ,  H01L23/49517 ,  H01L25/071 ,  H01L25/072 ,  H01L23/49537 ,  H01L23/3107 ,  H01L23/051

摘要： A power module (21) includes an insulating body (30) having a first main face (30a) and a second main face (30b); a first contact plate (27) and a second contact plate (28), respectively protruding through the first main face (30a) and through the second main face (30b) of the insulating body (30) and accessible from the outside of the power module (21); a first power plate (31) and a second power plate (33), at least partially embedded in the insulating body (30), facing each other and having plane faces perpendicular to a first direction (Z). Power devices (22) of a first group (21a) are accommodated on the first power plate (31) and coupled to the first contact plate (27). Power devices (22) of a second group (21b) are accommodated on the second power plate (33) and coupled to the second contact plate (28). The first contact plate (27), the second contact plate (28), the first power plate (31) and the second power plate (33), are stacked along the first direction (Z) .

公开(公告)号：EP2002478B1

公开(公告)日：2016-09-07

申请号：EP07735213.6

申请日：2007-03-23

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： WYLAND, Chris

IPC分类号： H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L23/538 ,  H01L21/60 ,  H01L23/485 ,  H01L23/488 ,  H01L23/49

CPC分类号： H01L24/49 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49517 ,  H01L23/4952 ,  H01L23/49558 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/91 ,  H01L2223/6611 ,  H01L2224/24226 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4556 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49175 ,  H01L2224/73277 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2924/01004 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

摘要： Consistent with an example embodiment, there is an integrated circuit (IC) device in a packaging having electrically insulated connections. The IC device comprises a semiconductor device (100) mounted onto a die attachment area (10); the semiconductor device has a plurality of bonding pads (20a, 25a, 30a, 35a). A lead frame having a plurality of bonding fingers (20b, 25b, 30b, 35b) surrounds the die attachment area. A plurality of mutually isolated connection conductors (25d, 30d, 40, 50) having respective first ends are attached to respective bonding pads on the semiconductor device and the plurality of mutually isolated connection conductors having respective second respective second ends are attached to respective bonding fingers of the lead frame. An insulating material (45) coats at least a portion of the plurality of mutually isolated connection conductors. The mutually isolated connection conductors may include a bond wire (40, 50) for the signal connection and a conductive strap (25d, 30d) for the voltage reference connection. The insulating material (45) coating the bond wires reduces the likelihood of short circuits during encapsulation.

公开(公告)号：EP3035384A3

公开(公告)日：2016-07-06

申请号：EP15192672.2

申请日：2015-11-03

申请人： Infineon Technologies Americas Corp.

发明人： Cho, Eung San

IPC分类号： H01L23/495

CPC分类号： H01L23/49575 ,  H01L23/49517 ,  H01L23/49524 ,  H01L23/49562 ,  H01L2224/32245 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/37184 ,  H01L2224/37599 ,  H01L2224/40137 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A power semiconductor package is disclosed. The power semiconductor package includes a leadframe having partially etched segments and at least one non-etched segment, a first semiconductor die having a first power transistor and a driver integrated circuit (IC) monolithically formed thereon, a second semiconductor die having a second power transistor, wherein the first semiconductor die and the second semiconductor die are configured for attachment to the partially etched segments, and wherein the partially etched segments and the at least one non-etched segment enable the first semiconductor die to be coupled to the second semiconductor die by a legless conductive clip.

摘要翻译： 公开了一种功率半导体封装。 该功率半导体封装包括具有部分蚀刻区段和至少一个非蚀刻区段的引线框，具有第一功率晶体管和在其上单片形成的驱动器集成电路（IC）的第一半导体管芯，具有第二功率晶体管 ，其中所述第一半导体管芯和所述第二半导体管芯被配置用于附接到所述部分蚀刻的节段，并且其中所述部分蚀刻的节段和所述至少一个非蚀刻节段使得所述第一半导体管芯能够通过以下方式耦合到所述第二半导体管芯： 无腿的导电夹。

公开(公告)号：EP3007227A1

公开(公告)日：2016-04-13

申请号：EP15185158.1

申请日：2015-09-15

申请人： International Rectifier Corporation

发明人： CHO, Eung San ,  CHEAH, Chuan

IPC分类号： H01L25/11 ,  H01L23/31 ,  H01L23/495

CPC分类号： H01L23/04 ,  H01L23/3107 ,  H01L23/49517 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/5386 ,  H01L23/58 ,  H01L25/074 ,  H01L25/115 ,  H01L25/117 ,  H01L25/18 ,  H01L29/16 ,  H01L29/2003 ,  H01L29/778 ,  H01L29/7827 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014

摘要： There are disclosed herein various implementations of a compact high-voltage semiconductor package. In one exemplary implementation, such a semiconductor package includes a power transistor, as well as a drain contact, a source contact, and a gate contact to provide external connections to the power transistor. The semiconductor package also includes a contour element formed between the drain contact and the source contact in the semiconductor package. The contour element increases a creepage distance between the drain contact and the source contact in the semiconductor package so as to increase a breakdown voltage of the semiconductor package.

摘要翻译： 这里公开了紧凑型高压半导体封装的各种实现方式。 在一个示例性实施例中，这种半导体封装包括功率晶体管以及漏极接触，源极接触和栅极接触，以提供到功率晶体管的外部连接。 半导体封装还包括在半导体封装中的漏极接触件和源极接触件之间形成的轮廓元件。 轮廓元件增加了半导体封装中的漏极接触和源极接触之间的爬电距离，以增加半导体封装的击穿电压。

公开(公告)号：EP2745319A4

公开(公告)日：2015-12-23

申请号：EP12834991

申请日：2012-09-28

申请人： MEDIATEK INC

发明人： CHEN NAN-JANG

IPC分类号： H01L23/495 ,  H01L23/12 ,  H01L23/48

CPC分类号： H01L23/49589 ,  H01L23/49503 ,  H01L23/49517 ,  H01L23/49541 ,  H01L23/49575 ,  H01L2224/32245 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49109 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012

公开(公告)号：EP2924731A1

公开(公告)日：2015-09-30

申请号：EP14161346.3

申请日：2014-03-24

申请人： NXP B.V.

发明人： Cuoco,, Vittorio ,  van Zuijlen, Albert Gerardus Wilhelmus Philipus ,  van der Zanden, Josephus Henricus Bartholomeus

IPC分类号： H01L23/66 ,  H01L23/00 ,  H01L23/13 ,  H01L23/367 ,  H01L23/528

CPC分类号： H01L23/49541 ,  H01L23/13 ,  H01L23/36 ,  H01L23/492 ,  H01L23/49517 ,  H01L23/49811 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1421 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2224/45099 ,  H01L2224/05599

摘要： An integrated circuit arrangement (200) comprising a substrate and a flange (206) disposed on top of the substrate. The flange (206) comprises a cantilever portion (208) configured to project over the substrate. A die (210) disposed on top of the flange (206). A first output terminal (218) disposed on the substrate. A first lead (216) configured to provide for an electrical connection between the die (210) and the first output terminal (218). A first electrically conducting member (290) configured to provide at least part of a current return path between the substrate and the die (210) and arranged to bridge a gap between the cantilever portion (208) and the substrate. The first electrically conducting member (290) is disposed between the die (210) and the first output terminal (218) and is configured to enable electrical current to flow from the substrate to the cantilever portion (208) of the flange (206).

摘要翻译： 一种集成电路装置（200），包括衬底和设置在衬底顶部的凸缘（206）。 凸缘（206）包括构造成在基板上方突出的悬臂部分（208）。 模具（210）设置在凸缘（206）的顶部上。 布置在衬底上的第一输出端子（218）。 第一引线（216）被配置为提供管芯（210）和第一输出端子（218）之间的电连接。 第一导电构件（290）被配置为提供基板和管芯（210）之间的电流返回路径的至少一部分，并且被布置成桥接悬臂部分（208）和基板之间的间隙。 第一导电构件（290）设置在管芯（210）和第一输出端子（218）之间，并被配置为使电流能够从基板流动到凸缘（206）的悬臂部分（208）。

公开(公告)号：EP2790213A3

公开(公告)日：2015-04-01

申请号：EP14164158.9

申请日：2014-04-10

申请人： Fan, Chun Ho

发明人： Fan, Chun Ho

IPC分类号： H01L23/057 ,  H01L21/50 ,  H01L23/495

CPC分类号： H01L23/49506 ,  H01L21/4839 ,  H01L21/50 ,  H01L21/56 ,  H01L23/057 ,  H01L23/495 ,  H01L23/49517 ,  H01L23/49551 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K2201/068 ,  H05K2201/10378 ,  H01L2924/00

摘要： A cavity package is provided. The package can include a metal leadframe and a substrate attached to an interposer formed as part of the leadframe. The substrate typically has a coefficient of thermal expansion matched to the coefficient of thermal expansion of a semiconductor device to be affixed to the substrate. The semiconductor device is typically attached to an exposed top surface of the substrate. The cavity package also includes a plastic portion molded to the leadframe forming a substrate cavity. The substrate cavity allows access to the exposed top surface of the substrate for affixing the semiconductor device. The cavity package also include a connective element for grounding a lid through an electrical path from the lid to the interposer.

摘要翻译： 提供腔体包装。 封装可以包括金属引线框架和附接到形成为引线框架的一部分的插入件的基板。 衬底通常具有与待固定到衬底的半导体器件的热膨胀系数相匹配的热膨胀系数。 半导体器件通常附接到衬底的暴露的顶表面。 空腔封装还包括模制到引线框架的塑料部分，形成衬底空腔。 衬底空腔允许进入衬底的暴露的顶表面以固定半导体器件。 空腔封装还包括连接元件，用于通过从盖到插入件的电气路径将盖接地。

公开(公告)号：EP2769411A1

公开(公告)日：2014-08-27

申请号：EP12787211.7

申请日：2012-10-16

申请人： Invensas Corporation

发明人： CHAU, Ellis ,  CO, Reynaldo ,  ALATORRE, Roseann ,  DAMBERG, Philip ,  WANG, Wei-shun ,  YANG, Se, Young ,  ZHAO, Zhijun

IPC分类号： H01L25/10 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498 ,  H01L21/48

CPC分类号： H01L24/85 ,  H01L21/4853 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49517 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/16 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/78 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48997 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73207 ,  H01L2224/73253 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/851 ,  H01L2224/8518 ,  H01L2224/85399 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/1715 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2924/3511 ,  H05K3/3436 ,  H05K2201/10515 ,  H05K2201/1053 ,  Y10T29/49149 ,  Y10T29/49151 ,  H01L2224/45664 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076

摘要： A microelectronic package can include wire bonds having bases bonded to respective ones of conductive elements exposed at a surface of a substrate. The wire bonds may have exterior edge surfaces disposed at an angle between 25° and 90° relative to the bases, and ends remote, e.g., opposite, from the bases, and remote from the ends which are connected to the bases. A dielectric encapsulation layer extends from the substrate and covers portions of the wire bonds such that covered portions of the wire bonds are separated from one another by the encapsulation layer, wherein unencapsulated portions of the wire bonds are defined by portions of the wire bonds that are uncovered by the encapsulation layer, the unencapsulated portions including the ends of the wire bonds.

摘要翻译： 微电子封装可以包括引线键合，其具有结合到在衬底的表面上暴露的导电元件的相应导体的基底。 线接合可以具有相对于基部以25°至90°之间的角度设置的外部边缘表面，并且远离基部远离，例如相对，并远离连接到基座的端部。 电介质封装层从衬底延伸并覆盖引线接合的部分，使得引线键合的被覆部分通过封装层彼此分离，其中引线键合的未封装部分由引线键的部分限定， 被封装层未覆盖，未包封的部分包括引线的端部。

公开(公告)号：EP2733727A4

公开(公告)日：2014-08-27

申请号：EP13756799

申请日：2013-04-25

申请人： HUAWEI TECH CO LTD

发明人： CHEN KAI ,  LIU ZHIHUA ,  JIANG RAN

IPC分类号： H01L21/48 ,  H01L23/495

CPC分类号： H01L21/4828 ,  H01L21/4825 ,  H01L21/4832 ,  H01L23/3107 ,  H01L23/49517 ,  H01L23/49805 ,  H01L24/48 ,  H01L24/73 ,  H01L24/85 ,  H01L2224/32245 ,  H01L2224/48249 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2224/48247 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

公开(公告)号：EP2745319A1

公开(公告)日：2014-06-25

申请号：EP12834991.7

申请日：2012-09-28

申请人： Mediatek Inc.

发明人： CHEN, Nan-Jang

IPC分类号： H01L23/495 ,  H01L23/48 ,  H01L23/12

CPC分类号： H01L23/49589 ,  H01L23/49503 ,  H01L23/49517 ,  H01L23/49541 ,  H01L23/49575 ,  H01L2224/32245 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49109 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package (10) includes a die pad (14), at least one semiconductor die (12a) mounted on the die pad (14), a plurality of leads (16) disposed along peripheral edges of the die pad (14), at least one connecting bar (142) for supporting the die pad (14), a first power bar (160a) disposed on one side of the connecting bar (142), a second power bar (160b) disposed on the other side of the connecting bar (142), and a connection member (28) traversing the connecting bar (142) and electrically connecting the first power bar (160a) with the second power bar (160b).