公开(公告)号：EP1087647B1

公开(公告)日：2007-11-21

申请号：EP00308360.7

申请日：2000-09-22

Applicant: Rohm and Haas Chemicals LLC

Inventor： Carpenter, Richard W.

IPC: H05K1/16

CPC classification number: H05K1/167 ,  H05K1/162 ,  H05K1/165 ,  H05K3/0064 ,  H05K3/06 ,  H05K3/4611 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2201/09672 ,  H05K2203/0338 ,  H05K2203/1338 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155

公开(公告)号：EP1082882B1

公开(公告)日：2007-10-31

申请号：EP00923062.4

申请日：2000-01-18

Applicant: MOTOROLA, INC.

Inventor： DUNN, Gregory, J. ,  ZHANG, Min-Xian ,  SAVIC, John

IPC: H05K1/16 ,  H01L21/302

CPC classification number: H05K1/167 ,  H05K1/095 ,  H05K3/388 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2201/0391 ,  H05K2203/0361 ,  H05K2203/0723 ,  H05K2203/1453 ,  Y10T29/49082 ,  Y10T29/49099 ,  Y10T29/4913

Abstract: Printed circuit boards (6) with integral high and low value resistors (2 and 4) are efficiently produced. The method of their manufacture entails applying a first layer of a low resistance material (8) onto a dielectric substrate (6) in a predetermined thickness and pattern. The pattern defines the electrical lengths and widths of low value resistors (2), as well as pairs of terminal electrode pads (28 and 30) for the high value resistors (4). A second layer of a high resistance material (18) is applied between and in contact with the top surfaces of the facing ends of each member of the terminal pad pairs (28 and 30). The fixed lengths, widths and thicknesses of the patterned high resistance material determine the values of the high value resistors. Conductive metal terminals are provided at the ends of the low value resistors and at the distal ends of the high value resistor pad to complete the resistors.

公开(公告)号：EP1817634A1

公开(公告)日：2007-08-15

申请号：EP05811454.7

申请日：2005-11-28

Applicant: TOKYO OHKA KOGYO CO., LTD.

Inventor： MISUMI, Koichi c/o Tokyo Ohka Kogyo Co., Ltd. ,  SAITO, Koji c/o Tokyo Ohka Kogyo Co., Ltd. ,  ISHIKAWA, Kaoru c/o Tokyo Ohka Kogyo Co., Ltd.

IPC: G03F7/11 ,  G03F7/039

CPC classification number: H05K3/108 ,  G03F7/0397 ,  G03F7/11 ,  H05K3/384 ,  H05K2201/0317

Abstract: This process for producing a resist pattern includes: the step of laminating (a) a support having an upper surface on which copper exists, (b) an inorganic substance layer consisting of an inorganic substance supplied from an inorganic substance source, and (c) a photoresist layer consisting of a chemically amplified type positive photoresist composition, to obtain a photoresist laminate, the step of selectively irradiating active light or radioactive rays to said photoresist laminate, and the step of developing said (c) photoresist layer together with said (b) inorganic substance layer to form a resist pattern.

公开(公告)号：EP1429590A4

公开(公告)日：2007-07-11

申请号：EP02765602

申请日：2002-09-19

Applicant: SONY CORP

Inventor： OGAWA TSUYOSHI

IPC: H05K3/38 ,  H05K3/46 ,  H01L23/12 ,  H01L23/14 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/52 ,  H01L23/538 ,  H01L25/00 ,  H01L25/16 ,  H05K1/16 ,  H05K3/06

CPC classification number: H01L23/49894 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/498 ,  H01L23/49822 ,  H01L24/48 ,  H01L25/16 ,  H01L2224/16 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12042 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H05K1/16 ,  H05K1/162 ,  H05K1/167 ,  H05K3/062 ,  H05K3/067 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/0317 ,  H05K2201/0338 ,  H05K2201/09509 ,  H05K2203/0315 ,  H05K2203/0361 ,  H05K2203/1453 ,  Y10S438/957 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A thin film circuit board device having passive elements in a wiring layer comprises a base substrate (2) and a circuit section (3) with insulation layers (11) (16) pattern wirings (14) (17) formed on a build-up face (2a), and a receiving electrode section (21) on the first insulation layer (11), and with a passive element electrically connected to the receiving electrode section (21). The circuit section (3) comprises a substrate layer (23) and substrate titanium layer (22) formed by so stacking a substrate titanium film and substrate film as to coat the receiving electrode section (21) and each passive element, and by etching the substrate film and substrate titanium film in a region free of the metal film with a mask of a metal film of the first pattern wiring (14) formed on the substrate film. Thus, the substrate titanium film serving as the substrate titanium layer (22) prevents the receiving electrode section and each passive element from being corroded by an etchant, so that a high-performance passive element is constituted.

公开(公告)号：EP1435658A4

公开(公告)日：2006-10-25

申请号：EP02779905

申请日：2002-10-07

Applicant: TOKUYAMA CORP

Inventor： YAMAMOTO REO ,  KAMIYAMA YOSHIHIDE

IPC: H01L23/13 ,  H01L23/15 ,  H01L23/36 ,  H01L23/498 ,  H01S5/022 ,  H05K1/02 ,  H05K1/03 ,  H05K1/11 ,  H05K3/00 ,  H05K3/06 ,  H05K3/14 ,  H05K3/24 ,  H05K3/40 ,  H01L23/12

CPC classification number: H01L23/49811 ,  H01L23/15 ,  H01L23/49827 ,  H01L2924/0002 ,  H05K1/0206 ,  H05K1/0306 ,  H05K1/114 ,  H05K3/0008 ,  H05K3/0082 ,  H05K3/064 ,  H05K3/246 ,  H05K3/4061 ,  H05K2201/0317 ,  H05K2201/0347 ,  H05K2201/10674 ,  H05K2203/167 ,  Y10T29/49156 ,  Y10T29/49165 ,  H01L2924/00

Abstract: It is an object to provide a method of efficiently manufacturing a double-sided circuit board having a metallic via hole which can suitably be used as a submount for mounting a semiconductor device, that is, a substrate in which the electrical contact of a metallic via hole and a circuit pattern is excellent and an element can easily be bonded and positioned. In a ceramic substrate having a via hole filled with a conductive material, a ceramic portion of at least one of faces of the ceramic substrate has a surface roughness of Ra ≤ 0.8 mu m, a substrate in which the conductive material filled in the via hole present on at least one of the faces is protruded from a surface of the face with a height of 0.3 to 5.0 mu m is used as a material substrate and a conductive layer is formed on the surface, and subsequently, the conductive layer is patterned and a solder film pattern for element mounting is formed based on a position of a convex portion of the conductive layer which results from the via hole present on an underlaid portion of the conductive layer.

Abstract translation: 一种双面电路基板，具有金属通路孔并适合用作安装半导体元件的基板，以及一种有效地制造基板的方法，该基板确保金属通路孔与电路图案之间的良好电接触并便于定位元件 结合。 具有内部填充有导电材料的通孔的陶瓷基板在陶瓷基板的至少一侧上的陶瓷部分处具有Ra≤0.8μm的表面粗糙度。 填充至少一侧上存在的通孔的导电材料从表面突出0.3-5.0μm的衬底被用作材料衬底，并且在其表面上形成导电层之后，导电层被图案化或者 基于由存在于导电层下方的通孔产生的导电层的突出部分的位置形成用于安装元件的焊料膜。

公开(公告)号：EP0941545B1

公开(公告)日：2006-01-11

申请号：EP98923002.4

申请日：1998-06-11

Applicant: Koninklijke Philips Electronics N.V.

Inventor： NELLISSEN, Antonius, Johannes, Maria ,  VAN GRUNSVEN, Erik, Cornelis, Egbertus

IPC: H01G4/33

CPC classification number: H01G13/00 ,  H05K1/0306 ,  H05K3/0052 ,  H05K3/0082 ,  H05K3/0097 ,  H05K3/108 ,  H05K3/3442 ,  H05K3/388 ,  H05K3/403 ,  H05K2201/0317 ,  Y10T29/435 ,  Y10T29/49004 ,  Y10T29/4902

Abstract: A method of manufacturing a plurality of thin-film, surface-mountable, electronic components (23), comprising the following successive steps: a) providing a substantially planar, ceramic substrate (1) having a first (a) and second (1b) major surface which are mutually parallel, the substrate (1) containing a series of mutually parallel slots (3) which extend from the first major surface (1a) through to the second major surface (1b), such slots (3) serving to subdivide the substrate (1) into elongated segments (5) extending parallel to the slots (3) and located between consecutive pairs thereof, each segment (5) having two oppositely located walls (7a, 7b) extending along the edges of the adjacent slots (3), each segment carrying a thin-film electrode structure (9) on at least one of its first (1a) and second (1b) major surfaces; b) with the aid of a three-dimensional lithographic technique, providing electrical contacts (21) which extend along both walls (7a, 7b) of each segment (5) and which make electrical contact with the electrode structure (9) on each segment (5); c) severing the segments (5) into individual block-shaped components (23) by severing them along a series of division lines (25) extending substantially perpendicular to the walls (7a, 7b) of each segment (5). This method can be used to manufacture various types of component (23), such as thin-film resistors, fuses, capacitors and inductors, but also passive networks, such as RC and LCR networks.

公开(公告)号：EP1429590A1

公开(公告)日：2004-06-16

申请号：EP02765602.4

申请日：2002-09-19

Applicant: Sony Corporation

Inventor： OGAWA, Tsuyoshi, c/o SONY CORPORATION

IPC: H05K3/46 ,  H01L23/12 ,  H01L23/14 ,  H01L23/52

CPC classification number: H01L23/49894 ,  H01L23/3121 ,  H01L23/3677 ,  H01L23/498 ,  H01L23/49822 ,  H01L24/48 ,  H01L25/16 ,  H01L2224/16 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/12042 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/3025 ,  H05K1/16 ,  H05K1/162 ,  H05K1/167 ,  H05K3/062 ,  H05K3/067 ,  H05K3/388 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/0317 ,  H05K2201/0338 ,  H05K2201/09509 ,  H05K2203/0315 ,  H05K2203/0361 ,  H05K2203/1453 ,  Y10S438/957 ,  H01L2924/00 ,  H01L2224/0401 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention relates to a thin film circuit board device having passive elements in wiring layers. The thin film circuit board device includes a base board (2) and a circuit part (3) including insulating layers (11) and (16) and pattern wiring (14) and (17) formed on a build-up forming surface (2a). On the first insulating layer (11), a receiving electrode part (21) is formed and the passive elements electrically connected to the receiving electrode part (21) are formed. In the circuit part (3), a substrate titanium film and a substrate film are laminated so as to cover the receiving electrode part (21) and the passive elements respectively. The substrate film and the substrate titanium film in areas in which a metallic film is not formed are etched through the metallic film serving as the first pattern wiring (14) formed on the substrate film as a mask. Thus, a substrate layer (23) and a substrate titanium layer (22) are formed. Consequently, the substrate titanium film serving as the substrate titanium layer (22) prevents the corrosion of the receiving electrode part and the respective passive elements due to etching liquid to form the passive elements with high performance.

Abstract translation: 本发明涉及一种在布线层中具有无源元件的薄膜电路板器件。 薄膜电路板装置包括基板（2）和包括绝缘层（11）和（16）的电路部分（3）和形成在积聚形成表面（2a）上的图案布线（14）和（17） ）。 在第一绝缘层（11）上，形成接收电极部（21），并且形成与接收电极部（21）电连接的无源元件。 在电路部（3）中，层叠基板钛膜和基板膜，以分别覆盖接收电极部（21）和无源元件。 通过作为形成在基板膜上的第一图案布线（14）的金属膜作为掩模，蚀刻在其中未形成金属膜的区域中的基板膜和基板钛膜。 因此，形成基板层（23）和基板钛层（22）。 因此，用作基板钛层（22）的基板钛膜防止由于蚀刻液体而导致的接收电极部分和各个无源元件的腐蚀，从而形成高性能的无源元件。

公开(公告)号：EP1278215A2

公开(公告)日：2003-01-22

申请号：EP02254713.7

申请日：2002-07-04

Applicant: Shipley Co. L.L.C.

Inventor： Allen, Craig S. ,  Schemenauer, John ,  Senk, David D. ,  Langlois, Marc ,  Hu, Xiaodong ,  Hwang, Jan Tzyy-Jiuan ,  Ready, Jud ,  Tomav, Trifon

IPC: H01C7/00 ,  H01C17/08

CPC classification number: H05K1/167 ,  H01C7/006 ,  H01C7/06 ,  H01C17/08 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2203/0361 ,  Y10T428/261 ,  Y10T428/31678

Abstract: Electrically resistive material including platinum and from about 5 and about 70 molar percent of iridium, ruthenium or mixtures thereof, calculated based on platinum as 100%, are disclosed.

Abstract translation: 公开了包含铂和约5和约70摩尔％的铱，钌或其混合物的电阻材料，其基于铂为100％计算。

公开(公告)号：EP1261241A1

公开(公告)日：2002-11-27

申请号：EP02253403.6

申请日：2002-05-15

Applicant: Shipley Co. L.L.C.

Inventor： Schemenaur, John ,  Senk, David D.

IPC: H05K1/18 ,  H01C7/00

CPC classification number: H05K1/167 ,  H01C7/006 ,  H01C17/075 ,  H01C17/08 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2201/0391 ,  H05K2203/0361 ,  H05K2203/0723

Abstract: Resistors having a resistive material portion including multiple layers or resistive materials, wherein each layer of resistive material has a different sheet resistivity, are provided by the present invention. Such resistors are particularly useful as embedded resistors in the manufacture of printed wiring boards. Methods of preparing such resistors are also provided.

Abstract translation: 具有电阻材料部分的电阻器包括多层或电阻材料，其中每层电阻材料具有不同的薄层电阻率，由本发明提供。 这种电阻器在制造印刷电路板时作为嵌入式电阻器特别有用。 还提供了制备这种电阻器的方法。

公开(公告)号：EP1161125A2

公开(公告)日：2001-12-05

申请号：EP01304508.3

申请日：2001-05-23

Applicant: ALPS ELECTRIC CO., LTD.

Inventor： Yoshisato, Akiyuki ,  Ueda, Kazuhiko ,  Ikarashi, Yasuhiro ,  Inoue, Akihiko ,  Sakuma, Hiroshi

IPC: H05K1/18

CPC classification number: H05K3/403 ,  H01L23/647 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/16 ,  H05K3/246 ,  H05K2201/0317 ,  H05K2201/0347 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00

Abstract: The invention provides a surface mounting typing electronic circuit unit that is suitable for miniaturization and is suitable for simple output adjustment. Circuit elements including capacitors (C), resistors (R), and inductance elements (L) and a conducting pattern connected to the circuit elements are formed on an alumina substrate (1) by means of thin film forming technique, and a diode (D1) and a semiconductor chip of a transistor are fixed to a connection land of the conducting pattern by means of wire bonding, wherein only the emitter resistor out of the base bias voltage dividing resistors and the emitter resistor of the transistor is trimmed for output adjustment.

Abstract translation: 本发明提供一种适合小型化的表面贴装型电子电路单元，适用于简单的输出调整。 通过薄膜形成技术在氧化铝基板（1）上形成包括电容器（C），电阻器（R）和电感元件（L）的电路元件和连接到电路元件的导电图案，并且二极管 ），并且晶体管的半导体芯片通过引线键合固定到导电图案的连接焊盘，其中只有基极偏压分压电阻器中的发射极电阻器和晶体管的发射极电阻器被修整以进行输出调节。