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    Method of manufacturing capacitor-embedded low temperature co-fired ceramic substrate
    5.
    发明申请
    Method of manufacturing capacitor-embedded low temperature co-fired ceramic substrate 失效
    制造电容器嵌入式低温共烧陶瓷基板的方法

    公开(公告)号：US20080000061A1

    公开(公告)日：2008-01-03

    申请号：US11819897

    申请日：2007-06-29

    申请人： Seung Gyo Jeong ,  Yong Seok Choi ,  Ki Pyo Hong

    发明人： Seung Gyo Jeong ,  Yong Seok Choi ,  Ki Pyo Hong

    IPC分类号： H01G9/00

    CPC分类号： H01G4/30 ,  H01G4/232 ,  H01L2224/48091 ,  H01L2924/01019 ,  H01L2924/09701 ,  H01L2924/30107 ,  H05K1/0231 ,  H05K1/0306 ,  H05K1/162 ,  H05K1/186 ,  H05K3/4611 ,  H05K3/4629 ,  H05K3/4688 ,  H05K2201/09672 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/417 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A method of manufacturing a capacitor-embedded low temperature co-fired ceramic substrate, the method including: manufacturing a capacitor part by firing a deposition including at least one high dielectric ceramic sheet to form a capacitor part; providing a plurality of low temperature co-fired green sheets each having at least one of a conductive pattern and a conductive via hole thereon; forming a low temperature co-fired ceramic deposition by depositing the low temperature co-fired green sheets to embed the capacitor part in the low temperature co-fired ceramic deposition, the embedded capacitor part connected to the one of conductive pattern and conductive via hole of an adjacent one of the green sheets; and firing the low temperature co-fired ceramic deposition having the capacitor part embedded therein. The capacitor-embedded low temperature co-fired ceramic substrate may be beneficially employed in various types of capacitor part such as a deposited chip capacitor and a capacitor layer structure.

    摘要翻译： 一种制造电容器嵌入式低温共烧陶瓷基板的方法，所述方法包括：通过烧结包括至少一个高介电陶瓷片的沉积物来形成电容器部分，以形成电容器部分; 提供多个低温共烧生坯片，每个低温共烧生坯在其上具有导电图案和导电通孔中的至少一个; 通过沉积低温共烧生片将电容器部分嵌入低温共烧陶瓷沉积中形成低温共烧陶瓷沉积，将嵌入式电容器部分连接到导电图案和导电通孔中的一个 相邻的一个生片; 并烧制具有嵌入其中的电容器部分的低温共烧陶瓷沉积。 电容器嵌入式低温共烧陶瓷基板可以有利地用于各种类型的电容器部分，例如沉积的芯片电容器和电容器层结构。

    PROBE CARD AND MANUFACTURING METHOD THEREOF
    6.
    发明申请
    PROBE CARD AND MANUFACTURING METHOD THEREOF 审中-公开
    探针卡及其制造方法

    公开(公告)号：US20130088251A1

    公开(公告)日：2013-04-11

    申请号：US13614395

    申请日：2012-09-13

    申请人： Yong Seok CHOI ,  Dae Hyeong Lee ,  Won Chul Ma ,  Ki Pyo Hong

    发明人： Yong Seok CHOI ,  Dae Hyeong Lee ,  Won Chul Ma ,  Ki Pyo Hong

    IPC分类号： G01R1/04 ,  B29C65/72

    CPC分类号： G01R3/00 ,  G01R1/06727 ,  G01R1/06755

    摘要： There are provided a probe substrate and a manufacturing method thereof that may prevent an electrode pad bonded with a probe pin from being released from the probe substrate. The probe card includes: a ceramic substrate having at least one electrode pad on one surface thereof; and a probe pin bonded to the electrode pad, and the electrode pad has a larger dimension than a bonding surface of the probe pin.

    摘要翻译： 提供了一种探针衬底及其制造方法，其可以防止与探针接合的电极垫从探针衬底释放。 探针卡包括：在其一个表面上具有至少一个电极焊盘的陶瓷基板; 以及与电极焊盘接合的探针，电极焊盘的尺寸比探针的接合面大。

    MULTILAYER CERAMIC SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME
    8.
    发明申请
    MULTILAYER CERAMIC SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
    多层陶瓷基板及其制造方法

    公开(公告)号：US20130000958A1

    公开(公告)日：2013-01-03

    申请号：US13473047

    申请日：2012-05-16

    申请人： Yong Seok CHOI ,  Dae Hyeong Lee ,  Won Chul Ma ,  Ki Pyo Hong

    发明人： Yong Seok CHOI ,  Dae Hyeong Lee ,  Won Chul Ma ,  Ki Pyo Hong

    IPC分类号： H05K1/03 ,  B05D5/12 ,  B82Y40/00 ,  B82Y30/00

    CPC分类号： H01L23/15 ,  B32B18/00 ,  B82Y30/00 ,  C04B37/006 ,  C04B2235/408 ,  C04B2235/616 ,  C04B2237/125 ,  C04B2237/32 ,  C04B2237/562 ,  C04B2237/62 ,  H01L21/4857 ,  H01L2924/0002 ,  H05K1/113 ,  H05K3/4061 ,  H05K3/4629 ,  H05K2203/025 ,  H05K2203/072 ,  H01L2924/00

    摘要： Disclosed herein are a multilayer ceramic substrate and a method for manufacturing the same. In a method for manufacturing the multilayer ceramic substrate, which has a ceramic laminate including multiple ceramic layers and allowing interconnection between layers through vias respectively formed in the multiple ceramic layers, the method includes: preparing a ceramic laminate in which a void is formed around a via in at least one ceramic layer of multiple ceramic layers; immersing the ceramic laminate in a precipitating bath in which an electrode solution is contained; putting the ceramic laminate out of the precipitating bath after a predetermined period of time, and then removing a nanoparticle film stacked on a surface of a multilayer ceramic substrate; and applying heat to the multilayer ceramic substrate to form nanoparticles filling an inside of the void, after the removing of the nanoparticle film.

    摘要翻译： 本文公开了多层陶瓷基板及其制造方法。 在具有陶瓷层叠体的多层陶瓷基板的制造方法中，所述多层陶瓷基板具有包含多个陶瓷层的陶瓷层叠体，并且能够通过分别形成在多个陶瓷层中的通孔的层间的相互连接，所述方法包括：准备陶瓷层叠体， 在多个陶瓷层的至少一个陶瓷层中通孔; 将陶瓷层压体浸渍在其中含有电极溶液的沉淀浴中; 在预定时间后将陶瓷层压体放出沉淀池，然后除去堆叠在多层陶瓷基板的表面上的纳米颗粒膜; 并且在除去纳米颗粒膜之后，向多层陶瓷基板施加热量以形成填充空隙内部的纳米颗粒。

    MULTILAYER CERAMIC CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME
    9.
    发明申请
    MULTILAYER CERAMIC CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME 审中-公开
    多层陶瓷电路板及其制造方法

    公开(公告)号：US20110168439A1

    公开(公告)日：2011-07-14

    申请号：US12794118

    申请日：2010-06-04

    申请人： Myung Whun CHANG ,  Jin Waun Kim ,  Dae Hyeong Lee ,  Ki Pyo Hong

    发明人： Myung Whun CHANG ,  Jin Waun Kim ,  Dae Hyeong Lee ,  Ki Pyo Hong

    IPC分类号： H05K1/11 ,  B29C65/02

    CPC分类号： H05K3/4629 ,  C04B37/001 ,  C04B2237/64 ,  H05K3/107

    摘要： There is provided a method of manufacturing a multilayer ceramic circuit board. A multilayer ceramic circuit board according to an aspect of the invention may include: preparing a plurality of ceramic green sheets; forming a recess having a desired line shape and a via hole connected to the recess in at least one of the plurality of ceramic green sheets; forming a conductive via by filling the via hole with a conductive material; forming a circuit line connected to the conductive via by filling the recess with a conductive material; stacking the plurality of ceramic green sheets upon one another to thereby form a ceramic green sheet stack; and sintering the ceramic green sheet stack.

    摘要翻译： 提供一种制造多层陶瓷电路板的方法。 根据本发明的一个方面的多层陶瓷电路板可以包括：制备多个陶瓷生片; 在所述多个陶瓷生片中的至少一个中形成具有所需线状的凹部和与所述凹部连接的通孔; 通过用导电材料填充所述通孔来形成导电通孔; 通过用导电材料填充凹槽来形成连接到导电通孔的电路线; 将多个陶瓷生片堆叠在一起形成陶瓷生片叠层; 并烧结陶瓷生片堆叠。

    Multi layer circuit board and method of manufacturing the same
    10.
    发明申请
    Multi layer circuit board and method of manufacturing the same 审中-公开
    多层电路板及其制造方法

    公开(公告)号：US20120018193A1

    公开(公告)日：2012-01-26

    申请号：US13064971

    申请日：2011-04-28

    申请人： Ki Pyo Hong

    发明人： Ki Pyo Hong

    IPC分类号： H05K1/02 ,  B32B38/04

    CPC分类号： H05K3/4629 ,  H05K1/0265 ,  H05K3/4061 ,  H05K2201/096 ,  H05K2201/09709 ,  H05K2201/0979 ,  Y10T156/1074

    摘要： There are provided a multi layer circuit board and a method of manufacturing the same. The multi layer circuit board includes each of ceramic boards having wiring patterns formed and stacked thereon; and via electrodes connecting in series the wiring patterns formed in the each of the ceramic boards, wherein one of the via electrodes is formed as a via group including a plurality of via units which connect in parallel one catch pad formed on one ceramic board and another catch pad formed on ceramic boards adjacent to the one ceramic board. Since the ceramic boards are connected through the plurality of via units, the reliability of the electrical connectivity of the via electrode may be improved, and the formation of a void and the protrusion of the via electrode may be prevented.

    摘要翻译： 提供了一种多层电路板及其制造方法。 多层电路板包括具有形成并堆叠在其上的布线图案的陶瓷板的每一个; 以及通过电极串联连接在每个陶瓷板中形成的布线图案，其中一个通孔电极形成为通孔组，该通孔组包括多个通孔单元，该多个通孔单元并联连接形成在一个陶瓷板上的一个止动垫片和另一个 在与陶瓷板相邻的陶瓷板上形成的缓冲垫。 由于陶瓷板通过多个通孔单元连接，所以可以提高通孔电极的电连接性的可靠性，并且可以防止形成空隙和通孔电极的突起。