公开(公告)号：US20060180898A1

公开(公告)日：2006-08-17

申请号：US11356413

申请日：2006-02-16

Applicant: Hideyuki Funaki ,  Kazuhiro Suzuki ,  Yujiro Naruse ,  Hiroshi Toshiyoshi ,  Kazuhiro Takahashi

Inventor： Hideyuki Funaki ,  Kazuhiro Suzuki ,  Yujiro Naruse ,  Hiroshi Toshiyoshi ,  Kazuhiro Takahashi

IPC: H01L29/06 ,  H01L21/30

CPC classification number: B81C1/00246 ,  B81C2203/0778 ,  H01L21/84 ,  H01L27/1203

Abstract: A hybrid type semiconductor integrated circuit includes a semiconductor active region provided in a first area of a substrate; an insulating region surrounding side surfaces of the semiconductor active region; a mechanical electrode provided in a second area adjacent to the first area and surrounded by a part of the insulating region and a trench; and a interconnection layer one end of which is connected to the mechanical electrode and of which the other end extends to the semiconductor active region via a part of the insulating region.

Abstract translation: 混合型半导体集成电路包括：设置在基板的第一区域中的半导体有源区; 围绕所述半导体有源区域的侧表面的绝缘区域; 设置在与所述第一区域相邻并被所述绝缘区域的一部分包围的第二区域中的机械电极和沟槽; 并且其一端连接到机械电极并且另一端经由绝缘区域的一部分延伸到半导体有源区的互连层。

公开(公告)号：US20050231794A1

公开(公告)日：2005-10-20

申请号：US11155771

申请日：2005-06-20

Applicant: Hideyuki Funaki

Inventor： Hideyuki Funaki

IPC: B81B3/00 ,  B81C1/00 ,  G02B26/00 ,  H01H13/80 ,  H01H59/00 ,  H03H3/007 ,  H03H9/24 ,  H03H9/46

CPC classification number: H03H9/462 ,  B81B3/0021 ,  B81B2201/016 ,  B81B2201/0271 ,  B81B2203/0109 ,  B81B2203/051 ,  H01H13/80 ,  H01H59/0009 ,  H01H2001/0078 ,  H01H2201/008 ,  H03H3/0072

Abstract: A micromechanical switch comprises a substrate, at least one pair of support members fixed to the substrate, at least one pair of beam members placed in proximity and parallel to each other above the substrate, and connected to one of the support members, respectively, each of the beam members having a moving portion which is movable with a gap with respect to the substrate, and a contact portion provided on the moving portion, and a driving electrode placed on the substrate between the pair of beam members to attract the moving portions of the beam members in a direction parallel to the substrate with electrostatic force so that the contact portions of the beam members which are opposed to each other are short-circuited.

公开(公告)号：US06940139B2

公开(公告)日：2005-09-06

申请号：US10806405

申请日：2004-03-23

Applicant: Hideyuki Funaki

Inventor： Hideyuki Funaki

IPC: B81B3/00 ,  B81C1/00 ,  G02B26/00 ,  H01H13/80 ,  H01H59/00 ,  H03H3/007 ,  H03H9/24 ,  H03H9/46 ,  H01L29/82

CPC classification number: H03H9/462 ,  B81B3/0021 ,  B81B2201/016 ,  B81B2201/0271 ,  B81B2203/0109 ,  B81B2203/051 ,  H01H13/80 ,  H01H59/0009 ,  H01H2001/0078 ,  H01H2201/008 ,  H03H3/0072

Abstract: A micromechanical switch comprises a substrate, at least one pair of support members fixed to the substrate, at least one pair of beam members placed in proximity and parallel to each other above the substrate, and connected to one of the support members, respectively, each of the beam members having a moving portion which is movable with a gap with respect to the substrate, and a contact portion provided on the moving portion, and a driving electrode placed on the substrate between the pair of beam members to attract the moving portions of the beam members in a direction parallel to the substrate with electrostatic force so that the contact portions of the beam members which are opposed to each other are short-circuited.

Abstract translation: 微机械开关包括基板，固定到基板的至少一对支撑构件，至少一对梁构件，其彼此靠近并平行放置在基板上方并分别连接到支撑构件之一 所述梁构件具有可相对于所述基板间隙移动的移动部分和设置在所述移动部分上的接触部分，以及设置在所述一对梁构件之间的所述基板上的驱动电极，以吸引所述移动部分的移动部分 梁构件在与静电力平行的方向上使得梁构件彼此相对的接触部分短路。

公开(公告)号：US20050164286A1

公开(公告)日：2005-07-28

申请号：US11082877

申请日：2005-03-18

Applicant: Shin-ichi O'uchi ,  Hideyuki Funaki ,  Sadato Hongo ,  Koji Hashimoto ,  Nobuhiro Gemma ,  Jun Okada ,  Masayoshi Takahashi

Inventor： Shin-ichi O'uchi ,  Hideyuki Funaki ,  Sadato Hongo ,  Koji Hashimoto ,  Nobuhiro Gemma ,  Jun Okada ,  Masayoshi Takahashi

IPC: G01N33/53 ,  B01L3/00 ,  C12M1/00 ,  C12M1/34 ,  C12N15/09 ,  C12Q1/68 ,  C40B40/06 ,  G01N27/327 ,  G01N27/416 ,  G01N27/49 ,  G01N33/566 ,  G01N37/00

CPC classification number: C12M1/34 ,  B01J2219/00527 ,  B01J2219/00585 ,  B01J2219/00596 ,  B01J2219/00653 ,  B01J2219/00657 ,  B01J2219/00659 ,  B01J2219/00677 ,  B01J2219/00691 ,  B01J2219/00722 ,  B01L3/502715 ,  B01L2200/143 ,  B01L2200/148 ,  B01L2300/024 ,  B01L2300/0636 ,  B01L2300/0645 ,  B01L2300/087 ,  B01L2300/0883 ,  B01L2400/0487 ,  C12Q1/68 ,  C12Q1/6837 ,  C40B40/06

Abstract: The present invention includes a plurality of working electrodes on which the same type of nucleic acid probes each having a nucleic acid complementary to a target nucleic acid are immobilized and which have different sensor areas and a normalization circuit which normalizes detection signals obtained by the working electrodes with respect to the respective sensor areas.

Abstract translation: 本发明包括多个工作电极，其上固定有与靶核酸互补的核酸的相同类型的核酸探针，并且具有不同的传感器区域，以及归一化电路，其对由工作电极获得的检测信号进行归一化 相对于各个传感器区域。

公开(公告)号：US6064086A

公开(公告)日：2000-05-16

申请号：US72460

申请日：1998-05-05

Applicant: Akio Nakagawa ,  Tomoko Matsudai ,  Hideyuki Funaki ,  Norio Yasuhara

Inventor： Akio Nakagawa ,  Tomoko Matsudai ,  Hideyuki Funaki ,  Norio Yasuhara

IPC: H01L21/331 ,  H01L29/06 ,  H01L29/739 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L29/66325 ,  H01L29/0696 ,  H01L29/7394 ,  H01L29/7398

Abstract: An n-type buffer layer and a p-type base layer are formed in the surface of the n.sup.- -type drift layer. A p.sup.+ -type drain layer is formed in the surface of the n-type buffer layer. An n.sup.+ -type source layer and a p.sup.+ -type contact layer are formed in the surface of the p-type base layer. A main gate electrode is arranged to face, through a gate oxide film, a surface of the p-type base layer which is interposed between the n.sup.+ -type source layer and the n.sup.- -type drift layer. An n-type relay layer is formed in the surface of the n.sup.- -type drift layer to face the n.sup.+ -type source layer through the p-type base layer under the main gate electrode. The n-type relay layer extends from the n.sup.- -type drift layer into the p-type base layer. The n-type relay layer decreases the channel resistance.

Abstract translation: 在n型漂移层的表面形成n型缓冲层和p型基底层。 在n型缓冲层的表面形成p +型漏极层。 在p型基底层的表面形成n +型源极层和p +型接触层。 主栅极布置成通过栅极氧化膜面对介于n +型源极层和n型漂移层之间的p型基极层的表面。 在n型漂移层的表面形成n型继电器层，通过主栅电极下方的p型基极层面对n +型源极层。 n型继电器层从n型漂移层延伸到p型基极层。 n型继电器层降低了通道电阻。

公开(公告)号：US5679973A

公开(公告)日：1997-10-21

申请号：US624103

申请日：1996-03-29

Applicant: Hiroshi Mochizuki ,  Kanae Fujii ,  Hideyuki Funaki

Inventor： Hiroshi Mochizuki ,  Kanae Fujii ,  Hideyuki Funaki

IPC: G01R15/20 ,  G01R19/00 ,  H01L43/06 ,  H01L29/82 ,  H01L43/00

CPC classification number: H01L43/06 ,  Y10S73/03

Abstract: A lateral Hall element includes a substrate, a first-conductivity type active layer formed on the substrate, a first second-conductivity type semiconductor layer formed to surround the first-conductivity type active layer and formed to a depth to reach the substrate, a pair of first first-conductivity type semiconductor layers of high impurity concentration selectively formed with a preset distance apart from each other on the surface of the first-conductivity type active layer, current supply electrodes respectively formed on the pair of first first-conductivity type semiconductor layers, a pair of second first-conductivity type semiconductor layers of high impurity concentration formed with a preset distance apart from each other on the surface of the first-conductivity type active layer in position different from the first first-conductivity type semiconductor layers, sensor electrodes respectively formed on the pair of second first-conductivity type semiconductor layers, and a plurality of second second-conductivity type semiconductor layers formed on the surface of the first-conductivity type active layer in position different from the first and second first-conductivity type semiconductor layers.

Abstract translation: 横向霍尔元件包括衬底，形成在衬底上的第一导电型有源层，形成为围绕第一导电类型有源层并形成为深度到达衬底的第一第二导电类型半导体层，一对 在所述第一导电型有源层的表面上选择性地形成为彼此相隔预定距离的高杂质浓度的第一第一导电型半导体层，分别形成在所述一对第一第一导电类型半导体层 在与第一第一导电类型半导体层不同的位置处的第一导电类型有源层的表面上彼此隔开预定距离形成有高杂质浓度的一对第二第一导电型半导体层，传感器电极 分别形成在所述一对第二第一导电型半导体层和多个第一导电型半导体层上 形成在与第一和第二第一导电类型半导体层不同的位置的第一导电类型有源层的表面上的第二第二导电类型半导体层的等离子体。

公开(公告)号：US5640040A

公开(公告)日：1997-06-17

申请号：US481097

申请日：1995-06-07

Applicant: Akio Nakagawa ,  Norio Yasuhara ,  Tomoko Matsudai ,  Yoshihiro Yamaguchi ,  Ichiro Omura ,  Hideyuki Funaki

Inventor： Akio Nakagawa ,  Norio Yasuhara ,  Tomoko Matsudai ,  Yoshihiro Yamaguchi ,  Ichiro Omura ,  Hideyuki Funaki

IPC: H01L21/336 ,  H01L21/74 ,  H01L21/762 ,  H01L27/06 ,  H01L27/092 ,  H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/739 ,  H01L29/74 ,  H01L29/745 ,  H01L29/749 ,  H01L29/78 ,  H01L29/786 ,  H01L29/861 ,  H01L23/58

CPC classification number: H01L29/404 ,  H01L21/74 ,  H01L21/76264 ,  H01L21/76297 ,  H01L27/0623 ,  H01L27/0922 ,  H01L27/1203 ,  H01L29/0834 ,  H01L29/402 ,  H01L29/405 ,  H01L29/407 ,  H01L29/408 ,  H01L29/66772 ,  H01L29/7394 ,  H01L29/7436 ,  H01L29/7455 ,  H01L29/749 ,  H01L29/7824 ,  H01L29/7835 ,  H01L29/78624 ,  H01L29/8611 ,  H01L21/76275 ,  H01L21/76286 ,  H01L29/78603 ,  H01L2924/0002

Abstract: A high breakdown voltage semiconductor device comprising a semiconductor substrate, an insulating layer formed on the semiconductor substrate, an active layer formed on the insulating layer and made of a high resistance semiconductor of a first conductivity type, a first impurity region of the first conductivity type formed in the active layer, and a second impurity region of a second conductivity type formed in the active layer and spaced apart from the first impurity region by a predetermined distance. The first impurity region is formed of diffusion layers. The diffusion layers are superimposed one upon another and differ in diffusion depth or diffusion window width, or both.

Abstract translation: 一种高耐压电压半导体器件，包括半导体衬底，形成在半导体衬底上的绝缘层，形成在绝缘层上并由第一导电类型的高电阻半导体形成的有源层，第一导电类型的第一杂质区 形成在有源层中的第二杂质区和形成在有源层中并与第一杂质区隔开预定距离的第二导电类型的第二杂质区。 第一杂质区由扩散层形成。 扩散层彼此叠加并且扩散深度或扩散窗宽度不同，或两者均不同。

公开(公告)号：US5592014A

公开(公告)日：1997-01-07

申请号：US484864

申请日：1995-06-07

Applicant: Hideyuki Funaki ,  Akio Nakagawa ,  Norio Yasuhara ,  Tomoko Matsudai ,  Yoshihiro Yamaguchi ,  Ichiro Omura

Inventor： Hideyuki Funaki ,  Akio Nakagawa ,  Norio Yasuhara ,  Tomoko Matsudai ,  Yoshihiro Yamaguchi ,  Ichiro Omura

IPC: H01L21/336 ,  H01L21/762 ,  H01L27/06 ,  H01L27/092 ,  H01L27/12 ,  H01L29/06 ,  H01L29/40 ,  H01L29/739 ,  H01L29/74 ,  H01L29/745 ,  H01L29/749 ,  H01L29/78 ,  H01L29/786 ,  H01L29/861 ,  H01L23/58

CPC classification number: H01L29/404 ,  H01L21/76264 ,  H01L27/0623 ,  H01L27/0922 ,  H01L27/1203 ,  H01L29/402 ,  H01L29/405 ,  H01L29/407 ,  H01L29/408 ,  H01L29/66772 ,  H01L29/7394 ,  H01L29/7436 ,  H01L29/7455 ,  H01L29/749 ,  H01L29/7824 ,  H01L29/7835 ,  H01L29/78624 ,  H01L29/8611 ,  H01L21/76275 ,  H01L21/76286 ,  H01L2924/0002

Abstract: A high breakdown voltage semiconductor apparatus comprises a substrate having an insulating layer formed thereon, a high resistance semiconductor layer of a first conductivity type formed on said insulating layer, a base region of the first conductivity type formed selectively in a surface region of the high resistance semiconductor layer, a drift region of a second conductivity type formed selectively in the surface region of the high resistance semiconductor layer so as not to reach the insulating layer, a source region of the second conductivity type formed in the base region, a drain region formed in the drift region, a gate electrode formed on a region between the source region and the drift region, with a gate insulating film interposed between the gate electrode and the region between the source region and the drift region, a source electrode provided in contact with the base region and the source region, a drain electrode provided in contact with the drain region. The dosage of impurities in the high resistance semiconductor layer is 2.times.10.sup.12 cm.sup.-2 to 3.times.10.sup.12 cm.sup.-2 and the dosage of impurities in the drift layer is 1.times.10.sup.12 cm.sup.-2 to 2.times.10.sup.12 cm.sup.-2.

Abstract translation: 一种高耐压电压半导体装置，包括：在其上形成有绝缘层的基板，形成在所述绝缘层上的第一导电类型的高电阻半导体层，所述第一导电类型的基极区选择性地形成在所述高电阻的表面区域中 半导体层，选择性地形成在高电阻半导体层的表面区域中以便不到达绝缘层的第二导电类型的漂移区域，形成在基极区域中的第二导电类型的源极区域，形成的漏极区域 在漂移区域中，形成在源极区域和漂移区域之间的区域上的栅电极，栅极绝缘膜插入在栅极电极和源极区域与漂移区域之间的区域中，源极电极与 所述基极区域和所述源极区域，设置成与所述漏极区域接触的漏极电极。 高电阻半导体层中的杂质用量为2×10 12 cm -2至3×10 12 cm -2，漂移层中的杂质用量为1×10 12 cm -2至2×10 12 cm -2。

公开(公告)号：US5548151A

公开(公告)日：1996-08-20

申请号：US385058

申请日：1995-02-07

Applicant: Hideyuki Funaki ,  Hiroshi Mochizuki ,  Ryoji Maruyama ,  Kanae Fujii

Inventor： Hideyuki Funaki ,  Hiroshi Mochizuki ,  Ryoji Maruyama ,  Kanae Fujii

IPC: H01L43/06 ,  H01L29/82

CPC classification number: H01L43/065

Abstract: In a Hall element, a semiconductor layer is surrounded by a first trench filled with an insulator. A first current supply portion of an n+-type semiconductor is disposed adjacent the semiconductor layer and the first trench. Second current supply portions are also disposed adjacent the semiconductor layer and the first trench and symmetrical with respect to the first current supply portion. Sensor portions of an n+-type semiconductor are disposed adjacent the semiconductor layer and the first trench at about the center between the first and second current supply portions, respectively. A magnetic flux perpendicular to the upper surface of the semiconductor layer can be detected by the foregoing arrangement.

Abstract translation: 在霍尔元件中，半导体层由填充有绝缘体的第一沟槽围绕。 n +型半导体的第一电流供应部分邻近半导体层和第一沟槽设置。 第二电流供应部分也邻近半导体层和第一沟槽设置并相对于第一电流供应部分对称。 n +型半导体的传感器部分分别在第一和第二电流供应部分之间的大约中心附近设置在半导体层和第一沟槽附近。 可以通过上述配置来检测垂直于半导体层的上表面的磁通量。

公开(公告)号：US08742527B2

公开(公告)日：2014-06-03

申请号：US13416290

申请日：2012-03-09

Applicant: Kazuhiro Suzuki ,  Risako Ueno ,  Honam Kwon ,  Mitsuyoshi Kobayashi ,  Hideyuki Funaki

Inventor： Kazuhiro Suzuki ,  Risako Ueno ,  Honam Kwon ,  Mitsuyoshi Kobayashi ,  Hideyuki Funaki

IPC: H01L21/00 ,  H01L31/0232

CPC classification number: H01L27/14605 ,  H01L24/32 ,  H01L27/14618 ,  H01L27/14625 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014

Abstract: According to one embodiment, a solid state imaging device includes a sensor substrate curved such that an upper face having a plurality of pixels formed is recessed and an imaging lens provided on the upper face side.

Abstract translation: 根据一个实施例，固态成像装置包括弯曲的传感器基板，使得形成有多个像素的上表面凹陷，并且设置在上表面侧的成像透镜。