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公开(公告)号:US20170346552A1
公开(公告)日:2017-11-30
申请号:US15679008
申请日:2017-08-16
Applicant: INPHI CORPORATION
Inventor: Radhakrishnan L. NAGARAJAN
IPC: H04B10/071 , H04L12/933 , H04B10/40 , H04Q11/00 , H04L12/26
CPC classification number: H04B10/071 , H04B10/40 , H04L43/50 , H04L49/109 , H04Q11/0005 , H04Q2011/0018 , H04Q2011/0035
Abstract: In an example, the present invention includes an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. In an example, the device has a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device. In an example, a control block is configured to receive and send instruction(s) in a digital format to the communication block and is configured to receive and send signals in an analog format to communicate with the silicon photonics device.
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公开(公告)号:US20170318363A1
公开(公告)日:2017-11-02
申请号:US15650334
申请日:2017-07-14
Applicant: INPHI CORPORATION
Inventor: Radhakrishnan L. NAGARAJAN
IPC: H04Q11/00 , H04B10/54 , H04B10/516
CPC classification number: H04Q11/0005 , H04B10/40 , H04B10/5161 , H04B10/541 , H04Q11/0062 , H04Q2011/0016 , H04Q2011/0083 , H04Q2011/0096
Abstract: In an example, the present invention includes an integrated system on chip device. The device has a variable bias block configured with the control block, the variable bias block being configured to selectively tune each of a plurality of laser devices provided on the silicon photonics device to adjust for at least a wavelength of operation, a fabrication tolerance, and an extinction ratio.
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公开(公告)号:US20170285267A1
公开(公告)日:2017-10-05
申请号:US15088862
申请日:2016-04-01
Applicant: INPHI CORPORATION
Inventor: Masaki KATO , Radhakrishnan L. NAGARAJAN
CPC classification number: G02B6/274 , G02B6/1228 , G02B6/29352 , G02B6/29395
Abstract: An apparatus of polarization self-compensated delay line interferometer. The apparatus includes a first waveguide arm of a first material of a first length disposed between an input coupler and an output coupler and a second waveguide arm of the first material of a second length different from the first length disposed between the same input coupler and the same output coupler. The apparatus produces an interference spectrum with multiple periodic passband peaks where certain TE (transverse electric) and TM (transverse magnetic) polarization mode passband peaks are lined up. The apparatus further includes a section of waveguide of a birefringence material of a third length added to the second waveguide arm to induce a phase shift of the lined-up TE/TM passband peaks to a designated grid as corresponding polarization compensated channels of a wide optical band.
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公开(公告)号:US20170261708A1
公开(公告)日:2017-09-14
申请号:US15481994
申请日:2017-04-07
Applicant: INPHI CORPORATION
Inventor: Liang DING , Radhakrishnan L. NAGARAJAN , Roberto COCCIOLI
CPC classification number: G02B6/4246 , G02B6/4214 , G02B6/4232 , G02B6/4245 , G02B6/4274 , G02B6/428 , G02B6/43 , G02B2006/12061 , G02B2006/12142 , H01L23/49827 , H01L24/17 , H01L24/81 , H01L25/167 , H01L2224/16057 , H01L2224/16225 , H01L2224/1712 , H01L2224/81191 , H01L2924/10253 , H01L2924/12042 , H01L2924/12043 , H01L2924/14 , H01L2924/1425 , H01L2924/1426 , H01L2924/19041 , H01L2924/19105 , H01L2924/2064 , H01S5/02248 , H01S5/02276 , H01S5/02284 , H04B10/40 , H05K1/0274 , H05K1/181 , H05K3/3436 , H05K2201/10121 , H05K2201/10151 , H05K2201/10378 , H05K2203/049 , Y02P70/611 , Y02P70/613
Abstract: A compact optical transceiver formed by hybrid multichip integration. The optical transceiver includes a Si-photonics chip attached on a PCB. Additionally, the optical transceiver includes a first TSV interposer and a second TSV interposer separately attached nearby the Si-photonics chip on the PCB. Furthermore, the optical transceiver includes a driver chip flip-bonded partially on the Si-photonics chip through a first sets of bumps and partially on the first TSV interposer through a second sets of bumps. Moreover, the optical transceiver includes a transimpedance amplifier module chip flip-bonded partially on the Si-photonics chip through a third sets of bumps and partially on the second TSV interposer through a fourth set of bumps.
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公开(公告)号:US20170254968A1
公开(公告)日:2017-09-07
申请号:US15061941
申请日:2016-03-04
Applicant: INPHI CORPORATION
Inventor: Liang DING , Radhakrishnan L. NAGARAJAN , Roberto COCCIOLI
CPC classification number: G02B6/428 , G02B6/13 , G02B6/30 , G02B6/4232 , G02B6/424 , G02B6/4245 , G02B6/4283 , G02B6/4295 , G02B2006/12121 , G02B2006/12142 , H01L21/565 , H01L21/76877 , H01L24/11 , H01L24/81 , H01L25/167 , H01L2224/11334 , H01L2224/12105 , H01L2224/13014 , H01L2224/13016 , H01L2224/16146 , H01L2224/16227 , H01L2224/81191 , H01L2924/06 , H01L2924/10253 , H01L2924/12042 , H01L2924/12043 , H01L2924/1205 , H01L2924/141 , H01L2924/1426 , H01L2924/1433
Abstract: An optical transceiver by hybrid multichip integration. The optical transceiver includes a PCB with a plurality of prefabricated surface bonding sites. A first chip includes a FOWLP package of multiple electronics devices embedded in a dielectric molding layer overlying a dielectric redistribution layer is disposed on the PCB by respectively bonding a plurality of conductor balls between the dielectric redistribution layer and the plurality of prefabricated surface bonding sites while exposing soldering material filled in multiple through-mold vias (TMVs) in the dielectric molding layer. The optical transceiver further includes a second chip configured as a Sipho die comprising photonics devices embedded in a SOI wafer substantially free from any electronics device process. The second chip is stacked over the first chip with multiple conductor bumps being bonded respectively to the soldering material in the multiple TMVs.
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公开(公告)号:US20170214469A1
公开(公告)日:2017-07-27
申请号:US15481920
申请日:2017-04-07
Applicant: INPHI CORPORATION
Inventor: Radhakrishnan L. NAGARAJAN , Todd ROPE
IPC: H04B10/524 , G02F1/225 , G02F1/01 , H03M1/68
CPC classification number: H04B10/5161 , G02F1/0123 , G02F1/2255 , G02F1/2257 , G02F2001/212 , H03M1/682 , H04B10/524 , H04B10/541
Abstract: A single chip dual-channel driver for two independent traveling wave modulators. The driver includes two differential pairs inputs per channel respectively configured to receive two digital differential pair signals. The driver further includes a two-bit DAC per channel coupled to the two differential pairs inputs to produce a single analog differential pair PAM signal at a differential pair output for driving a traveling wave modulator. Additionally, the driver includes a control block having internal voltage/current signal generators respective coupled to each input and the 2-bit DAC for providing a bias voltage, a tail current, a dither signal to assist modulation control per channel. Furthermore, the driver includes an internal I2C communication block coupled to a high-speed clock generator to generate control signals to the control block and coupled to host via an I2C digital communication interface.
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公开(公告)号:US20170141843A1
公开(公告)日:2017-05-18
申请号:US15406230
申请日:2017-01-13
Applicant: INPHI CORPORATION
Inventor: Radhakrishnan L. NAGARAJAN
IPC: H04B10/071 , H04L12/26 , H04L12/933 , H04Q11/00
CPC classification number: H04B10/071 , H04B10/40 , H04L43/50 , H04L49/109 , H04Q11/0005 , H04Q2011/0018 , H04Q2011/0035
Abstract: In an example, the present invention includes an integrated system-on-chip device. The device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. In an example, the device has a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device. In an example, a control block is configured to receive and send instruction(s) in a digital format to the communication block and is configured to receive and send signals in an analog format to communicate with the silicon photonics device.
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公开(公告)号:US20170127160A1
公开(公告)日:2017-05-04
申请号:US15407150
申请日:2017-01-16
Applicant: INPHI CORPORATION
Inventor: Radhakrishnan L. NAGARAJAN
IPC: H04Q11/00 , H04B10/516 , H04B10/54
CPC classification number: H04Q11/0005 , H04B10/40 , H04B10/5161 , H04B10/541 , H04Q11/0062 , H04Q2011/0016 , H04Q2011/0083 , H04Q2011/0096
Abstract: In an example, the present invention includes an integrated system on chip device. The device has a variable bias block configured with the control block, the variable bias block being configured to selectively tune each of a plurality of laser devices provided on the silicon photonics device to adjust for at least a wavelength of operation, a fabrication tolerance, and an extinction ratio.
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公开(公告)号:US20170093124A1
公开(公告)日:2017-03-30
申请号:US15372524
申请日:2016-12-08
Applicant: INPHI CORPORATION , Luxnet Corporation
Inventor: Radhakrishnan L. NAGARAJAN , Peng-Chih LI , Pi-Cheng LAW
CPC classification number: H01S5/0612 , G02B6/4204 , G02B6/4212 , G02B6/4215 , G02B6/4271 , G02B6/4287 , G02B6/4296 , H01S5/0064 , H01S5/0224 , H01S5/02248 , H01S5/02284 , H01S5/02288 , H01S5/02415 , H01S5/02438 , H01S5/068 , H01S5/125 , H04B10/501
Abstract: A packaged transmitter device includes a base member comprising a planar part mounted with a thermoelectric cooler, a transmitter, and a coupling lens assembly, and an assembling part connected to one side of the planar part. The device further includes a circuit board bended to have a first end region and a second end region being raised to a higher level. The first end region disposed on a top surface of the planar part includes multiple electrical connection patches respectively connected to the thermoelectric and the transmitter. The second end region includes an electrical port for external connection. Additionally, the device includes a cover member disposed over the planar part. Furthermore, the device includes a cylindrical member installed to the assembling part for enclosing an isolator aligned to the coupling lens assembly along its axis and connected to a fiber to couple optical signal from the transmitter to the fiber.
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公开(公告)号:US20170090132A1
公开(公告)日:2017-03-30
申请号:US15375042
申请日:2016-12-09
Applicant: INPHI CORPORATION
Inventor: Radhakrishnan L. NAGARAJAN , Peng-Chih LI , Masaki KATO
CPC classification number: G02B6/4246 , G02B6/421 , G02B6/4215 , G02B6/4249 , G02B6/4256 , G02B6/4278 , G02B6/428 , G02B6/4292 , H04B10/40 , H04B10/516
Abstract: A photonic transceiver apparatus in Quad Small Form-factor Pluggable (QSFP) package. The apparatus includes a case having a base member, two partial side members, and a lid member to provide a spatial volume with an opening at a back end of the base member. Additionally, the apparatus includes a printed circuit board (PCB), installed inside the spatial volume over the base member having a pluggable electrical connector at the back end. Further, the apparatus includes multiple optical transmitting devices in mini-transmit-optical-sub-assembly package, each being mounted on a common support structure and having a laser output port in reversed orientation toward the back end. Furthermore, the apparatus includes a silicon photonics chip, including a fiber-to-silicon attachment module, mounted on the PCB and coupled to a modulation driver module and a trans-impedance amplifier module. Moreover, the apparatus includes a pair of optical input/output ports being back connected to the fiber-to-silicon attachment module.
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