公开(公告)号：US08654582B2

公开(公告)日：2014-02-18

申请号：US13790351

申请日：2013-03-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato

IPC: G11C11/40

CPC classification number: G11C11/409 ,  G11C11/404 ,  G11C16/02

Abstract: An object is to provide a semiconductor device in which stored data can be retained even when power is not supplied, and there is no limitation on the number of write cycles. The semiconductor device includes a source line, a bit line, a first signal line, a second signal line, a word line, a memory cell connected between the source line and the bit line, a first driver circuit electrically connected to the bit line, a second driver circuit electrically connected to the first signal line, a third driver circuit electrically connected to the second signal line, and a fourth driver circuit electrically connected to the word line and the source line. The first transistor is formed using a semiconductor material other than an oxide semiconductor. The second transistor is formed using an oxide semiconductor material.

Abstract translation: 目的在于提供一种半导体器件，其中即使在未提供电源的情况下也可以保留存储的数据，并且对写入周期的数量没有限制。 半导体器件包括源极线，位线，第一信号线，第二信号线，字线，连接在源极线和位线之间的存储单元，电连接到位线的第一驱动器电路， 电连接到第一信号线的第二驱动电路，与第二信号线电连接的第三驱动电路，和电连接到字线和源极线的第四驱动电路。 第一晶体管使用除氧化物半导体之外的半导体材料形成。 第二晶体管使用氧化物半导体材料形成。

公开(公告)号：US08619454B2

公开(公告)日：2013-12-31

申请号：US13680378

申请日：2012-11-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato

IPC: G11C5/06

CPC classification number: G11C7/10 ,  G11C5/06 ,  G11C5/147 ,  G11C7/12 ,  G11C7/18 ,  G11C7/22 ,  G11C8/08 ,  G11C11/24 ,  G11C11/4097 ,  G11C16/0433 ,  G11C16/28 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L23/528 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/108 ,  H01L27/115 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/22 ,  H01L29/24 ,  H01L29/26 ,  H01L29/78 ,  H01L29/78603 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An object of the present invention is to provide a semiconductor device combining transistors integrating on a same substrate transistors including an oxide semiconductor in their channel formation region and transistors including non-oxide semiconductor in their channel formation region. An application of the present invention is to realize substantially non-volatile semiconductor memories which do not require specific erasing operation and do not suffer from damages due to repeated writing operation. Furthermore, the semiconductor device is well adapted to store multivalued data. Manufacturing methods, application circuits and driving/reading methods are explained in details in the description.

公开(公告)号：US20130292677A1

公开(公告)日：2013-11-07

申请号：US13928425

申请日：2013-06-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato

IPC: H01L29/786

CPC classification number: H01L27/1255 ,  G11C16/0433 ,  G11C16/26 ,  H01L21/84 ,  H01L27/108 ,  H01L27/10805 ,  H01L27/10873 ,  H01L27/11 ,  H01L27/1108 ,  H01L27/11517 ,  H01L27/11521 ,  H01L27/1156 ,  H01L27/11803 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/7869

Abstract: An object of the present invention is to provide a semiconductor device having a novel structure in which in a data storing time, stored data can be stored even when power is not supplied, and there is no limitation on the number of writing. A semiconductor device includes a first transistor including a first source electrode and a first drain electrode; a first channel formation region for which an oxide semiconductor material is used and to which the first source electrode and the first drain electrode are electrically connected; a first gate insulating layer over the first channel formation region; and a first gate electrode over the first gate insulating layer. One of the first source electrode and the first drain electrode of the first transistor and one electrode of a capacitor are electrically connected to each other.

公开(公告)号：US20130256771A1

公开(公告)日：2013-10-03

申请号：US13900581

申请日：2013-05-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato ,  Shuhei Nagatsuka ,  Takanori Matsuzaki ,  Hiroki Inoue

IPC: H01L27/108

CPC classification number: H01L29/7869 ,  G11C16/0425 ,  H01L27/105 ,  H01L27/108 ,  H01L27/10802 ,  H01L27/10805 ,  H01L27/11 ,  H01L27/115 ,  H01L27/11517 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/11563 ,  H01L27/11568 ,  H01L27/1225 ,  H01L28/40 ,  H01L29/78693 ,  H01L29/788 ,  H01L29/7881 ,  H01L29/792

Abstract: The semiconductor device includes a source line, a bit line, a signal line, a word line, memory cells connected in parallel between the source line and the bit line, a first driver circuit electrically connected to the source line and the bit line through switching elements, a second driver circuit electrically connected to the source line through a switching element, a third driver circuit electrically connected to the signal line, and a fourth driver circuit electrically connected to the word line. The memory cell includes a first transistor including a first gate electrode, a first source electrode, and a first drain electrode, a second transistor including a second gate electrode, a second source electrode, and a second drain electrode, and a capacitor. The second transistor includes an oxide semiconductor material.

Abstract translation: 半导体器件包括源极线，位线，信号线，字线，在源极线和位线之间并联连接的存储器单元，通过开关电连接到源极线和位线的第一驱动器电路 元件，通过开关元件电连接到源极线的第二驱动器电路，电连接到信号线的第三驱动电路，以及电连接到字线的第四驱动电路。 存储单元包括第一晶体管，包括第一栅电极，第一源电极和第一漏电极，第二晶体管包括第二栅电极，第二源电极和第二漏极，以及电容器。 第二晶体管包括氧化物半导体材料。

公开(公告)号：US20130228838A1

公开(公告)日：2013-09-05

申请号：US13861681

申请日：2013-04-12

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hiroki Inoue ,  Kiyoshi Kato ,  Takanori Matsuzaki ,  Shuhei Nagatsuka

IPC: H01L27/108

CPC classification number: H01L27/1052 ,  G11C11/404 ,  G11C11/405 ,  G11C11/4091 ,  G11C16/0408 ,  G11C16/08 ,  G11C16/24 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/425 ,  H01L21/441 ,  H01L21/477 ,  H01L27/108 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/1156 ,  H01L27/1207 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/66969 ,  H01L29/78651 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device including a nonvolatile memory cell in which a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor are included is provided. Data is written to the memory cell by turning on the writing transistor and applying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor, so that the predetermined amount of charge is held in the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential.

公开(公告)号：US20130221361A1

公开(公告)日：2013-08-29

申请号：US13857659

申请日：2013-04-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Satoshi Murakami ,  Masahiko Hayakawa ,  Kiyoshi Kato ,  Mitsuaki Osame

IPC: H01L33/52

CPC classification number: H01L27/1248 ,  G02F1/136227 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/1244 ,  H01L27/1255 ,  H01L27/13 ,  H01L27/3246 ,  H01L27/3276 ,  H01L33/52 ,  H01L51/5237 ,  H01L51/5253

Abstract: It is an object of the present invention to provide a semiconductor display device having an interlayer insulating film which can obtain planarity of a surface while controlling film formation time, can control treatment time of heating treatment with an object of removing moisture, and can prevent moisture in the interlayer insulating film from being discharged to a film or an electrode adjacent to the interlayer insulating film. An inorganic insulating film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover a TFT. Next, an organic resin film containing photosensitive acrylic resin is applied to the organic insulting film, and the organic resin film is partially exposed to light to be opened. Thereafter, an inorganic insulting film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover the opened organic resin film. Then, in the opening part of the organic resin film, a gate insulating film and the two layer inorganic insulating film containing nitrogen are opened partially by etching to expose an active layer of the TFT.

公开(公告)号：US20130153894A1

公开(公告)日：2013-06-20

申请号：US13767904

申请日：2013-02-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kiyoshi Kato

IPC: H01L27/108

CPC classification number: H01L27/1052 ,  G11C16/0433 ,  G11C16/08 ,  G11C16/10 ,  G11C16/26 ,  H01L27/0688 ,  H01L27/10805 ,  H01L27/11521 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/1203

Abstract: An object is to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied and there is no limit on the number of write operations. The semiconductor device includes a first memory cell including a first transistor and a second transistor, a second memory cell including a third transistor and a fourth transistor, and a driver circuit. The first transistor and the second transistor overlap at least partly with each other. The third transistor and the fourth transistor overlap at least partly with each other. The second memory cell is provided over the first memory cell. The first transistor includes a first semiconductor material. The second transistor, the third transistor, and the fourth transistor include a second semiconductor material.

Abstract translation: 本发明的目的是提供具有新颖结构的半导体器件，其中即使在未提供电力的情况下也可以保持存储的数据，并且对写入操作的数量没有限制。 该半导体器件包括：第一存储单元，包括第一晶体管和第二晶体管;第二存储单元，包括第三晶体管和第四晶体管;以及驱动电路。 第一晶体管和第二晶体管至少部分地彼此重叠。 第三晶体管和第四晶体管至少部分地彼此重叠。 第二存储单元设置在第一存储单元上。 第一晶体管包括第一半导体材料。 第二晶体管，第三晶体管和第四晶体管包括第二半导体材料。

公开(公告)号：US20130069693A1

公开(公告)日：2013-03-21

申请号：US13677351

申请日：2012-11-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yutaka Shionoiri ,  Kiyoshi Kato ,  Munehiro Azami

IPC: G01R19/00

CPC classification number: H03F3/45179 ,  G01R19/00 ,  G11C7/062 ,  G11C11/4091 ,  G11C11/413 ,  G11C2207/063 ,  H03F3/45183 ,  H03F3/45188 ,  H03F2203/45396 ,  H03F2203/45506 ,  H03F2203/45546 ,  H03F2203/45551 ,  H03F2203/45702 ,  H03F2203/45726

Abstract: A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying voltages corresponding to threshold voltages of first and second transistors to gate-source voltages of the first and second transistors, and a second means for transferring signals input to the first and second input terminals to gates of the first and second transistors. In this case, a threshold variation of the first and second transistors is corrected.

Abstract translation: 根据本发明的用于检测输入到第一输入端和第二输入端的信号的电位差的读出放大器包括：第一装置，用于将对应于第一和第二晶体管的阈值电压的电压施加到栅极源电压 第一和第二晶体管，以及用于将输入到第一和第二输入端的信号传送到第一和第二晶体管的栅极的第二装置。 在这种情况下，校正第一和第二晶体管的阈值变化。

公开(公告)号：US20130057315A1

公开(公告)日：2013-03-07

申请号：US13667292

申请日：2012-11-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kiyoshi Kato ,  Jun Koyama

IPC: H03K19/173

CPC classification number: H03K19/1733 ,  G11C14/0063 ,  G11C16/02 ,  H01L21/8258 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/1156 ,  H01L27/1203 ,  H01L27/1225 ,  H01L29/7869 ,  H03K3/356008 ,  H03K3/35606

Abstract: A novel non-volatile latch circuit and a semiconductor device using the non-volatile latch circuit are provided. The latch circuit has a loop structure in which an output of a first element is electrically connected to an input of a second element and an output of the second element is electrically connected to an input of the first element through a second transistor. A transistor using an oxide semiconductor as a semiconductor material of a channel formation region is used as a switching element, and a capacitor is provided to be electrically connected to a source electrode or a drain electrode of the transistor, whereby data of the latch circuit can be retained, and a non-volatile latch circuit can thus be formed.

Abstract translation: 提供了一种新颖的非易失性锁存电路和使用非易失性锁存电路的半导体器件。 锁存电路具有环形结构，其中第一元件的输出电连接到第二元件的输入，并且第二元件的输出通过第二晶体管电连接到第一元件的输入端。 使用使用氧化物半导体作为沟道形成区域的半导体材料的晶体管作为开关元件，并且提供电容器以电连接到晶体管的源电极或漏电极，由此锁存电路的数据可以 并且可以形成非易失性锁存电路。

公开(公告)号：US20130033925A1

公开(公告)日：2013-02-07

申请号：US13647543

申请日：2012-10-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato

IPC: G11C11/24 ,  H01L29/78 ,  G11C7/00

CPC classification number: G11C7/12 ,  G11C11/24 ,  G11C11/405 ,  G11C2211/4016 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/1108 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/1225

Abstract: An object is to provide a semiconductor device having a novel structure. A first wiring; a second wiring; a third wiring, a fourth wiring; a first transistor including a first gate electrode, a first source electrode, and a first drain electrode; a second transistor including a second gate electrode, a second source electrode, and a second drain electrode are included. The first transistor is provided over a substrate including a semiconductor material and a second transistor includes an oxide semiconductor layer.

Abstract translation: 目的在于提供一种具有新颖结构的半导体器件。 第一个接线 第二布线 第三布线，第四布线; 第一晶体管，包括第一栅极电极，第一源极电极和第一漏极电极; 包括第二晶体管，包括第二栅电极，第二源电极和第二漏电极。 第一晶体管设置在包括半导体材料的衬底上，并且第二晶体管包括氧化物半导体层。