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111.发明授权Gas sensor, integrated circuit device using the same, and manufacturing method thereof 有权气体传感器，使用该气体传感器的集成电路装置及其制造方法公开(公告)号：US09459224B1
公开(公告)日：2016-10-04
申请号：US14788352
申请日：2015-06-30
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Chun-Wen Cheng , Chia-Hua Chu , Fei-Lung Lai , Shiang-Chi Lin
IPC: H01L27/14 , G01N27/16 , H01L49/02 , H01L21/768 , H01L23/31
CPC classification number: H01L23/3121 , G01N27/128 , H01L21/76802 , H01L21/7682 , H01L21/76898 , H01L23/481 , H01L28/60
Abstract: A gas sensor includes a substrate, a heater, a dielectric layer, a sensing electrode, and a gas sensitive film. The substrate has a sensing region and a peripheral region surrounding the sensing region, and the substrate further has an opening disposed in the sensing region. The heater is disposed at least above the opening, and the heater has an electrical resistivity larger than about 6×10−8 ohm-m. The dielectric layer is disposed on the heater. The sensing electrode is disposed on the dielectric layer. The gas sensitive film is disposed on the sensing electrode.
Abstract translation: 气体传感器包括基板，加热器，电介质层，感测电极和气体敏感膜。 衬底具有感测区域和围绕感测区域的周边区域，并且衬底还具有设置在感测区域中的开口。 加热器设置在开口的至少上方，并且加热器的电阻率大于约6×10-8欧姆 - 米。 电介质层设置在加热器上。 感测电极设置在电介质层上。 气体敏感膜设置在感测电极上。
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公开(公告)号：US20160244325A1
公开(公告)日：2016-08-25
申请号：US14629738
申请日：2015-02-24
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chun-Wen Cheng , Chia-Hua Chu , Kuei-Sung Chang
CPC classification number: B81B7/02 , B81B2201/0235 , B81B2201/0242 , B81B2201/0257 , B81B2201/0264 , B81B2207/095 , B81C1/00293 , B81C2203/0109 , B81C2203/0118 , B81C2203/0145
Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package having two MEMS devices with different pressures, and an associated method of formation. In some embodiments, the (MEMS) package includes a device substrate and a cap substrate bonded together. The bonded substrate comprises a first cavity corresponding to a first MEMS device having a first pressure and a second cavity corresponding to a second MEMS device having a different second pressure. The second cavity comprises a major volume and a vent hole connected by a lateral channel disposed between the device substrate and the cap substrate and the vent hole is hermetically sealed by a sealing structure.
Abstract translation: 本公开涉及具有两个具有不同压力的MEMS器件的微机电系统（MEMS）封装以及相关联的形成方法。 在一些实施例中，（MEMS）封装包括结合在一起的器件衬底和帽衬底。 键合衬底包括对应于具有第一压力的第一MEMS器件的第一腔和对应于具有不同第二压力的第二MEMS器件的第二腔。 第二空腔包括主体积和通过设置在装置基板和盖基板之间的横向通道连接的通气孔，并且通气孔由密封结构气密密封。
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113.发明授权Methods for packaging a microelectromechanical system (MEMS) wafer and application-specific integrated circuit (ASIC) dies using through mold vias (TMVs) 有权用于通过模具通孔（TMV）封装微机电系统（MEMS）晶片和专用集成电路（ASIC）模具的方法，公开(公告)号：US09403674B2
公开(公告)日：2016-08-02
申请号：US14457160
申请日：2014-08-12
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chun-Wen Cheng , Hung-Chia Tsai
CPC classification number: B81B7/008 , B81B7/0006 , B81B7/0074 , B81C1/0023 , H01L24/19 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/73265 , H01L2224/73267 , H01L2224/92244 , H01L2924/00014
Abstract: A method for packaging a microelectromechanical system (MEMS) device with an integrated circuit die using through mold vias (TMVs) is provided. According to the method, a MEMS substrate having a MEMS device is provided. A cap substrate is secured to a top surface of the MEMS substrate. The cap substrate includes a recess corresponding to the MEMS device in a bottom surface of the cap substrate. An integrated circuit die is secured to a top surface of the cap substrate over the recess. A housing covering the MEMS substrate, the cap substrate, and the integrated circuit die is formed. A through mold via (TMV) electrically coupled with the integrated circuit die and extending between a top surface of the housing and the integrated circuit die is formed. The structure resulting from application of the method is also provided.
Abstract translation: 提供了一种用于通过模具通孔（TMV）封装具有集成电路管芯的微机电系统（MEMS）装置的方法。 根据该方法，提供具有MEMS器件的MEMS基板。 盖基板被固定到MEMS基板的顶表面。 盖基板包括在盖基板的底表面中对应于MEMS器件的凹部。 集成电路管芯在凹部上固定到盖衬底的顶表面上。 形成覆盖MEMS基板，盖基板和集成电路管芯的壳体。 形成与集成电路管芯电耦合并且在壳体的顶表面和集成电路管芯之间延伸的贯通模通孔（TMV）。 还提供了应用该方法产生的结构。
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公开(公告)号：US20160145095A1
公开(公告)日：2016-05-26
申请号：US14639530
申请日：2015-03-05
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yi-Heng Tsai , Yi-Hsien Chang , Chun-Ren Cheng , Chun-Wen Cheng , Tzu-Heng Wu , Wei-Cheng Shen
CPC classification number: B81C1/00238 , B81B7/0048
Abstract: A three-dimensional (3D) integrated circuit (IC) includes a first IC and a second IC. The first IC includes a MEMS device and a first bonding structure. The second IC includes a second bonding structure. The first and second bonding structures are bonded together to couple the first IC to the second IC. A conformal barrier layer is disposed over a surface of the second IC nearest the first IC. An etch isolation structure is arranged beneath the surface of the second IC and encloses a sacrificial region which is arranged on either side of the second bonding structure and which is arranged in the second IC.
Abstract translation: 三维（3D）集成电路（IC）包括第一IC和第二IC。 第一IC包括MEMS器件和第一接合结构。 第二IC包括第二接合结构。 第一和第二接合结构被结合在一起以将第一IC耦合到第二IC。 在距离第一IC最近的第二IC的表面上设置保形阻挡层。 蚀刻隔离结构被布置在第二IC的表面下方并且包围一个牺牲区域，该牺牲区域被布置在第二接合结构的任一侧上并且被布置在第二IC中。
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115.发明授权Method to integrate different function devices fabricated by different process technologies 有权集成由不同工艺技术制造的不同功能器件的方法公开(公告)号：US09337182B2
公开(公告)日：2016-05-10
申请号：US13729281
申请日：2012-12-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Kuei-Sung Chang , Chun-Wen Cheng , Alex Kalnitsky , Chia-Hua Chu
CPC classification number: H01L27/0629 , H01L23/10 , H01L24/05 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/73 , H01L25/16 , H01L28/90 , H01L2224/0401 , H01L2224/04026 , H01L2224/04042 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/131 , H01L2224/13124 , H01L2224/13144 , H01L2224/14051 , H01L2224/16268 , H01L2224/29124 , H01L2224/29144 , H01L2224/32268 , H01L2224/73103 , H01L2924/19041 , H01L2924/19104 , H01L2924/014 , H01L2924/00012
Abstract: The present disclosure is directed to an apparatus and method for manufacture thereof. The apparatus includes a first passive substrate bonded to a second active substrate by a conductive metal interface. The conductive metal interface allows for integration of different function devices at a wafer level.
Abstract translation: 本公开涉及一种用于其制造的装置和方法。 该装置包括通过导电金属界面结合到第二有源衬底的第一无源衬底。 导电金属界面允许在晶片级集成不同功能的器件。
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Patent Agency Ranking
公开(公告)号：US09316704B2
公开(公告)日：2016-04-19
申请号：US14463814
申请日：2014-08-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Kuei-Sung Chang , Chun-Wen Cheng
CPC classification number: G01R33/06 , B81B2201/0292 , B81C1/00182 , G01R33/0286
Abstract: The present disclosure relates to a MEMS device with a magnetic film disposed on a first substrate, and an associated method of formation. In some embodiments, the magnetic film is disposed on a planar front surface of the first substrate such that depositing and patterning processes of the magnetic film is improved. A sensing gap of a MEMS device associated with the magnetic film is located between the magnetic film and a recessed lateral surface of a second substrate. The second substrate is bonded to the first substrate at front surfaces of the first and second substrate. Forming the magnetic film on the planar front allows for patterning of the magnetic film without leaving unwanted residues of magnetic material. Without the unwanted residue of magnetic material, less contamination from the magnetic material is introduced after dry etching and passivation processes, improving yield and reliability of the MEMS device.
Abstract translation: 本公开涉及具有设置在第一基板上的磁性膜的MEMS器件和相关联的形成方法。 在一些实施例中，磁性膜设置在第一基板的平面前表面上，使得磁性膜的沉积和图案化工艺得到改善。 与磁性膜相关联的MEMS器件的感测间隙位于第二衬底的磁性膜和凹入的侧表面之间。 第二基板在第一和第二基板的前表面处接合到第一基板。 在平坦的前表面上形成磁性膜允许磁性膜的图案化，而不会留下不需要的磁性材料残留物。 没有磁性材料的不需要的残留物，在干蚀刻和钝化处理之后，引入较少的磁性材料污染，提高了MEMS器件的成品率和可靠性。
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117.发明授权公开(公告)号：US09309109B2
公开(公告)日：2016-04-12
申请号：US13936380
申请日：2013-07-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chia-Hua Chu , Chun-Wen Cheng
IPC: B81C1/00
CPC classification number: B81C1/00238 , B81B2201/0257 , B81C1/00222 , B81C1/0023 , B81C1/00261 , B81C1/00301 , B81C2203/0792
Abstract: A method for forming an integrated semiconductor device includes providing a first wafer, providing a second wafer, and bonding the first wafer over the second wafer. The first wafer includes a first substrate having a microelectromechanical system (MEMS) device layer. The second wafer includes a second substrate having at least one active device, and at least one interconnect layer over the second substrate. The MEMS device layer is connected with the at least one interconnect layer. The method further includes forming at least one conductive plug through the first substrate and the MEMS device layer and inside the at least one interconnect layer, etching the second substrate and the at least one interconnect layer to form a cavity extending from a surface of the second substrate to the MEMS device layer, and etching the first substrate and the MEMS device layer to form a MEMS device interfacing with the cavity.
Abstract translation: 一种用于形成集成半导体器件的方法包括提供第一晶片，提供第二晶片，以及将第一晶片接合在第二晶片上。 第一晶片包括具有微机电系统（MEMS）器件层的第一衬底。 第二晶片包括具有至少一个有源器件的第二衬底和在第二衬底上的至少一个互连层。 MEMS器件层与至少一个互连层连接。 该方法还包括通过第一衬底和MEMS器件层和至少一个互连层内部形成至少一个导电插塞，蚀刻第二衬底和至少一个互连层以形成从第二衬底的表面延伸的空腔 衬底到MEMS器件层，并蚀刻第一衬底和MEMS器件层，以形成与腔体接合的MEMS器件。
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公开(公告)号：US20160054401A1
公开(公告)日：2016-02-25
申请号：US14463814
申请日：2014-08-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Kuei-Sung Chang , Chun-Wen Cheng
CPC classification number: G01R33/06 , B81B2201/0292 , B81C1/00182 , G01R33/0286
Abstract: The present disclosure relates to a MEMS device with a magnetic film disposed on a first substrate, and an associated method of formation. In some embodiments, the magnetic film is disposed on a planar front surface of the first substrate such that depositing and patterning processes of the magnetic film is improved. A sensing gap of a MEMS device associated with the magnetic film is located between the magnetic film and a recessed lateral surface of a second substrate. The second substrate is bonded to the first substrate at front surfaces of the first and second substrate. Forming the magnetic film on the planar front allows for patterning of the magnetic film without leaving unwanted residues of magnetic material. Without the unwanted residue of magnetic material, less contamination from the magnetic material is introduced after dry etching and passivation processes, improving yield and reliability of the MEMS device.
Abstract translation: 本公开涉及具有设置在第一基板上的磁性膜的MEMS器件和相关联的形成方法。 在一些实施例中，磁性膜设置在第一基板的平面前表面上，使得磁性膜的沉积和图案化工艺得到改善。 与磁性膜相关联的MEMS器件的感测间隙位于第二衬底的磁性膜和凹入的侧表面之间。 第二基板在第一和第二基板的前表面处接合到第一基板。 在平坦的前表面上形成磁性膜允许磁性膜的图案化，而不会留下不需要的磁性材料残留物。 没有磁性材料的不需要的残留物，在干法蚀刻和钝化处理之后引入较少的磁性材料污染，提高MEMS器件的产量和可靠性。
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119.发明授权公开(公告)号：US09254997B2
公开(公告)日：2016-02-09
申请号：US14013080
申请日：2013-08-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chun-Wen Cheng , Kai-Chih Liang , Chia-Hua Chu
CPC classification number: B81C1/00238 , B81B2201/0264
Abstract: A sensor is made up of two substrates which are adhered together. A first substrate includes a pressure-sensitive micro-electrical-mechanical (MEMS) structure and a conductive contact structure that protrudes outwardly beyond a first face of the first substrate. A second substrate includes a complementary metal oxide semiconductor (CMOS) device and a receiving structure made up of sidewalls that meet a conductive surface which is recessed from a first face of the second substrate. A conductive bonding material physically adheres the conductive contact structure to the conductive surface and electrically couples the MEMS structure to the CMOS device.
Abstract translation: 传感器由粘合在一起的两个基板组成。 第一衬底包括压敏微电机械（MEMS）结构和向外突出超过第一衬底的第一面的导电接触结构。 第二基板包括互补金属氧化物半导体（CMOS）器件和由侧壁构成的接收结构，所述接收结构满足从第二基板的第一面凹入的导电表面。 导电接合材料将导电接触结构物理地粘附到导电表面并将MEMS结构电耦合到CMOS器件。
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120.发明申请公开(公告)号：US20150091153A1
公开(公告)日：2015-04-02
申请号：US14041298
申请日：2013-09-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yu-Chia Liu , Chia-Hua Chu , Kuei-Sung Chang , Chun-Wen Cheng
CPC classification number: B81C1/00293 , B81B3/0018 , B81B3/0059 , B81B3/0067 , B81B7/0032 , B81B7/0041 , B81B7/02 , B81C1/00158 , B81C2203/0145 , H01L29/84
Abstract: The present disclosure relates to a method of forming a plurality of MEMs device having a plurality of cavities with different pressures on a wafer package system, and an associated apparatus. In some embodiments, the method is performed by providing a work-piece having a plurality of microelectromechanical system (MEMs) devices. A cap wafer is bonded onto the work-piece in a first ambient environment having a first pressure. The bonding forms a plurality of cavities abutting the plurality of MEMs devices, which are held at the first pressure. One or more openings are formed in one or more of the plurality of cavities leading to a gas flow path that could be held at a pressure level different from the first pressure. The one or more openings in the one or more of the plurality of cavities are then sealed in a different ambient environment having a different pressure, thereby causing the one or more of the plurality of cavities to be held at the different pressure.
Abstract translation: 本公开涉及一种在晶片封装系统上形成具有多个具有不同压力的空腔的多个MEM器件的方法，以及相关联的装置。 在一些实施例中，该方法通过提供具有多个微机电系统（MEM）装置的工件来执行。 帽盖晶片在具有第一压力的第一周围环境中结合到工件上。 接合形成与多个保持在第一压力下的多个MEM装置邻接的多个空腔。 一个或多个开口形成在多个空腔中的一个或多个空腔中，导致可以保持在不同于第一压力的压力水平的气体流动路径。 然后将多个空腔中的一个或多个中的一个或多个开口密封在具有不同压力的不同周围环境中，从而使多个空腔中的一个或多个保持在不同的压力。
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