摘要:
A process applied to grinding, dicing, and/or stacking semiconductors is disclosed. One of its features is that after transparent material is stuck on its active surface, a semiconductor is ground from another surface thereof to become thinner, then take advantage of transparency of the transparent material to cut the transparent material and the semiconductor, to obtain at least one smaller semiconductor unit such as die or chip. Another feature is that the transparent material remains sticking to the active surface of the die by an adhesion layer until the die is attached to a carrier or another die, and then the transparent material and the adhesion layer are removed by taking advantage of a function of the adhesion layer: receiving a ray to lose adhesion between it and the active surface. Preferably the ray reaches the adhesion layer via the transparent material stuck on the active surface of the die.
摘要:
The invention provides a sensor-type semiconductor package and fabrication method thereof. The fabrication method includes steps of: attaching a sensor chip to a chip carrier; electrically connecting the sensor chip and a chip carrier via a plurality of bonding wires; mounting a light-permeable body to the sensor chip with an adhesive layer as a partition therebetween, wherein the planar size of the light-permeable body is larger than a predefined planar size of the sensor-type semiconductor package to be formed; forming an encapsulant on the chip carrier for encapsulating the sensor chip and the bonding wires with the upper surface of the light-permeable body being exposed from the encapsulant; and cutting through the light-permeable body, the encapsulant and the chip carrier according to the predefined planar size. Accordingly the contacting area between the cut light-permeable body and the cut encapsulant increased and the bonding therebetween is reinforced.
摘要:
A semiconductor element with under bump metallurgy (UBM) structures and a fabrication method thereof are proposed. When UBM structures are formed on signal pads and ground pads on a surface of the semiconductor element that is completely fabricated with a circuit layout, a metallic layer for defining the UBM structures is retained, wherein the UBM structures on the ground pads are electrically connected to the metallic layer, and the UBM structures on the signal pads are electrically insulated from the metallic layer. This allows the metallic layer for defining the UBM structures to directly serve as a grounding layer for the semiconductor element.
摘要:
A process applied to grinding, dicing, and/or stacking semiconductors is disclosed. One feature of the process is that after transparent material is stuck on its active surface, a semiconductor is ground from another surface thereof to become thinner, then the semiconductor is diced, by taking advantage of transparency of the transparent material, from its active surface, to obtain at least one smaller semiconductor unit such as die/dice or chip(s). Another feature is that the transparent material remains sticking to the active surface of the die by an adhesion layer until the die is attached to a carrier or another die, and then the transparent material and the adhesion layer are removed by taking advantage of a function of the adhesion layer: receiving a ray to lose adhesion between it and the active surface. Preferably the ray reaches the adhesion layer via the transparent material stuck on the active surface of the die.
摘要:
A semiconductor package with a heat sink is provided in which at least one chip is mounted on the substrate and covered by a heat sink. The heat sink is formed with a plurality of grooves or holes at positions in contact with the substrate, allowing an adhesive material to be applied between the heat sink and the substrate and filled into the grooves or holes for attaching the heat sink onto the substrate. The adhesive material filled into the grooves or holes provides an anchoring effect for firmly positioning the heat sink on the substrate. Therefore, it is not necessary to form predetermined holes on the substrate for being coupled to fixing members such as bolts, and incorporation of the heat sink would not affect trace routability and arrangement of input/output connections such as solder balls on the substrate and would not lead to cracks of the chip.
摘要:
A semiconductor package with an embedded heat spreader (EHS) is proposed, which can be used for the fabrication of a semiconductor package, such as a FCBGA (Flip-Chip Ball Grid Array) package with a heat spreader, and which is characterized by the provision of a plurality of recessed portions, either in the heat spreader attach area of the substrate, or in the support portion of the heat spreader, or in both, so as to allow the fill-in portions of the adhesive layer that are filled in these recessed portions to form anchor structures to benefit the heat spreader against crosswise shear stress. Moreover, since the provision of these recessed portions allows an increase in the contact area of the adhesive layer with the substrate and the heat spreader, it can help increase the adhesive strength to provide the heat spreader more securely adhered in position on the substrate.
摘要:
The present invention provides a semiconductor package and a fabrication method thereof. The method includes the steps of: providing a chip carrier module having a plurality of chip carriers, disposing a plurality of electrical connecting points on the chip carriers, performing chip mounting and molding on the chip carrier module to form an encapsulant encapsulating the semiconductor chip, exposing the electrical connecting points from the encapsulant; forming a patterned circuit layer on the encapsulant, electrically connecting the patterned circuit layer to the electrical connecting points, cutting and separating the chip carriers to form a plurality of semiconductor packages each having a circuit layer formed on the encapsulant such that the circuit layer provides extra electrical connecting points and thereby enhances electrical performance of electrical products. During a package stacking process, no package is limited by the design of another package below.
摘要:
The present invention provides a semiconductor package and a fabrication method thereof. The method includes the steps of: providing a chip carrier module having a plurality of chip carriers, disposing a plurality of electrical connecting points on the chip carriers, performing chip mounting and molding on the chip carrier module to form an encapsulant encapsulating the semiconductor chip, exposing the electrical connecting points from the encapsulant; forming a patterned circuit layer on the encapsulant, electrically connecting the patterned circuit layer to the electrical connecting points, cutting and separating the chip carriers to form a plurality of semiconductor packages each having a circuit layer formed on the encapsulant such that the circuit layer provides extra electrical connecting points and thereby enhances electrical performance of electrical products. During a package stacking process, no package is limited by the design of another package below.
摘要:
A semiconductor package using copper wires and a wire bonding method for the same are proposed. The package includes a carrier having fingers and a chip mounted on the carrier. The method includes implanting stud bumps on the fingers of the carrier and electrically connecting the chip and the carrier by copper wires with one ends of the copper wires being bonded to bond pads of the chip and the other ends of the copper wires being bonded to the stud bumps on the carrier. The implanted stud bumps on the carrier improve bondability of the copper wires to the carrier and thus prevent stitch lift. With good bonding, residues of copper wires left behind after a bonding process have even tail ends and uniform tail length to enable fabrication of solder balls of uniform size, thereby eliminating a conventional step of implanting stud bumps on the bond pads of chips and preventing ball lift from occurring.
摘要:
The present invention discloses a flip-chip semiconductor package and a chip carrier thereof. The chip carrier includes a groove formed around a chip-mounting area. The groove may be formed along a periphery of the chip-mounting area or at corners thereof. The groove is filled with a filler of low Young's modulus so as to absorb and eliminate thermal stress, thereby preventing delamination between an underfill and a flip chip mounted on the chip-mounting area.