公开(公告)号：US20150294868A1

公开(公告)日：2015-10-15

申请号：US14253519

申请日：2014-04-15

申请人： Infineon Technologies AG

发明人： Gerhard Schmidt ,  Josef Riss ,  Thomas Neidhart

IPC分类号： H01L21/225 ,  H01L29/167 ,  H01L29/36 ,  H01L21/322

CPC分类号： H01L29/36 ,  H01L21/26506 ,  H01L21/3225

摘要： Chalcogen atoms are implanted into a single crystalline semiconductor substrate. At a density of interstitial oxygen of at least 5E16 cm−3 thermal donors containing oxygen are generated at crystal defects in the semiconductor substrate. Then the semiconductor substrate is heated up to a temperature above a deactivation temperature at which the thermal donors become inactive, wherein a portion of electrically active chalcogen atoms is increased.

摘要翻译： 将硫族原子注入单晶半导体衬底中。 在至少5E16cm-3的间隙氧的密度下，在半导体衬底中的晶体缺陷处产生含有氧的热供体。 然后将半导体衬底加热到​​高于失活温度的温度，在此温度下，供体不活跃，其中一部分电活性硫属原子增加。

公开(公告)号：US09136125B2

公开(公告)日：2015-09-15

申请号：US13600683

申请日：2012-08-31

申请人： Atsushi Murakoshi

发明人： Atsushi Murakoshi

IPC分类号： H01L23/544 ,  H01L21/265 ,  H01L21/322 ,  H01L27/146

CPC分类号： H01L21/26513 ,  H01L21/26566 ,  H01L21/3221 ,  H01L27/14603

摘要： According to an embodiment, a semiconductor device includes a substrate provided with a first region including an active element, the substrate including a second region containing boron with a density of 2×1020 cm−3 or more on a surface excluding the first region.

摘要翻译： 根据实施例，半导体器件包括设置有包括有源元件的第一区域的衬底，该衬底包括在除了第一区域之外的表面上含有密度为2×1020cm-3或更高的硼的第二区域。

公开(公告)号：US09129919B2

公开(公告)日：2015-09-08

申请号：US14084212

申请日：2013-11-19

申请人： SunEdison Semiconductor Limited

发明人： Robert J. Falster ,  Vladimir V. Voronkov ,  Marco Cornara ,  Daniela Gambaro ,  Massimiliano Olmo

IPC分类号： H01L21/322 ,  H01L21/324 ,  H01L21/66 ,  C30B29/06 ,  C30B33/02

CPC分类号： H01L21/324 ,  C30B29/06 ,  C30B33/02 ,  H01L22/12

摘要： Processes for the treatment of silicon wafers to form a high density non-uniform distribution of oxygen precipitate nuclei therein such that, upon being subjected to the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, the wafers form oxygen precipitates in the bulk and a precipitate-free zone near the surface are disclosed. The processes involve activation of inactive oxygen precipitate nuclei by performing heat treatments between about 400° C. and about 600° C. for at least about 1 hour.

摘要翻译： 用于处理硅晶片以形成高密度不均匀分布的氧的方法在其中析出核，使得在经受基本上任意的任何电子器件制造工艺的热处理循环后，晶片在本体中形成氧沉淀物， 公开了表面附近的无沉淀区。 所述方法包括通过在约400℃至约600℃之间进行热处理至少约1小时来活化无活性氧沉淀核。

公开(公告)号：US09123671B2

公开(公告)日：2015-09-01

申请号：US12982275

申请日：2010-12-30

申请人： Chi-Ming Chen ,  Chung-Yi Yu ,  Chia-Shiung Tsai ,  Ho-Yung David Hwang ,  Alexander Kalnitsky

发明人： Chi-Ming Chen ,  Chung-Yi Yu ,  Chia-Shiung Tsai ,  Ho-Yung David Hwang ,  Alexander Kalnitsky

IPC分类号： H01L21/322

CPC分类号： H01L21/3225

摘要： Provided is a method of fabricating a semiconductor device. The method includes: receiving a silicon wafer that contains oxygen; forming a zone in the silicon wafer, the zone being substantially depleted of oxygen; causing a nucleation process to take place in the silicon wafer to form oxygen nuclei in a region of the silicon wafer outside the zone; and growing the oxygen nuclei into defects. Also provided is an apparatus that includes a silicon wafer. The silicon wafer includes: a first portion that is substantially free of oxygen, the first portion being disposed near a surface of the silicon wafer; and a second portion that contains oxygen; wherein the second portion is at least partially surrounded by the first portion.

摘要翻译： 提供一种制造半导体器件的方法。 该方法包括：接收含有氧的硅晶片; 在硅晶片中形成区域，该区域基本上耗尽氧气; 导致在硅晶片中发生成核过程，以在区域外的硅晶片的区域中形成氧核; 并将氧原子生长成缺陷。 还提供了一种包括硅晶片的装置。 硅晶片包括：基本上不含氧的第一部分，第一部分设置在硅晶片的表面附近; 和含有氧的第二部分; 其中所述第二部分至少部分地被所述第一部分包围。

公开(公告)号：US09111883B2

公开(公告)日：2015-08-18

申请号：US14358618

申请日：2012-11-12

申请人： SHIN-ETSU HANDOTAI CO., LTD.

发明人： Ryoji Hoshi ,  Hiroyuki Kamada ,  Suguru Matsumoto

IPC分类号： H01L21/322 ,  C30B29/06 ,  C30B15/00 ,  C30B33/02 ,  H01L21/66

CPC分类号： H01L21/3225 ,  C30B15/00 ,  C30B29/06 ,  C30B33/02 ,  H01L22/12

摘要： The present invention provides a method for evaluating silicon single crystal wherein an amount Δ[C] of carriers generated due to oxygen donors produced when a heat treatment is performed to the silicon single crystal is calculated and evaluated, the amount Δ[C] being calculated from oxygen concentration [Oi] in the silicon single crystal, a temperature T of the heat treatment, a time t of the heat treatment, and an oxygen diffusion coefficient D(T) at the temperature T by using the following relational expression: Δ[C]=α[Oi]5×exp(−β·D(T)·[Oi]·t) (where α and β are constants). As a result, there is provided a method that enables evaluating an amount of carriers generated due to oxygen donors in silicon single crystal in a further versatile manner.

摘要翻译： 本发明提供了一种评估硅单晶的方法，其中计算并评估了对单晶进行热处理时产生的由氧供体产生的载流子的量[D] [C]，量Dgr [C] 由硅单晶中的氧浓度∞计算，热处理温度T，热处理时间t和温度T下的氧扩散系数D（T），使用以下关系式： ＆Dgr; [C] =α[Oi] 5×exp（ - ＆bgr;·D（T）·[Oi]·t）（其中α和＆bgr是常数）。 结果，提供了一种能够以更多样化的方式评价由于硅单晶中的氧供体产生的载流子的量的方法。

公开(公告)号：US09070658B2

公开(公告)日：2015-06-30

申请号：US14283578

申请日：2014-05-21

申请人： FUJI ELECTRIC CO., LTD.

发明人： Michio Nemoto ,  Takashi Yoshimura

IPC分类号： H01L29/167 ,  H01L29/207 ,  H01L29/227 ,  H01L29/36 ,  H01L21/263 ,  H01L29/66 ,  H01L29/739 ,  H01L29/861 ,  H01L29/868 ,  H01L29/885 ,  H01L29/32 ,  H01L21/268 ,  H01L21/322

CPC分类号： H01L29/0611 ,  H01L21/263 ,  H01L21/268 ,  H01L21/3221 ,  H01L29/06 ,  H01L29/0684 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/36 ,  H01L29/66348 ,  H01L29/7393 ,  H01L29/7397 ,  H01L29/861 ,  H01L29/868 ,  H01L29/885

摘要： A p anode layer (2) is formed on one main surface of an n− drift layer (1). An n+ cathode layer (3) having an impurity concentration more than that of the n− drift layer (1) is formed on the other main surface of the n− drift layer (1). An anode electrode (4) is formed on the surface of the p anode layer (2). A cathode electrode (5) is formed on the surface of the n+ cathode layer (3). An n-type broad buffer region (6) that has a net doping concentration more than the bulk impurity concentration of a wafer and less than that of the n+ cathode layer (3) and the p anode layer (2) is formed in the n− drift layer (1). The resistivity ρ0 of the n− drift layer (1) satisfies 0.12V0≦ρ0≦0.25V0 with respect to a rated voltage V0. The total amount of the net doping concentration of the broad buffer region (6) is equal to or more than 4.8×1011 atoms/cm2 and equal to or less than 1.0×1012 atoms/cm2.

摘要翻译： p阳极层（2）形成在n漂移层（1）的一个主表面上。 在n漂移层（1）的另一个主表面上形成杂质浓度大于n漂移层（1）的n +阴极层（3）。 在p阳极层（2）的表面上形成阳极电极（4）。 在n +阴极层（3）的表面上形成有阴极电极（5）。 n型宽缓冲区（6）的净掺杂浓度大于晶片的体杂质浓度并且小于n +阴极层（3）和p阳极层（2）的净掺杂浓度 漂移层（1）。 相对于额定电压V0，n漂移层（1）的电阻率＆rgr0满足0.12V0＆lt; nlE;＆rgr; 0＆nlE; 0.25V0。 宽缓冲区域（6）的净掺杂浓度的总量等于或大于4.8×10 11原子/ cm 2，等于或小于1.0×10 12原子/ cm 2。

公开(公告)号：US09048268B2

公开(公告)日：2015-06-02

申请号：US13785172

申请日：2013-03-05

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Mu-Chen Chen ,  Yi-Tse Huang ,  Wei-Fan Liao ,  Han-Ti Hsiaw ,  Chia-I Shen

IPC分类号： H01L21/311 ,  H01L21/67 ,  H01L21/312 ,  H01L21/322 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/308

CPC分类号： H01L21/67069 ,  H01J37/32339 ,  H01J37/32724 ,  H01J37/32798 ,  H01J2237/335 ,  H01L21/02057 ,  H01L21/02063 ,  H01L21/0209 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/31133 ,  H01L21/31138 ,  H01L21/312 ,  H01L21/3225 ,  H01L21/67028 ,  H01L21/67051 ,  H01L21/76807 ,  H01L21/76814

摘要： A method for removing photoresist residue includes etching a photoresist layer disposed over a front side of a semiconductor substrate during fabrication of a semiconductor device, and exposing at least one of the front side and the back side of the semiconductor substrate to an atmosphere comprising active oxygen. The method further includes cleaning at least one of the front side and the back side of the semiconductor substrate with a cleaning fluid.

摘要翻译： 一种除去光致抗蚀剂残渣的方法包括在制造半导体器件期间蚀刻设置在半导体衬底的前侧上的光致抗蚀剂层，并将半导体衬底的前侧和后侧中的至少一个暴露于包含活性氧的气氛 。 该方法还包括用清洁液清洗半导体衬底的前侧和后侧中的至少一个。

公开(公告)号：US09029240B2

公开(公告)日：2015-05-12

申请号：US14394598

申请日：2013-04-19

申请人： Shin-Etsu Handotai Co., Ltd.

发明人： Hiroji Aga ,  Toru Ishizuka

IPC分类号： H01L21/30 ,  H01L21/46 ,  H01L21/762 ,  H01L21/306 ,  H01L21/265 ,  H01L21/322 ,  H01L21/20

CPC分类号： H01L21/76254 ,  H01L21/2007 ,  H01L21/265 ,  H01L21/26506 ,  H01L21/30604 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/3226 ,  H01L21/76251 ,  H01L21/76256

摘要： The present invention provides a method for manufacturing an SOI wafer, in which an insulator film is formed at least on all surfaces of a base wafer, and while protecting a first part of the insulator film on a back surface on the opposite side from a bonded surface of the base wafer, a bonded wafer before separating a bond wafer along a layer of the implanted ion is brought into contact with a liquid capable of dissolving the insulator film or exposed to a gas capable of dissolving the insulator film, and a second part of the insulator film interposed between the bond wafer and the base wafer is etched from an outer circumferential edge of the bonded wafer and toward the center of the bonded wafer. The method can control the terrace width and inhibit warping of the SOI wafer in a bonding process with a base wafer.

摘要翻译： 本发明提供了一种制造SOI晶片的方法，其中至少在基片的所有表面上形成绝缘膜，同时在绝缘膜的相对侧的背面保护绝缘膜的第一部分， 基底晶片的表面，在沿着注入离子的层分离接合晶片之前的接合晶片与能够溶解绝缘体膜或暴露于能够溶解绝缘膜的气体的液体接触，第二部分 介于接合晶片和基底晶片之间的绝缘体膜从接合晶片的外周边缘朝向接合晶片的中心蚀刻。 该方法可以在与基底晶片的接合工艺中控制平台宽度并抑制SOI晶片的翘曲。

公开(公告)号：US09012316B2

公开(公告)日：2015-04-21

申请号：US14078247

申请日：2013-11-12

申请人： Tokyo Electron Limited

发明人： Robert D Clark

IPC分类号： H01L21/22 ,  H01L21/38 ,  H01L21/322 ,  H01L21/225 ,  H01L29/10 ,  H01L29/66 ,  H01L29/739

CPC分类号： H01L21/322 ,  H01L21/02175 ,  H01L21/0228 ,  H01L21/2254 ,  H01L21/2255 ,  H01L21/2256 ,  H01L21/31111 ,  H01L21/324 ,  H01L29/105 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7391

摘要： A method for forming an ultra-shallow boron dopant region in a substrate is provided. In one embodiment, the method includes depositing, by atomic layer deposition (ALD), a boron dopant layer in direct contact with the substrate, where the boron dopant layer contains an oxide, a nitride, or an oxynitride formed by alternating gaseous exposures of a boron amide precursor and a reactant gas. The method further includes patterning the dopant layer and forming an ultra-shallow dopant region in the substrate by diffusing boron from the boron dopant layer into the substrate by a thermal treatment.

摘要翻译： 提供了一种在衬底中形成超浅硼掺杂剂区域的方法。 在一个实施例中，该方法包括通过原子层沉积（ALD）沉积与衬底直接接触的硼掺杂剂层，其中硼掺杂剂层含有氧化物，氮化物或氧氮化物，其通过交替气相曝光形成 硼酰胺前体和反应气体。 所述方法还包括通过热处理将硼从硼掺杂剂层扩散到衬底中，使掺杂剂层图案化并在衬底中形成超浅掺杂剂区域。

公开(公告)号：US08993427B2

公开(公告)日：2015-03-31

申请号：US14496135

申请日：2014-09-25

申请人： PFC Device Corp.

发明人： Mei-Ling Chen ,  Hung-Hsin Kuo

IPC分类号： H01L21/322 ,  H01L21/02 ,  H01L21/28 ,  H01L21/308 ,  H01L29/66

CPC分类号： H01L29/66143 ,  H01L21/28017 ,  H01L21/3086 ,  H01L29/407 ,  H01L29/456 ,  H01L29/66136 ,  H01L29/7813 ,  H01L29/861

摘要： A method for manufacturing a rectifier with a vertical MOS structure is provided. A first multi-trench structure and a first mask layer are formed at a first side of the semiconductor substrate. A second multi-trench structure is formed in the second side of the semiconductor substrate. A gate oxide layer, a polysilicon structure and a metal sputtering layer are sequentially formed on the second multi-trench structure. The rectifier further includes a wet oxide layer and a plurality of doped regions. The wet oxide layer is formed on a surface of the first multi-trench structure and in the semiconductor substrate. The doping regions are formed on a region between the semiconductor substrate and the second multi-trench structure, and located beside the mask layer. The metal sputtering layer is formed on the first mask layer corresponding to the first multi-trench structure.

摘要翻译： 提供一种制造具有垂直MOS结构的整流器的方法。 第一多沟槽结构和第一掩模层形成在半导体衬底的第一侧。 第二多沟槽结构形成在半导体衬底的第二侧。 在第二多沟槽结构上依次形成栅氧化层，多晶硅结构和金属溅射层。 整流器还包括湿式氧化物层和多个掺杂区域。 在第一多沟槽结构的表面和半导体衬底中形成湿氧化物层。 掺杂区域形成在半导体衬底和第二多沟槽结构之间的区域上，并且位于掩模层旁边。 在对应于第一多沟槽结构的第一掩模层上形成金属溅射层。