公开(公告)号：US20170133996A1

公开(公告)日：2017-05-11

申请号：US14936998

申请日：2015-11-10

Applicant: QUALCOMM Incorporated

Inventor： Daeik Daniel Kim ,  Chengjie Zuo ,  David Francis Berdy ,  Changhan Hobie Yun ,  Mario Francisco Velez ,  Jonghae Kim

IPC: H03H7/01 ,  H03H3/00 ,  H01L23/66 ,  H01L49/02 ,  H01L25/18

CPC classification number: H03H7/0115 ,  H01L23/66 ,  H01L25/0657 ,  H01L25/18 ,  H01L28/10 ,  H01L28/40 ,  H01L2223/6677 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2225/06513 ,  H01L2225/06541 ,  H03H7/1766 ,  H03H7/1775

Abstract: A circuit includes a localized metal-insulator-metal (MIM) capacitor array in a radio frequency (RF) front end circuit, which is integrated on a first die, and includes a localized common shared ground node within the localized MIM capacitor array, a plurality of inductors, and a plurality of RF filters. Each of the plurality of RF filters includes a plurality of passive resonant frequency circuits, and each of the plurality of passive resonant frequency circuits is implemented utilizing one or more MIM capacitors in the localized MIM capacitor array, and one or more of the plurality of inductors. The plurality of inductors may be arranged at a periphery of the localized MIM capacitor array on the first die or integrated on a second die, which is coupled to the first die. Each of the MIM capacitors in the localized MIM capacitor array has a different capacitance value.

公开(公告)号：US20170084531A1

公开(公告)日：2017-03-23

申请号：US14861958

申请日：2015-09-22

Applicant: QUALCOMM Incorporated

Inventor： Shiqun Gu ,  Daeik Daniel Kim ,  Matthew Michael Nowak ,  Jonghae Kim ,  Changhan Hobie Yun ,  Je-Hsiung Jeffrey Lan ,  David Francis Berdy

IPC: H01L23/498 ,  H01L21/8234 ,  H01L21/306 ,  H01L27/088 ,  H01L27/12 ,  H01L23/66 ,  H01L21/84 ,  H01L21/304

CPC classification number: H01L27/1203 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/76251 ,  H01L21/76802 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/823481 ,  H01L21/84 ,  H01L23/49894 ,  H01L23/528 ,  H01L23/66 ,  H01L27/088 ,  H01L27/092 ,  H01L27/1222 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1266 ,  H01L29/1087 ,  H01L29/66772

Abstract: An integrated circuit (IC) includes a first semiconductor device on a glass substrate. The first semiconductor device includes a first semiconductive region of a bulk silicon wafer. The IC includes a second semiconductor device on the glass substrate. The second semiconductor device includes a second semiconductive region of the bulk silicon wafer. The IC includes a through substrate trench between the first semiconductive region and the second semiconductive region. The through substrate trench includes a portion disposed beyond a surface of the bulk silicon wafer.

公开(公告)号：US20170077079A1

公开(公告)日：2017-03-16

申请号：US14853701

申请日：2015-09-14

Applicant: QUALCOMM Incorporated

Inventor： Je-Hsiung Jeffrey Lan ,  Niranjan Sunil Mudakatte ,  Changhan Hobie Yun ,  Daeik Daniel Kim ,  Chengjie Zuo ,  David Francis Berdy ,  Mario Francisco Velez ,  Jonghae Kim

IPC: H01L27/01 ,  H01L49/02

CPC classification number: H01L27/01 ,  H01L21/4846 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5223 ,  H01L23/5227 ,  H01L28/10 ,  H01L28/75 ,  H01L2224/11

Abstract: A device includes a glass substrate and a capacitor. The capacitor includes a first metal coupled to a first electrode, a dielectric structure, and a via structure comprising a second electrode of the capacitor. The first metal structure is separated from the via structure by the dielectric structure.

Abstract translation: 一种装置包括玻璃基板和电容器。 电容器包括耦合到第一电极的第一金属，电介质结构和包括电容器的第二电极的通孔结构。 第一金属结构通过电介质结构与通孔结构分离。

公开(公告)号：US09461614B2

公开(公告)日：2016-10-04

申请号：US14067908

申请日：2013-10-30

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Chengjie Zuo ,  Mario Francisco Velez ,  Daeik Daniel Kim ,  Jonghae Kim

IPC: H01L41/047 ,  H03H9/17 ,  H03H9/02 ,  H03H9/13 ,  H03H9/56

CPC classification number: H03H9/17 ,  H01L41/047 ,  H03H9/02157 ,  H03H9/13 ,  H03H9/56

Abstract: A resonator includes a piezoelectric core, a set of electrodes, and at least one ground terminal. The electrodes are arranged on the piezoelectric core and also includes at least one input electrode having a first width and at least one output electrode having a second width that differs from the first width. The ground terminal is also on the piezoelectric core.

Abstract translation: 谐振器包括压电芯，一组电极和至少一个接地端子。 电极布置在压电芯上，并且还包括具有第一宽度的至少一个输入电极和具有不同于第一宽度的第二宽度的至少一个输出电极。 接地端子也在压电铁芯上。

公开(公告)号：US09379686B2

公开(公告)日：2016-06-28

申请号：US14196355

申请日：2014-03-04

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Chengjie Zuo ,  Jonghae Kim ,  Mario Francisco Velez ,  Daeik Daniel Kim ,  Rick Allen Wilcox

IPC: H03H9/13 ,  H03H9/15 ,  H03H9/54 ,  H03H9/02 ,  H03H9/46 ,  H03H3/02

CPC classification number: H03H9/02448 ,  H03H3/02 ,  H03H9/02133 ,  H03H9/02228 ,  H03H9/02244 ,  H03H9/132 ,  H03H9/133 ,  H03H9/15 ,  H03H9/462 ,  H03H9/54 ,  H03H2003/027

Abstract: An integrated circuit device includes a piezoelectric substrate having a first surface and a second surface opposite the first surface. The device also includes a first electrode and a second electrode on the first surface of the piezoelectric substrate, the first electrode having a first width and the second electrode having a second width. The device further includes a third electrode and a fourth electrode on the second surface of the piezoelectric substrate, the third electrode having a third width that is substantially the same as the second width, and the fourth electrode having a fourth width that is substantially the same as the first width. The first and third electrodes operate as part of a first portion of a microelectromechanical systems (MEMS) resonator, and the second and fourth electrodes operate as part of a second portion of the MEMS resonator.

Abstract translation: 集成电路装置包括具有第一表面和与第一表面相对的第二表面的压电基片。 该装置还包括在压电基片的第一表面上的第一电极和第二电极，第一电极具有第一宽度，第二电极具有第二宽度。 该装置还包括在压电基片的第二表面上的第三电极和第四电极，第三电极具有与第二宽度基本相同的第三宽度，第四电极具有基本相同的第四宽度 作为第一宽度。 第一和第三电极作为微机电系统（MEMS）谐振器的第一部分的一部分工作，第二和第四电极作为MEMS谐振器的第二部分的一部分工作。

公开(公告)号：US20160181233A1

公开(公告)日：2016-06-23

申请号：US14580900

申请日：2014-12-23

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Je-Hsiung Jeffrey Lan ,  Daeik Daniel Kim ,  David Francis Berdy ,  Chengjie Zuo ,  Jonghae Kim ,  Niranjan Sunil Mudakatte ,  Mario Francisco Velez ,  Robert Paul Mikulka

IPC: H01L27/01 ,  H01L49/02

CPC classification number: H01L28/40 ,  H01G4/33 ,  H01G4/38 ,  H01L27/016 ,  H01L27/0805 ,  H01L2224/18

Abstract: Metal-insulator-metal (MIM) capacitors arranged in a pattern to reduce inductance, and related methods, are disclosed. In one aspect, circuits are provided that employ MIM capacitors coupled in series. The MIM capacitors are arranged in a pattern, wherein a MIM capacitor is placed so as to be electromagnetically adjacent to at least two MIM capacitors, and so that a current of the MIM capacitor flows in a direction opposite or substantially opposite of a direction in which a current of each adjacent MIM capacitor flows. The magnetic field generated at metal connections of each MIM capacitor rotates in an opposite direction of the magnetic field of each electromagnetically adjacent MIM capacitor, and thus a larger proportion of magnetic fields cancel out one another rather than combining, reducing equivalent series inductance (ESL) compared to linear arrangement of MIMs.

Abstract translation: 公开了以图案排列以降低电感的金属绝缘体金属（MIM）电容器及相关方法。 在一个方面，提供了采用串联耦合的MIM电容器的电路。 MIM电容器以图案布置，其中MIM电容器放置成与至少两个MIM电容器电磁相邻，并且使得MIM电容器的电流沿与其中的MIM方向相反或基本上相反的方向流动 每个相邻MIM电容器的电流流动。 在每个MIM电容器的金属连接处产生的磁场沿与每个电磁相邻的MIM电容器的磁场相反的方向旋转，因此较大比例的磁场彼此抵消而不是组合，从而减小了等效串联电感（ESL） 与MIM的线性排列相比。

公开(公告)号：US09370103B2

公开(公告)日：2016-06-14

申请号：US14020558

申请日：2013-09-06

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Chengjie Zuo ,  Jonghae Kim ,  Daeik Daniel Kim ,  Mario Francisco Velez

IPC: H05K1/18 ,  H05K1/16 ,  H05K1/03 ,  H05K1/11 ,  H05K3/46 ,  H01L23/498 ,  H01L23/50

CPC classification number: H05K1/162 ,  H01L23/49822 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2924/15311 ,  H05K1/0306 ,  H05K1/032 ,  H05K1/115 ,  H05K1/181 ,  H05K3/46 ,  H05K2201/10378 ,  H05K2201/10674 ,  Y10T29/49165

Abstract: An interposer for a chipset includes multilayer thin film capacitors incorporated therein to reduce parasitic inductance in the chipset. Power and ground terminals are laid out in a staggered pattern to cancel magnetic fields between conductive vias to reduce equivalent series inductance (ESL).

Abstract translation: 用于芯片组的插入件包括并入其中的多层薄膜电容器，以减少芯片组中的寄生电感。 电源和接地端子布置成交错图案，以消除导电通孔之间的磁场，以减少等效串联电感（ESL）。

公开(公告)号：US09331665B2

公开(公告)日：2016-05-03

申请号：US13887568

申请日：2013-05-06

Applicant: QUALCOMM Incorporated

Inventor： Chengjie Zuo ,  Daeik D. Kim ,  Je-Hsiung Lan ,  Jonghae Kim ,  Mario Francisco Velez ,  Changhan Yun ,  David F. Berdy ,  Robert P. Mikulka ,  Matthew M. Nowak ,  Xiangdong Zhang ,  Puay H. See

IPC: H03H7/46

Abstract: Tunable diplexers in three-dimensional (3D) integrated circuits (IC) (3DIC) are disclosed. In one embodiment, the tunable diplexer may be formed by providing one of either a varactor or a variable inductor in the diplexer. The variable nature of the varactor or the variable inductor allows a notch in the diplexer to be tuned so as to select a band stop to eliminate harmonics at a desired frequency as well as control the cutoff frequency of the pass band. By stacking the elements of the diplexer into three dimensions, space is conserved and a variety of varactors and inductors are able to be used.

公开(公告)号：US09324779B2

公开(公告)日：2016-04-26

申请号：US14063934

申请日：2013-10-25

Applicant: QUALCOMM Incorporated

Inventor： Young Kyu Song ,  Daeik Daniel Kim ,  Jonghae Kim ,  Xiaonan Zhang ,  Ryan David Lane ,  Mario Francisco Velez ,  Chengjie Zuo ,  Changhan Hobie Yun

IPC: H01L49/02 ,  H01L23/522 ,  H01L23/64

CPC classification number: H01L28/10 ,  H01L23/5227 ,  H01L23/645 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/00

Abstract: Some novel features pertain to an integrated device that includes a substrate, a first cavity through the substrate, and a toroid inductor configured around the first cavity of the substrate. The toroid inductor includes a set of windings configured around the first cavity. The set of windings includes a first set of interconnects on a first surface of the substrate, a set of though substrate vias (TSVs), and a second set of interconnects on a second surface of the substrate. The first set of interconnects is coupled to the second set of interconnects through the set TSVs. In some implementations, the integrated device further includes an interconnect material (e.g., solder ball) located within the first cavity. The interconnect material is configured to couple a die to a printed circuit board. In some implementations, the interconnect material is part of the toroid inductor.

Abstract translation: 一些新颖的特征涉及包括衬底，通过衬底的第一腔和围绕衬底的第一腔配置的环形电感器的集成器件。 环形电感器包括围绕第一腔配置的一组绕组。 该组绕组包括在衬底的第一表面上的第一组互连，一组通过衬底通孔（TSV）和在衬底的第二表面上的第二组互连。 第一组互连通过集合TSV耦合到第二组互连。 在一些实施方案中，集成器件还包括位于第一腔内的互连材料（例如，焊球）。 互连材料被配置为将管芯耦合到印刷电路板。 在一些实施方案中，互连材料是环形电感器的一部分。

公开(公告)号：US20150061813A1

公开(公告)日：2015-03-05

申请号：US14155244

申请日：2014-01-14

Applicant: QUALCOMM Incorporated

Inventor： Daeik Daniel Kim ,  Chengjie Zuo ,  Changhan Hobie Yun ,  Mario Francisco Velez ,  Robert Paul Mikulka ,  Xiangdong Zhang ,  Jonghae Kim ,  Je-Hsiung Lan

IPC: H01F27/28 ,  H01F41/04

CPC classification number: H01F41/041 ,  H01F17/0013 ,  H01F27/2804 ,  H01F41/042 ,  H01F2017/0053 ,  H01F2017/0073 ,  H01F2027/2809

Abstract: A particular device includes a substrate and a spiral inductor coupled to the substrate. The spiral inductor includes a first conductive spiral and a second conductive spiral overlaying the first conductive spiral. A first portion of an innermost turn of the spiral inductor has a first thickness in a direction perpendicular to the substrate. The first portion of the innermost turn includes a first portion of the first conductive spiral and does not include the second conductive spiral. A second portion of the innermost turn includes a first portion of the second conductive spiral. A portion of an outermost turn of the spiral inductor has a second thickness in the direction perpendicular to the substrate that is greater than the first thickness. A portion of the outermost turn includes a second portion of the first conductive spiral and a second portion of the second conductive spiral.

Abstract translation: 特定器件包括衬底和耦合到衬底的螺旋电感器。 螺旋电感器包括覆盖第一导电螺旋的第一导电螺旋和第二导电螺旋。 螺旋电感器的最内圈的第一部分在垂直于衬底的方向上具有第一厚度。 最内圈的第一部分包括第一导电螺旋的第一部分，并且不包括第二导电螺旋。 最内圈的第二部分包括第二导电螺旋的第一部分。 螺旋电感器的最外圈的一部分在垂直于衬底的方向上具有大于第一厚度的第二厚度。 最外圈的一部分包括第一导电螺旋的第二部分和第二导电螺旋的第二部分。