公开(公告)号：US09378978B2

公开(公告)日：2016-06-28

申请号：US14448901

申请日：2014-07-31

Applicant: Applied Materials, Inc.

Inventor： Vinod R. Purayath ,  Randhir Thakur ,  Shankar Venkataraman ,  Nitin K. Ingle

IPC: H01L21/3213 ,  H01L21/28 ,  H01L29/40 ,  H01L29/423 ,  H01L21/677

CPC classification number: H01L21/32137 ,  H01J37/32357 ,  H01L21/28035 ,  H01L21/28114 ,  H01L21/28273 ,  H01L21/31116 ,  H01L21/67739 ,  H01L21/76224 ,  H01L29/401 ,  H01L29/42324 ,  H01L29/66825

Abstract: Methods of etching back shallow trench isolation (STI) dielectric and trimming the exposed floating gate without breaking vacuum are described. The methods include recessing silicon oxide dielectric gapfill to expose vertical sidewalls of polysilicon floating gates. The exposed vertical sidewalls are then isotropically etched to evenly thin the polysilicon floating gates on the same substrate processing mainframe. Both recessing silicon oxide and isotropically etching polysilicon use remotely excited fluorine-containing apparatuses attached to the same mainframe to facilitate performing both operations without an intervening atmospheric exposure. An inter-poly dielectric may then be conformally deposited either on the same mainframe or outside the mainframe.

Abstract translation: 描述了在不破坏真空的情况下回蚀浅沟槽隔离（STI）电介质和修整暴露的浮动栅极的方法。 这些方法包括凹陷氧化硅电介质间隙填充以暴露多晶硅浮动栅极的垂直侧壁。 然后对暴露的垂直侧壁进行各向同性蚀刻，以在相同的基板处理主机上均匀地稀薄多晶硅浮动栅极。 凹陷氧化硅和各向同性蚀刻多晶硅都使用连接在同一主机上的远程激发的含氟设备，以便于在没有中间大气暴露的情况下进行两种操作。 然后可将多晶硅电介质保形地沉积在同一主机上或主机外部。

公开(公告)号：US09378969B2

公开(公告)日：2016-06-28

申请号：US14309364

申请日：2014-06-19

Applicant: Applied Materials, Inc.

Inventor： Ching-Mei Hsu ,  Nitin K. Ingle ,  Hiroshi Hamana ,  Anchuan Wang

IPC: H01L21/3065 ,  H01L21/311 ,  H01J37/32 ,  H01L21/302 ,  H01L21/306 ,  H01L21/308

CPC classification number: H01L21/3065 ,  H01J37/32357 ,  H01J2237/334 ,  H01L21/302 ,  H01L21/306 ,  H01L21/308 ,  H01L21/311 ,  H01L21/31116 ,  H01L21/31122 ,  H01L21/31138 ,  H01L21/31144

Abstract: A method of etching carbon films on patterned heterogeneous structures is described and includes a gas phase etch using remote plasma excitation. The remote plasma excites a fluorine-containing precursor and an oxygen-containing precursor, the plasma effluents created are flowed into a substrate processing region. The plasma effluents etch the carbon film more rapidly than silicon, silicon nitride, silicon carbide, silicon carbon nitride and silicon oxide.

Abstract translation: 描述了在图案化异质结构上蚀刻碳膜的方法，并且包括使用远程等离子体激发的气相蚀刻。 远程等离子体激发含氟前体和含氧前体，产生的等离子体流出物流入基板处理区域。 等离子体流出物比硅，氮化硅，碳化硅，氮化碳和氧化硅更快地蚀刻碳膜。

公开(公告)号：US20160181112A1

公开(公告)日：2016-06-23

申请号：US14581332

申请日：2014-12-23

Applicant: Applied Materials, Inc.

Inventor： Jun Xue ,  Ching-Mei Hsu ,  Zihui Li ,  Ludovic Godet ,  Anchuan Wang ,  Nitin K. Ingle

IPC: H01L21/3065 ,  H01L21/265

CPC classification number: H01L21/3065 ,  H01J37/32357 ,  H01J37/32366 ,  H01J37/32422 ,  H01J37/3244 ,  H01J37/32954 ,  H01L21/2236 ,  H01L21/265 ,  H01L21/26506 ,  H01L21/311 ,  H01L21/31116 ,  H01L21/3115 ,  H01L21/31155 ,  H01L21/32137 ,  H01L21/32155 ,  H01L21/3223

Abstract: A method of anisotropically dry-etching exposed substrate material on a patterned substrate is described. The patterned substrate has a gap formed in a single material made from, for example, a silicon-containing material or a metal-containing material. The method includes directionally ion-implanting the patterned structure to implant the bottom of the gap without implanting substantially the walls of the gap. Subsequently, a remote plasma is formed using a fluorine-containing precursor to etch the patterned substrate such that either (1) the walls are selectively etched relative to the floor of the gap, or (2) the floor is selectively etched relative to the walls of the gap. Without ion implantation, the etch operation would be isotropic owing to the remote nature of the plasma excitation during the etch process.

Abstract translation: 描述了在图案化衬底上各向异性地干蚀刻暴露的衬底材料的方法。 图案化衬底具有由例如含硅材料或含金属材料制成的单一材料形成的间隙。 该方法包括定向离子注入图案化结构以植入间隙的底部，而基本上不插入间隙的壁。 随后，使用含氟前体形成远程等离子体以蚀刻图案化衬底，使得（1）相对于间隙的底板选择性地蚀刻壁，或者（2）相对于壁选择性地蚀刻地板 的差距。 在没有离子注入的情况下，蚀刻操作将是各向同性的，这是由于在蚀刻过程期间等离子体激发的远程特性。

公开(公告)号：US09355922B2

公开(公告)日：2016-05-31

申请号：US14514213

申请日：2014-10-14

Applicant: Applied Materials, Inc.

Inventor： Soonam Park ,  Yufei Zhu ,  Edwin C. Suarez ,  Nitin K. Ingle ,  Dmitry Lubomirsky ,  Jiayin Huang

IPC: H01L21/3065 ,  H01L21/66 ,  H01L21/67

CPC classification number: H01L21/67069 ,  C23C16/455 ,  C23C16/50 ,  H01J37/32082 ,  H01J37/3244 ,  H01J37/32532 ,  H01J37/3255 ,  H01J37/32972 ,  H01J2237/334 ,  H01L21/31116 ,  H01L21/32137 ,  H01L21/67253 ,  H01L22/26

Abstract: A method of conditioning internal surfaces of a plasma source includes flowing first source gases into a plasma generation cavity of the plasma source that is enclosed at least in part by the internal surfaces. Upon transmitting power into the plasma generation cavity, the first source gases ignite to form a first plasma, producing first plasma products, portions of which adhere to the internal surfaces. The method further includes flowing the first plasma products out of the plasma generation cavity toward a process chamber where a workpiece is processed by the first plasma products, flowing second source gases into the plasma generation cavity. Upon transmitting power into the plasma generation cavity, the second source gases ignite to form a second plasma, producing second plasma products that at least partially remove the portions of the first plasma products from the internal surfaces.

Abstract translation: 调节等离子体源的内表面的方法包括将第一源气体流入等离子体源的等离子体产生腔中，所述等离子体源至少部分地被内表面封闭。 在将功率发射到等离子体产生腔中时，第一源气体点燃以形成第一等离子体，产生第一等离子体产物，其部分粘附到内表面。 该方法还包括使第一等离子体产物从等离子体产生腔流出到处理室，其中工件被第一等离子体产物处理，使第二源气体流入等离子体产生腔。 在将功率发射到等离子体产生腔中时，第二源气体点燃以形成第二等离子体，产生至少部分地从内表面去除第一等离子体产物的部分的第二等离子体产物。

公开(公告)号：US20160086816A1

公开(公告)日：2016-03-24

申请号：US14543683

申请日：2014-11-17

Applicant: Applied Materials, Inc.

Inventor： Xikun Wang ,  Mandar Pandit ,  Zhenjiang Cui ,  Mikhail Korolik ,  Anchuan Wang ,  Nitin K. Ingle ,  Jie Liu

IPC: H01L21/311

CPC classification number: H01L21/31122 ,  H01J37/32357 ,  H01L21/02063 ,  H01L21/311 ,  H01L21/31111 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32139

Abstract: A method of removing titanium nitride hardmask is described. The hardmask resides above a low-k dielectric layer prior to removal and the low-k dielectric layer retains a relatively low net dielectric constant after the removal process. The low-k dielectric layer may be part of a dual damascene structure having copper at the bottom of the vias. A non-porous carbon layer is deposited prior to the titanium nitride hardmask removal to protect the low-k dielectric layer and the copper. The titanium nitride hardmask is removed with a gas-phase etch using plasma effluents formed in a remote plasma from a chlorine-containing precursor. Plasma effluents within the remote plasma are flowed into a substrate processing region where the plasma effluents react with the titanium nitride.

Abstract translation: 描述了一种去除氮化钛硬掩模的方法。 在去除之前，硬掩模位于低k电介质层之上，并且低k电介质层在去除过程之后保持相对较低的净介电常数。 低k电介质层可以是在通孔底部具有铜的双镶嵌结构的一部分。 在氮化钛硬掩模去除之前沉积无孔碳层以保护低k电介质层和铜。 使用在含氯前体的远程等离子体中形成的等离子体流出物，用气相蚀刻去除氮化钛硬掩模。 远程等离子体内的等离子体流出物流入基板处理区域，其中等离子体流出物与氮化钛反应。

公开(公告)号：US09287134B2

公开(公告)日：2016-03-15

申请号：US14157724

申请日：2014-01-17

Applicant: APPLIED MATERIALS, INC.

Inventor： Xikun Wang ,  Lin Xu ,  Anchuan Wang ,  Nitin K. Ingle

IPC: H01L21/302 ,  H01L21/311 ,  H01L21/033 ,  H01J37/32

CPC classification number: H01L21/31122 ,  H01J37/32357 ,  H01L21/0337

Abstract: Methods of selectively etching titanium oxide relative to silicon oxide, silicon nitride and/or other dielectrics are described. The methods include a remote plasma etch using plasma effluents formed from a fluorine-containing precursor and/or a chlorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the titanium oxide. The plasmas effluents react with exposed surfaces and selectively remove titanium oxide while very slowly removing other exposed materials. A direction sputtering pretreatment is performed prior to the remote plasma etch and enables an increased selectivity as well as a directional selectivity. In some embodiments, the titanium oxide etch selectivity results partly from the presence of an ion suppression element positioned between the remote plasma and the substrate processing region.

Abstract translation: 描述了相对于氧化硅，氮化硅和/或其它电介质来选择性地蚀刻氧化钛的方法。 所述方法包括使用由含氟前体和/或含氯前体形成的等离子体流出物的远程等离子体蚀刻。 来自远程等离子体的等离子体流出物流入基板处理区域，其中等离子体流出物与氧化钛反应。 等离子体流出物与暴露的表面反应并选择性地去除氧化钛，同时非常缓慢地除去其它暴露的材料。 在远程等离子体蚀刻之前执行方向溅射预处理，并且能够提高选择性以及方向选择性。 在一些实施方案中，钛氧化物蚀刻选择性部分地来自位于远程等离子体和基板处理区域之间的离子抑制元件的存在。

公开(公告)号：US20160056167A1

公开(公告)日：2016-02-25

申请号：US14463561

申请日：2014-08-19

Applicant: Applied Materials, Inc.

Inventor： Xikun Wang ,  Jie Liu ,  Anchuan Wang ,  Nitin K. Ingle

IPC: H01L27/115 ,  C23F4/00

CPC classification number: H01L27/11582 ,  C23F4/00 ,  H01J37/32357 ,  H01L21/28 ,  H01L21/32136 ,  H01L21/67225 ,  H01L27/11568

Abstract: Methods of selectively etching tungsten from the surface of a patterned substrate are described. The etch electrically separates vertically arranged tungsten slabs from one another as needed, for example, in the manufacture of vertical flash memory devices. The tungsten etch may selectively remove tungsten relative to films such as silicon, polysilicon, silicon oxide, aluminum oxide, titanium nitride and silicon nitride. The methods include exposing electrically-shorted tungsten slabs to remotely-excited fluorine formed in a capacitively-excited chamber plasma region. The methods then include exposing the tungsten slabs to remotely-excited fluorine formed in an inductively-excited remote plasma system. A low electron temperature is maintained in the substrate processing region during each operation to achieve high etch selectivity.

Abstract translation: 描述了从图案化衬底的表面选择性地蚀刻钨的方法。 根据需要，蚀刻将垂直布置的钨板彼此电分离，例如在垂直闪存器件的制造中。 钨蚀刻可以相对于诸如硅，多晶硅，氧化硅，氧化铝，氮化钛和氮化硅的膜选择性地去除钨。 所述方法包括将电短路钨板暴露于在电容激发室等离子体区域中形成的远激发氟。 所述方法包括将钨板暴露于在感应激发的远程等离子体系统中形成的远程激发的氟。 在每个操作期间在基板处理区域中维持低电子温度以实现高蚀刻选择性。

公开(公告)号：US20160042968A1

公开(公告)日：2016-02-11

申请号：US14452328

申请日：2014-08-05

Applicant: Applied Materials, Inc.

Inventor： Vinod R. Purayath ,  Randhir Thakur ,  Nitin K. Ingle

IPC: H01L21/311 ,  H01L21/3065 ,  H01L27/115 ,  H01L21/02

CPC classification number: H01L21/31116 ,  H01L21/02068 ,  H01L21/3065 ,  H01L21/32135 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11582

Abstract: Methods of forming single crystal channel material in a 3-d flash memory cell using only gas-phase etching techniques are described. The methods include gas-phase etching native oxide from a polysilicon layer on a conformal ONO layer. The gas-phase etch also removes native oxide from the exposed single crystal silicon substrate the bottom of a 3-d flash memory hole. The polysilicon layer is removed, also with a gas-phase etch, on the same substrate processing mainframe. Both native oxide removal and polysilicon removal use remotely excited fluorine-containing apparatuses attached to the same mainframe to facilitate performing both operations without an intervening atmospheric exposure. Epitaxial silicon is then grown from the exposed single crystal silicon to create a high mobility replacement channel.

Abstract translation: 描述了仅使用气相蚀刻技术在3-d闪存单元中形成单晶通道材料的方法。 这些方法包括从保形ONO层上的多晶硅层气相蚀刻天然氧化物。 气相蚀刻还从暴露的单晶硅衬底去除3-d闪存孔的底部的天然氧化物。 在相同的基板处理主机上也去除多晶硅层，同时也进行气相蚀刻。 天然氧化物去除和多晶硅去除都使用连接在同一主机上的远程激发的含氟装置，以便于在没有中间大气暴露的情况下进行这两种操作。 然后从暴露的单晶硅生长外延硅，以产生高迁移率替代通道。

公开(公告)号：US20160035586A1

公开(公告)日：2016-02-04

申请号：US14448901

申请日：2014-07-31

Applicant: APPLIED MATERIALS, INC.

Inventor： Vinod R. Purayath ,  Randhir Thakur ,  Shankar Venkataraman ,  Nitin K. Ingle

IPC: H01L21/3213 ,  H01L21/677 ,  H01L29/423 ,  H01L21/28 ,  H01L29/40

CPC classification number: H01L21/32137 ,  H01J37/32357 ,  H01L21/28035 ,  H01L21/28114 ,  H01L21/28273 ,  H01L21/31116 ,  H01L21/67739 ,  H01L21/76224 ,  H01L29/401 ,  H01L29/42324 ,  H01L29/66825

Abstract: Methods of etching back shallow trench isolation (STI) dielectric and trimming the exposed floating gate without breaking vacuum are described. The methods include recessing silicon oxide dielectric gapfill to expose vertical sidewalls of polysilicon floating gates. The exposed vertical sidewalls are then isotropically etched to evenly thin the polysilicon floating gates on the same substrate processing mainframe. Both recessing silicon oxide and isotropically etching polysilicon use remotely excited fluorine-containing apparatuses attached to the same mainframe to facilitate performing both operations without an intervening atmospheric exposure. An inter-poly dielectric may then be conformally deposited either on the same mainframe or outside the mainframe.

Abstract translation: 描述了在不破坏真空的情况下回蚀浅沟槽隔离（STI）电介质和修整暴露的浮动栅极的方法。 这些方法包括凹陷氧化硅电介质间隙填充以暴露多晶硅浮动栅极的垂直侧壁。 然后对暴露的垂直侧壁进行各向同性蚀刻，以在相同的基板处理主机上均匀地稀薄多晶硅浮动栅极。 凹陷硅氧化物和各向同性蚀刻多晶硅都使用连接在同一主机上的远程激发的含氟设备，以便于在没有中间大气暴露的情况下进行两种操作。 然后可将多晶硅电介质保形地沉积在同一主机上或主机外部。

公开(公告)号：US20150357205A1

公开(公告)日：2015-12-10

申请号：US14720183

申请日：2015-05-22

Applicant: Applied Materials, Inc.

Inventor： Xikun Wang ,  Anchuan Wang ,  Nitin K. Ingle ,  Dmitry Lubomirsky

IPC: H01L21/3213 ,  H01L21/02

CPC classification number: H01L21/32136 ,  H01J37/32357 ,  H01J37/3244 ,  H01L21/02068 ,  H01L21/28 ,  H01L21/3065 ,  H01L21/32135 ,  H01L21/4814

Abstract: Methods are described herein for selectively etching titanium nitride relative to dielectric films, which may include, for example, alternative metals and metal oxides lacking in titanium and/or silicon-containing films (e.g. silicon oxide, silicon carbon nitride and low-K dielectric films). The methods include a remote plasma etch formed from a chlorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the titanium nitride. The plasma effluents react with exposed surfaces and selectively remove titanium nitride while very slowly removing the other exposed materials. The substrate processing region may also contain a plasma to facilitate breaking through any titanium oxide layer present on the titanium nitride. The plasma in the substrate processing region may be gently biased relative to the substrate to enhance removal rate of the titanium oxide layer.

Abstract translation: 本文描述了相对于电介质膜选择性地蚀刻氮化钛的方法，其可以包括例如不含钛和/或含硅膜的替代金属和金属氧化物（例如氧化硅，氮化碳和低K电介质膜 ）。 这些方法包括由含氯前体形成的远程等离子体蚀刻。 来自远程等离子体的等离子体流出物流入基板处理区域，其中等离子体流出物与氮化钛反应。 等离子体流出物与暴露的表面反应并选择性地去除氮化钛，同时非常缓慢地除去其它暴露的材料。 衬底处理区域还可以包含等离子体以便于破坏存在于氮化钛上的任何氧化钛层。 衬底处理区域中的等离子体可以相对于衬底轻轻地偏置，以提高氧化钛层的去除速率。