Silicon precursors to make ultra low-K films with high mechanical properties by plasma enhanced chemical vapor deposition
    11.
    发明授权
    Silicon precursors to make ultra low-K films with high mechanical properties by plasma enhanced chemical vapor deposition 有权
    通过等离子体增强化学气相沉积制备具有高机械性能的超低K膜的硅前体

    公开(公告)号:US07989033B2

    公开(公告)日:2011-08-02

    申请号:US12183915

    申请日:2008-07-31

    CPC分类号: C23C16/401 C23C16/56

    摘要: A method for depositing a low dielectric constant film on a substrate is provided. The low dielectric constant film is deposited by a process comprising reacting one or more organosilicon compounds and a porogen and then post-treating the film to create pores in the film. The one or more organosilicon compounds include compounds that have the general structure Si—CX—Si or —Si—O—(CH2)n—O—Si—. Low dielectric constant films provided herein include films that include Si—CX—Si bonds both before and after the post-treatment of the films. The low dielectric constant films have good mechanical and adhesion properties, and a desirable dielectric constant.

    摘要翻译: 提供了一种在基片上沉积低介电常数膜的方法。 低介电常数膜通过包括使一种或多种有机硅化合物和致孔剂反应的方法沉积,然后对膜进行后处理以在膜中产生孔。 一种或多种有机硅化合物包括具有通式结构Si-CX-Si或-Si-O-(CH2)n-O-Si-的化合物。 本文提供的低介电常数膜包括在膜的后处理之前和之后包括Si-CX-Si键的膜。 低介电常数膜具有良好的机械和粘附性能以及期望的介电常数。

    Methods and apparatus of creating airgap in dielectric layers for the reduction of RC delay
    12.
    发明授权
    Methods and apparatus of creating airgap in dielectric layers for the reduction of RC delay 有权
    在电介质层中产生气隙以减少RC延迟的方法和装置

    公开(公告)号:US07879683B2

    公开(公告)日:2011-02-01

    申请号:US11869396

    申请日:2007-10-09

    IPC分类号: H01L21/76

    摘要: A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.

    摘要翻译: 一种用于在互连结构的电介质材料中产生气隙的方法和装置。 一个实施例提供了一种用于形成半导体结构的方法,包括在衬底上沉积第一介电层,在第一介电层中形成沟槽,用导电材料填充沟槽,平坦化导电材料以暴露第一介电层, 在导电材料和暴露的第一电介质层上的阻挡膜,在介电阻挡膜上沉积硬掩模层,在介电阻挡膜和硬掩模层中形成图案,以暴露衬底的选定区域,氧化至少一部分 在衬底的选定区域中的第一介电层,去除第一电介质层的氧化部分以在导电材料周围形成反向沟槽,以及在反向沟槽中形成气隙,同时在反向沟槽中沉积第二电介质材料。

    Ultra low k plasma CVD nanotube/spin-on dielectrics with improved properties for advanced nanoelectronic device fabrication
    16.
    发明授权
    Ultra low k plasma CVD nanotube/spin-on dielectrics with improved properties for advanced nanoelectronic device fabrication 失效
    超低k等离子体CVD纳米管/旋涂电介质具有改进的性能用于先进的纳米电子器件制造

    公开(公告)号:US06984579B2

    公开(公告)日:2006-01-10

    申请号:US10376088

    申请日:2003-02-27

    IPC分类号: H01L21/4763

    摘要: A method for forming a conductive feature in a low k dielectric layer comprising a layer of nanotubes and a low k material between the nanotubes is provided. The low k dielectric layer may be deposited on a seed layer as a blanket layer that is patterned such that a conductive feature may be formed in the low k dielectric layer. Alternatively, the low k dielectric layer may be selectively deposited on a patterned seed layer between a sacrificial layer of a substrate. The sacrificial layer may be removed and replaced with conductive material to form a conductive feature in the low k dielectric layer.

    摘要翻译: 提供了一种在包括纳米管层和纳米管之间的低k材料的低k电介质层中形成导电特征的方法。 低k电介质层可以沉积在种子层上,作为图案化的覆盖层,使得可以在低k电介质层中形成导电特征。 或者,可以在衬底的牺牲层之间的图案化种子层上选择性地沉积低k电介质层。 可以去除牺牲层并用导电材料代替,以在低k电介质层中形成导电特征。

    ULTRA LOW DIELECTRIC MATERIALS USING HYBRID PRECURSORS CONTAINING SILICON WITH ORGANIC FUNCTIONAL GROUPS BY PLASMA-ENHANCED CHEMICAL VAPOR DEPOSITION
    20.
    发明申请
    ULTRA LOW DIELECTRIC MATERIALS USING HYBRID PRECURSORS CONTAINING SILICON WITH ORGANIC FUNCTIONAL GROUPS BY PLASMA-ENHANCED CHEMICAL VAPOR DEPOSITION 审中-公开
    超级低介电材料使用含有有机功能组合物的混合前驱体通过等离子体增强化学气相沉积

    公开(公告)号:US20110206857A1

    公开(公告)日:2011-08-25

    申请号:US13028823

    申请日:2011-02-16

    IPC分类号: C08F2/48 C08F2/46

    摘要: Methods for depositing a low dielectric constant layer on a substrate are provided. In one embodiment, the method includes introducing one or more organosilicon compounds into a chamber, wherein the one or more organosilicon compounds comprise a silicon atom and a porogen component bonded to the silicon atom, reacting the one or more organosilicon compounds in the presence of RF power to deposit a low dielectric constant layer on a substrate in the chamber, and post-treating the low dielectric constant layer to substantially remove the porogen component from the low dielectric constant layer. Optionally, an inert carrier gas, an oxidizing gas, or both may be introduced into the processing chamber with the one or more organosilicon compounds. The post-treatment process may be an ultraviolet radiation cure of the deposited material. The UV cure process may be used concurrently or serially with a thermal or e-beam curing process. The low dielectric constant layers have good mechanical properties and a desirable dielectric constant.

    摘要翻译: 提供了在基片上沉积低介电常数层的方法。 在一个实施方案中,所述方法包括将一种或多种有机硅化合物引入室中,其中所述一种或多种有机硅化合物包含与硅原子键合的硅原子和致孔剂组分,在RF存在下使所述一种或多种有机硅化合物反应 在室中的基板上沉积低介电常数层的功能,并且对低介电常数层进行后处理,以从低介电常数层基本上除去致孔剂成分。 任选地,可以使用一种或多种有机硅化合物将惰性载气,氧化气体或二者引入处理室。 后处理过程可以是沉积材料的紫外线辐射固化。 UV固化工艺可以与热或电子束固化工艺同时使用或连续使用。 低介电常数层具有良好的机械性能和所需的介电常数。