公开(公告)号：US08591289B2

公开(公告)日：2013-11-26

申请号：US13605363

申请日：2012-09-06

Applicant: Michael A. Cobb ,  Mahadevaiyer Krishnan ,  Michael F. Lofaro ,  Dennis G. Manzer

Inventor： Michael A. Cobb ,  Mahadevaiyer Krishnan ,  Michael F. Lofaro ,  Dennis G. Manzer

IPC: B24B1/00

CPC classification number: B24B37/30 ,  B24B27/0069 ,  B24B27/0076 ,  B24B37/105 ,  B24B37/245 ,  B24B37/345 ,  B24B41/047

Abstract: An apparatus for chemical mechanical planarization includes a spindle assembly structure and at least one substrate carrier, which make a linear lateral movement relative to each other while abrasive surfaces of a plurality of cylindrical spindles in the spindle assembly structure contact, and rotate against, at least one substrate mounted on the at least one substrate carrier. The direction of the linear lateral movement is within the plane that tangentially contacts the plurality of cylindrical spindles, and can be orthogonal to the axes of rotation of the plurality of cylindrical spindles.

公开(公告)号：US20120040277A1

公开(公告)日：2012-02-16

申请号：US13278571

申请日：2011-10-21

Applicant: Kevin S. Petrarca ,  Donald F. Canaperi ,  Mahadevaiyer Krishnan ,  Rebecca D. Mih ,  Steven Steen ,  Henry Grabarz ,  Michael S. Hibbs

Inventor： Kevin S. Petrarca ,  Donald F. Canaperi ,  Mahadevaiyer Krishnan ,  Rebecca D. Mih ,  Steven Steen ,  Henry Grabarz ,  Michael S. Hibbs

IPC: G03F1/00 ,  B24B41/06

CPC classification number: G03F1/00 ,  G03F1/26 ,  G03F1/50

Abstract: A reticle carrier for a polishing tool capable of accommodating a reticle includes a base plate with an obverse and reverse surfaces, a retaining ring secured to the obverse surface of the base plate forming a recess defined by the obverse surface of the rigid base plate and internal edges of the retaining ring. A reticle pad supports a reticle in the recess. The base plate and the reticle pad having an array of matching, aligned passageway holes therethrough for exhaustion of air from space between the base plate and a the reticle and for supply of air to that space so a vacuum can retain a the reticle in place on the reticle carrier under vacuum conditions and application of air under pressure can eject a reticle from the reticle carrier.

Abstract translation: 用于能够容纳标线的抛光工具的掩模版载体包括具有正面和反面的基板，固定在基板的正面的保持环，形成由刚性基板的正面限定的凹部和内部 固定环的边缘。 掩模垫在凹槽中支撑掩模版。 基板和标线垫具有一组匹配的对准的通孔，用于从底板和标线板之间的空间排出空气，并将空气供给到该空间，因此真空可以将该掩模版保持在适当的位置上 在真空条件下的掩模版载体和在压力下施加空气可以从掩模版载体喷出掩模版。

公开(公告)号：US20100051474A1

公开(公告)日：2010-03-04

申请号：US12548893

申请日：2009-08-27

Applicant: Panayotis C. Andricacos ,  Caliopi Andricacos ,  Donald F. Canaperi ,  Emanuel I. Cooper ,  John M. Cotte ,  Hariklia Deligianni ,  Laertis Economikos ,  Daniel C. Edelstein ,  Silvia Franz ,  Balasubramanian Pranatharthiharan ,  Mahadevaiyer Krishnan ,  Andrew P. Mansson ,  Erick G. Walton ,  Alan C. West

Inventor： Panayotis C. Andricacos ,  Caliopi Andricacos ,  Donald F. Canaperi ,  Emanuel I. Cooper ,  John M. Cotte ,  Hariklia Deligianni ,  Laertis Economikos ,  Daniel C. Edelstein ,  Silvia Franz ,  Balasubramanian Pranatharthiharan ,  Mahadevaiyer Krishnan ,  Andrew P. Mansson ,  Erick G. Walton ,  Alan C. West

IPC: B23H5/06

CPC classification number: C25F3/02 ,  B23H5/08 ,  C09G1/04 ,  H01L21/32125

Abstract: Methods and compositions for electro-chemical-mechanical polishing (e-CMP) of silicon chip interconnect materials, such as copper, are provided. The methods include the use of compositions according to the invention in combination with pads having various configurations.

Abstract translation: 提供了诸如铜之类的硅芯片互连材料的电化学机械抛光（e-CMP）的方法和组合物。 所述方法包括使用根据本发明的组合物与具有各种构型的垫组合。

公开(公告)号：US20080286660A1

公开(公告)日：2008-11-20

申请号：US11749384

申请日：2007-05-16

Applicant: Kevin S. Petrarca ,  Donald F. Canaperi ,  Mahadevaiyer Krishnan ,  Rebecca D. Mih ,  Steven Steen ,  Henry Grabarz ,  Michael S. Hibbs

Inventor： Kevin S. Petrarca ,  Donald F. Canaperi ,  Mahadevaiyer Krishnan ,  Rebecca D. Mih ,  Steven Steen ,  Henry Grabarz ,  Michael S. Hibbs

IPC: G03F1/00 ,  C09K3/14

CPC classification number: G03F1/00 ,  G03F1/26 ,  G03F1/50

Abstract: A method for manufacturing an optical projection reticle employs a damascene process. First feature recesses are etched into a projection reticle mask plate which is transmissive or transparent. Then feature recesses are tilled with a radiation transmissivity modifying material comprising a partially transmissive material and/or a radiation absorber for absorbing actinic radiation. Sacrificial materials may be added to the recess temporarily prior to filling the recess to provide gaps juxtaposed with the material filling the recess. Thereafter, the sacrificial materials are removed. Then the projection mask is planarized leaving feature recesses filled with transmissivity modifying material, and any gaps desired. The projection mask is planarized while retained in a fixture holding it in place during polishing with a polishing tool and a slurry.

Abstract translation: 光学投影掩模版的制造方法采用镶嵌工艺。 第一特征凹槽被蚀刻到透射或透明的突出掩模掩模板中。 然后，特征凹部用包括用于吸收光化辐射的部分透射材料和/或辐射吸收体的辐射透射率改性材料研磨。 牺牲材料可以在填充凹部之前临时添加到凹部中，以提供与填充凹部的材料并置的间隙。 此后，去除牺牲材料。 然后将投影掩模平坦化，留下填充有透射率改性材料的特征凹部，以及任何期望的间隙。 投影面罩被平坦化，同时保持在用抛光工具和浆料抛光过程中将其固定在位置的夹具中。

公开(公告)号：US20070254479A1

公开(公告)日：2007-11-01

申请号：US11415922

申请日：2006-05-01

Applicant: Sunfei Fang ,  Randolph Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Renee Mo ,  Balasubramanian Pranatharthiharan ,  Jay Strane

Inventor： Sunfei Fang ,  Randolph Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Renee Mo ,  Balasubramanian Pranatharthiharan ,  Jay Strane

IPC: H01L21/44 ,  H01L21/302

CPC classification number: H01L21/28518 ,  C23F1/28 ,  C23F1/30 ,  C23F1/44

Abstract: The present invention relates to a method for forming self-aligned metal silicide contacts over at least two silicon-containing semiconductor regions that are spaced apart from each other by an exposed dielectric region. Preferably, each of the self-aligned metal silicide contacts so formed comprises at least nickel silicide and platinum silicide with a substantially smooth surface, and the exposed dielectric region is essentially free of metal and metal silicide. More preferably, the method comprises the steps of nickel or nickel alloy deposition, low-temperature annealing, nickel etching, high-temperature annealing, and aqua regia etching.

Abstract translation: 本发明涉及一种用于在由暴露的电介质区彼此间隔开的至少两个含硅半导体区域上形成自对准金属硅化物接触的方法。 优选地，如此形成的每个自对准金属硅化物触点至少包括具有基本平滑表面的至少硅化镍和铂硅化物，并且暴露的电介质区域基本上不含金属和金属硅化物。 更优选地，该方法包括镍或镍合金沉积，低温退火，镍蚀刻，高温退火和王水腐蚀的步骤。

公开(公告)号：US20070215842A1

公开(公告)日：2007-09-20

申请号：US11751788

申请日：2007-05-22

Applicant: Darryl Restaino ,  Donald Canaperi ,  Judith Rubino ,  Sean Smith ,  Richard Henry ,  James Fluegel ,  Mahadevaiyer Krishnan

Inventor： Darryl Restaino ,  Donald Canaperi ,  Judith Rubino ,  Sean Smith ,  Richard Henry ,  James Fluegel ,  Mahadevaiyer Krishnan

IPC: H01B1/02

CPC classification number: H01L21/288 ,  C23C18/1241 ,  C23C18/1607 ,  C23C18/1608 ,  C23C18/1844 ,  C23C18/50 ,  H01L21/76849 ,  H01L21/76874 ,  H05K3/244 ,  H05K2203/0716 ,  H05K2203/072

Abstract: An aqueous seeding solution of palladium acetate, acetic acid and chloride.

Abstract translation: 乙酸钯，乙酸和氯化钠的水溶液接种溶液。

公开(公告)号：US07253106B2

公开(公告)日：2007-08-07

申请号：US10905230

申请日：2004-12-22

Applicant: Darryl D. Restaino ,  Donald F. Canaperi ,  Judith M. Rubino ,  Sean P. E. Smith ,  Richard O. Henry ,  James E. Fluegel ,  Mahadevaiyer Krishnan

Inventor： Darryl D. Restaino ,  Donald F. Canaperi ,  Judith M. Rubino ,  Sean P. E. Smith ,  Richard O. Henry ,  James E. Fluegel ,  Mahadevaiyer Krishnan

IPC: H01L21/44

CPC classification number: H01L21/288 ,  C23C18/1241 ,  C23C18/1607 ,  C23C18/1608 ,  C23C18/1844 ,  C23C18/50 ,  H01L21/76849 ,  H01L21/76874 ,  H05K3/244 ,  H05K2203/0716 ,  H05K2203/072

Abstract: A method to electrolessly plate a CoWP alloy on copper in a reproducible manner that is effective for a manufacturable process. In the method, a seed layer of palladium (Pd) is deposited on the copper by an aqueous seeding solution of palladium acetate, acetic acid and chloride. Thereafter, a complexing solution is applied to remove any Pd ions which are adsorbed on surfaces other than the copper. Finally, a plating solution of cobalt (Co), tungsten (W) and phosphorous (P) is applied to the copper so as to deposit a layer of CoWP on the Pd seed and copper.

Abstract translation: 一种以可再生的方式对铜上的CoWP合金进行无电镀的方法，该方法对于可制造的工艺是有效的。 在该方法中，通过乙酸钯，乙酸和氯化物的水性接种溶液将铜（Pd）种子层沉积在铜上。 此后，应用络合溶液以除去吸附在除铜之外的表面上的任何Pd离子。 最后，将铜（Co），钨（W）和磷（P）的电镀溶液施加到铜上，以便在Pd种子和铜上沉积CoWP层。

公开(公告)号：US07190079B2

公开(公告)日：2007-03-13

申请号：US11265302

申请日：2005-11-03

Applicant: Panayotis C. Andricacos ,  Shyng-Tsong Chen ,  John M. Cotte ,  Hariklia Deligianni ,  Mahadevaiyer Krishnan ,  Wei-Tsu Tseng ,  Philippe M. Vereecken

Inventor： Panayotis C. Andricacos ,  Shyng-Tsong Chen ,  John M. Cotte ,  Hariklia Deligianni ,  Mahadevaiyer Krishnan ,  Wei-Tsu Tseng ,  Philippe M. Vereecken

IPC: H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC classification number: H01L21/76846 ,  H01L21/2885 ,  H01L21/6708 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76874 ,  H01L21/76883

Abstract: Patterned copper structures are fabricated by selectively capping the copper employing selective etching and/or selective electroplating in the presence of a liner material. Apparatus for addressing the problem of an increased resistive path as electrolyte during electroetching and/or electroplating flows from the wafer edge inwards is provided.

Abstract translation: 通过在衬垫材料的存在下使用选择性蚀刻和/或选择性电镀选择性地封盖铜来制造图案化的铜结构。 提供了用于解决在电蚀和/或电镀过程中作为电解质增加的电阻路径从晶片边缘向内流动的问题的装置。

公开(公告)号：US20060076685A1

公开(公告)日：2006-04-13

申请号：US11265302

申请日：2005-11-03

Applicant: Panayotis Andricacos ,  Shyng-Tsong Chen ,  John Cotte ,  Hariklia Deligianni ,  Mahadevaiyer Krishnan ,  Wei-Tsu Tseng ,  Philippe Vereecken

Inventor： Panayotis Andricacos ,  Shyng-Tsong Chen ,  John Cotte ,  Hariklia Deligianni ,  Mahadevaiyer Krishnan ,  Wei-Tsu Tseng ,  Philippe Vereecken

IPC: H01L23/48

CPC classification number: H01L21/76846 ,  H01L21/2885 ,  H01L21/6708 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76874 ,  H01L21/76883

Abstract: Patterned copper structures are fabricated by selectively capping the copper employing selective etching and/or selective electroplating in the presence of a liner material. Apparatus for addressing the problem of an increased resistive path as electrolyte during electroetching and/or electroplating flows from the wafer edge inwards is provided.

公开(公告)号：US20050158985A1

公开(公告)日：2005-07-21

申请号：US11058783

申请日：2005-02-16

Applicant: Shyng-Tsong Chen ,  Timothy Dalton ,  Kenneth Davis ,  Chao-Kun Hu ,  Fen Jamin ,  Steffen Kaldor ,  Mahadevaiyer Krishnan ,  Kaushik Kumar ,  Michael Lofaro ,  Sandra Malhotra ,  Chandrasekhar Narayan ,  David Rath ,  Judith Rubino ,  Katherine Saenger ,  Andrew Simon ,  Sean Smith ,  Wei-tsu Tseng

Inventor： Shyng-Tsong Chen ,  Timothy Dalton ,  Kenneth Davis ,  Chao-Kun Hu ,  Fen Jamin ,  Steffen Kaldor ,  Mahadevaiyer Krishnan ,  Kaushik Kumar ,  Michael Lofaro ,  Sandra Malhotra ,  Chandrasekhar Narayan ,  David Rath ,  Judith Rubino ,  Katherine Saenger ,  Andrew Simon ,  Sean Smith ,  Wei-tsu Tseng

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/48

CPC classification number: H01L21/76849 ,  H01L21/76834 ,  H01L21/76847 ,  H01L21/76883 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit structure is disclosed that has a layer of logical and functional devices and an interconnection layer above the layer of logical and functional devices. The interconnection layer has a substrate, conductive features within the substrate and caps positioned only above the conductive features.

Abstract translation: 公开了一种集成电路结构，其具有逻辑和功能器件层以及逻辑和功能器件层之上的互连层。 互连层具有衬底，衬底内的导电特征和仅位于导电特征之上的盖。