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    WAFER DICING METHOD FOR IMPROVING DIE PACKAGING QUALITY
    12.
    发明申请
    WAFER DICING METHOD FOR IMPROVING DIE PACKAGING QUALITY 有权
    用于改进DIE包装质量的WAFER DICING方法

    公开(公告)号：US20150064878A1

    公开(公告)日：2015-03-05

    申请号：US14091014

    申请日：2013-11-26

    Applicant: APPLIED MATERIALS, INC.

    Inventor： Wei-Sheng LEI ,  Brad EATON ,  Aparna IYER ,  Madhava Rao YALAMANCHILI ,  Ajay KUMAR ,  Jungrae PARK

    IPC: H01L21/78 ,  B23K26/36 ,  H01L21/67 ,  H01L21/3065 ,  H01L21/308

    CPC classification number: H01L21/78 ,  B23K26/0624 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  B23K2103/42 ,  B23K2103/50 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/3081 ,  H01L21/67069 ,  H01L21/67207

    Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation while also removing an oxidation layer from metal bumps on the wafer. In one embodiment, a method includes forming a mask over the semiconductor wafer covering the plurality of ICs, the plurality of ICs including metal bumps or pads with an oxidation layer. The method includes patterning the mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the ICs. The method includes plasma etching the semiconductor wafer through the gaps in the patterned mask to singulate the plurality of ICs and remove the oxidation layer from the metal bumps or pads.

    Abstract translation: 在实施例中，涉及初始激光划片和随后等离子体蚀刻的混合晶片或衬底切割工艺被实现用于裸片分离，同时还从晶片上的金属凸块去除氧化层。 在一个实施例中，一种方法包括在覆盖多个IC的半导体晶片上形成掩模，所述多个IC包括具有氧化层的金属凸块或焊盘。 该方法包括用激光划线工艺对掩模进行图案化以提供具有间隙的图案化掩模，暴露半导体晶片在IC之间的区域。 该方法包括通过图案化掩模中的间隙对半导体晶片进行等离子体蚀刻，以分离多个IC并从金属凸块或焊盘移除氧化层。

    LASER ABLATION SYSTEM FOR PACKAGE FABRICATION
    16.
    发明申请
    LASER ABLATION SYSTEM FOR PACKAGE FABRICATION 有权

    公开(公告)号：US20220028709A1

    公开(公告)日：2022-01-27

    申请号：US16938517

    申请日：2020-07-24

    Applicant: Applied Materials, Inc.

    Inventor： Kurtis LESCHKIES ,  Jeffrey L. FRANKLIN ,  Wei-Sheng LEI ,  Steven VERHAVERBEKE ,  Jean DELMAS ,  Han-Wen CHEN ,  Giback PARK

    IPC: H01L21/67 ,  H01L21/48 ,  B23K26/382 ,  B23K26/0622

    Abstract: The present disclosure relates to systems and methods for fabricating semiconductor packages, and more particularly, for forming features in semiconductor packages by laser ablation. In one embodiment, the laser systems and methods described herein can be utilized to pattern a substrate to be utilized as a package frame for a semiconductor package having one or more interconnections formed therethrough and/or one or more semiconductor dies disposed therein. The laser systems described herein can produce tunable laser beams for forming features in a substrate or other package structure. Specifically, frequency, pulse width, pulse shape, and pulse energy of laser beams are tunable based on desired sizes of patterned features and on the material in which the patterned features are formed. The adjustability of the laser beams enables rapid and accurate formation of features in semiconductor substrates and packages with controlled depth and topography.

    HYBRID WAFER DICING APPROACH USING A MULTIPLE PASS LASER SCRIBING PROCESS AND PLASMA ETCH PROCESS
    18.
    发明申请
    HYBRID WAFER DICING APPROACH USING A MULTIPLE PASS LASER SCRIBING PROCESS AND PLASMA ETCH PROCESS 审中-公开

    公开(公告)号：US20190279902A1

    公开(公告)日：2019-09-12

    申请号：US15918673

    申请日：2018-03-12

    Applicant: APPLIED MATERIALS, INC.

    Inventor： Jungrae PARK ,  James S. PAPANU ,  Ajay KUMAR ,  Wei-Sheng LEI

    IPC: H01L21/78 ,  H01L21/263 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/308 ,  B23K26/00 ,  B23K10/00

    Abstract: Methods of dicing semiconductor wafers are described. In an example, a method of dicing a semiconductor wafer having integrated circuits thereon involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a multiple pass laser scribing process to provide a patterned mask with gaps exposing regions of the semiconductor wafer between the integrated circuits, the multiple pass laser scribing process including a first pass along a first edge scribing path, a second pass along a center scribing path, a third pass along a second edge scribing path, a fourth pass along the second edge scribing path, a fifth pass along the center scribing path, and a sixth pass along the first edge scribing path. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

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