公开(公告)号：US20150311324A1

公开(公告)日：2015-10-29

申请号：US14747525

申请日：2015-06-23

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Renata CAMILLO-CASTILLO ,  Peng CHENG ,  Vibhor JAIN ,  Qizhi LIU ,  John J. PEKARIK

IPC: H01L29/732 ,  H01L29/165 ,  H01L29/06 ,  H01L29/161 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/732 ,  H01L29/0649 ,  H01L29/0821 ,  H01L29/0826 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66242 ,  H01L29/66272 ,  H01L29/73 ,  H01L29/7371

Abstract: Fabrication methods, device structures, and design structures for a bipolar junction transistor. An intrinsic base layer is formed on a semiconductor substrate, an etch stop layer is formed on the intrinsic base layer, and an extrinsic base layer is formed on the etch stop layer. A trench is formed that penetrates through the extrinsic base layer to the etch stop layer. The trench is formed by etching the extrinsic base layer selective to the etch stop layer. The first trench is extended through the etch stop layer to the intrinsic base layer by etching the etch stop layer selective to the intrinsic base layer. After the trench is extended through the etch stop layer, an emitter is formed using the trench.

公开(公告)号：US20140231236A1

公开(公告)日：2014-08-21

申请号：US14041983

申请日：2013-09-30

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hanyi DING ,  Qizhi LIU ,  Anthony K. STAMPER

IPC: H01H1/00 ,  G06F17/50

CPC classification number: H01H1/0036 ,  B81B7/0006 ,  B81B2201/016 ,  G06F17/5063 ,  G06F17/5068 ,  H01P1/127

Abstract: A micro-electro-mechanical system (MEMS), methods of forming the MEMS and design structures are provided. The method includes forming a coplanar waveguide (CPW) comprising a signal electrode and a pair of electrodes on a substrate. The method includes forming a first sacrificial material over the CPW, and a wiring layer over the first sacrificial material and above the CPW. The method includes forming a second sacrificial material layer over the wiring layer, and forming insulator material about the first sacrificial material and the second sacrificial material. The method includes forming at least one vent hole in the insulator material to expose portions of the second sacrificial material, and removing the first and second sacrificial material through the vent hole to form a cavity structure about the wiring layer and which exposes the signal line and pair of electrodes below the wiring layer. The vent hole is sealed with sealing material.

Abstract translation: 提供了微机电系统（MEMS），形成MEMS和设计结构的方法。 该方法包括在基板上形成包括信号电极和一对电极的共面波导（CPW）。 该方法包括在CPW上形成第一牺牲材料，以及在第一牺牲材料上方和CPW上方的布线层。 该方法包括在布线层上形成第二牺牲材料层，以及围绕第一牺牲材料和第二牺牲材料形成绝缘体材料。 所述方法包括在所述绝缘体材料中形成至少一个通气孔以暴露所述第二牺牲材料的部分，以及通过所述通气孔去除所述第一和第二牺牲材料以形成围绕所述布线层的空腔结构，并且暴露所述信号线和 一对电极在布线层下方。 通气孔用密封材料密封。

公开(公告)号：US20180337241A1

公开(公告)日：2018-11-22

申请号：US16050230

申请日：2018-07-31

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Vibhor JAIN ,  Qizhi LIU ,  John J. PEKARIK

IPC: H01L29/417 ,  H01L29/66 ,  H01L21/28 ,  H01L29/78 ,  H01L29/812 ,  H01L29/47 ,  H01L29/49 ,  H01L29/51 ,  H01L27/12

Abstract: A tunable breakdown voltage RF MESFET and/or MOSFET and methods of manufacture are disclosed. The method includes forming a first line and a second line on an underlying gate dielectric material. The second line has a width tuned to a breakdown voltage. The method further includes forming sidewall spacers on sidewalls of the first and second line such that the space between first and second line is pinched-off by the dielectric spacers. The method further includes forming source and drain regions adjacent outer edges of the first line and the second line, and removing at least the second line to form an opening between the sidewall spacers of the second line and to expose the underlying gate dielectric material. The method further includes depositing a layer of material on the underlying gate dielectric material within the opening, and forming contacts to a gate structure and the source and drain regions.

公开(公告)号：US20160211167A1

公开(公告)日：2016-07-21

申请号：US15083793

申请日：2016-03-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Mark D. JAFFE ,  Alvin J. JOSEPH ,  Qizhi LIU ,  Anthony K. STAMPER

IPC: H01L21/764 ,  H01L21/265 ,  H01L21/02 ,  H01L21/027 ,  H01L21/306 ,  H01L21/762 ,  H01L21/266

CPC classification number: H01L21/76289 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/0273 ,  H01L21/26533 ,  H01L21/266 ,  H01L21/30604 ,  H01L21/76224 ,  H01L21/76283 ,  H01L21/76286 ,  H01L21/764 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/66651 ,  H01L29/66772 ,  H01L29/78

Abstract: A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a predetermined depth of a substrate. The method further includes forming an airgap in the substrate under the amorphous layer. The method further includes forming a completely isolated transistor in an active region of the substrate, above the amorphous layer and the airgap.

公开(公告)号：US20150056777A1

公开(公告)日：2015-02-26

申请号：US14528435

申请日：2014-10-30

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Mattias E. DAHLSTROM ,  Dinh DANG ,  Qizhi LIU ,  Ramana M. MALLADI

IPC: H01L29/66 ,  H01L23/367 ,  H01L21/762 ,  H01L23/373 ,  H01L21/306 ,  H01L21/308

CPC classification number: H01L29/66242 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/76224 ,  H01L21/763 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/373 ,  H01L29/0821 ,  H01L29/7371 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of making a semiconductor structure includes forming a trench through a shallow trench isolation (STI) structure and into a substrate, and forming a liner including an electrical insulator material on sidewalls of the trench. The method also includes forming a core including a high thermal conductivity material in the trench and on the liner, and forming a cap in the trench and on the core.

Abstract translation: 制造半导体结构的方法包括通过浅沟槽隔离（STI）结构形成沟槽并且形成衬底，以及在沟槽的侧壁上形成包括电绝缘体材料的衬垫。 该方法还包括在沟槽和衬垫上形成包括高导热性材料的芯，并在沟槽和芯上形成帽。

公开(公告)号：US20180069088A1

公开(公告)日：2018-03-08

申请号：US15811810

申请日：2017-11-14

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Vibhor JAIN ,  Qizhi LIU ,  John J. PEKARIK

IPC: H01L29/417 ,  H01L29/66 ,  H01L21/28 ,  H01L29/78 ,  H01L29/812 ,  H01L29/47 ,  H01L29/49 ,  H01L29/51 ,  H01L27/12

CPC classification number: H01L29/41775 ,  H01L21/28052 ,  H01L27/1203 ,  H01L29/47 ,  H01L29/4933 ,  H01L29/518 ,  H01L29/665 ,  H01L29/66659 ,  H01L29/66848 ,  H01L29/66871 ,  H01L29/7835 ,  H01L29/812 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A tunable breakdown voltage RF MESFET and/or MOSFET and methods of manufacture are disclosed. The method includes forming a first line and a second line on an underlying gate dielectric material. The second line has a width tuned to a breakdown voltage. The method further includes forming sidewall spacers on sidewalls of the first and second line such that the space between first and second line is pinched-off by the dielectric spacers. The method further includes forming source and drain regions adjacent outer edges of the first line and the second line, and removing at least the second line to form an opening between the sidewall spacers of the second line and to expose the underlying gate dielectric material. The method further includes depositing a layer of material on the underlying gate dielectric material within the opening, and forming contacts to a gate structure and the source and drain regions.

公开(公告)号：US20160071925A1

公开(公告)日：2016-03-10

申请号：US14480215

申请日：2014-09-08

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Mark D. JAFFE ,  Alvin J. JOSEPH ,  Qizhi LIU ,  Anthony K. STAMPER

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/02 ,  H01L21/764 ,  H01L21/762 ,  H01L21/306 ,  H01L29/78 ,  H01L21/265

CPC classification number: H01L21/76289 ,  H01L21/02233 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/0273 ,  H01L21/26533 ,  H01L21/266 ,  H01L21/30604 ,  H01L21/76224 ,  H01L21/76283 ,  H01L21/76286 ,  H01L21/764 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/66651 ,  H01L29/66772 ,  H01L29/78

Abstract: A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a predetermined depth of a substrate. The method further includes forming an airgap in the substrate under the amorphous layer. The method further includes forming a completely isolated transistor in an active region of the substrate, above the amorphous layer and the airgap.

公开(公告)号：US20160064475A1

公开(公告)日：2016-03-03

申请号：US14476185

申请日：2014-09-03

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Natalie B. FEILCHENFELD ,  Vibhor JAIN ,  Qizhi LIU

IPC: H01L29/06 ,  H01L21/762 ,  H01L27/08 ,  H01L29/66 ,  H01L29/868 ,  H01L29/872

CPC classification number: H01L21/76224 ,  H01L27/0814 ,  H01L29/0619 ,  H01L29/0649 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66136 ,  H01L29/868 ,  H01L29/872

Abstract: Lateral PiN diodes and Schottky diodes with low parasitic capacitance and variable breakdown voltage structures and methods of manufacture are disclosed. The structure includes a diode with breakdown voltage determined by a dimension between p- and n-terminals formed in an i-region above a substrate.

Abstract translation: 公开了具有低寄生电容和可变击穿电压结构和制造方法的横向PiN二极管和肖特基二极管。 该结构包括二极管，其击穿电压由形成在衬底上的i区域中的p型和n型端子之间的尺寸决定。

公开(公告)号：US20150357467A1

公开(公告)日：2015-12-10

申请号：US14300884

申请日：2014-06-10

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Vibhor JAIN ,  Qizhi LIU ,  John J. PEKARIK

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/285 ,  H01L29/49 ,  H01L29/66 ,  H01L29/45

CPC classification number: H01L29/41775 ,  H01L21/28052 ,  H01L27/1203 ,  H01L29/47 ,  H01L29/4933 ,  H01L29/518 ,  H01L29/665 ,  H01L29/66659 ,  H01L29/66848 ,  H01L29/66871 ,  H01L29/7835 ,  H01L29/812 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A tunable breakdown voltage RF MESFET and/or MOSFET and methods of manufacture are disclosed. The method includes forming a first line and a second line on an underlying gate dielectric material. The second line has a width tuned to a breakdown voltage. The method further includes forming sidewall spacers on sidewalls of the first and second line such that the space between first and second line is pinched-off by the dielectric spacers. The method further includes forming source and drain regions adjacent outer edges of the first line and the second line, and removing at least the second line to form an opening between the sidewall spacers of the second line and to expose the underlying gate dielectric material. The method further includes depositing a layer of material on the underlying gate dielectric material within the opening, and forming contacts to a gate structure and the source and drain regions.

Abstract translation: 公开了可调谐击穿电压RF MESFET和/或MOSFET及其制造方法。 该方法包括在下面的栅极电介质材料上形成第一条线和第二条线。 第二行具有调谐到击穿电压的宽度。 该方法还包括在第一和第二线路的侧壁上形成侧壁间隔物，使得第一和第二线路之间的空间被介电隔离物夹紧。 该方法还包括形成邻近第一线和第二线的外边缘的源极和漏极区域，以及移除至少第二线，以在第二线路的侧壁间隔物之间​​形成开口并暴露下面的栅极电介质材料。 该方法还包括在开口内的下面的栅极电介质材料上沉积材料层，以及形成与栅极结构和源极和漏极区域的接触。

公开(公告)号：US20150331183A1

公开(公告)日：2015-11-19

申请号：US14278689

申请日：2014-05-15

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Brennan J. BROWN ,  James R. ELLIOTT ,  Qizhi LIU ,  Steven M. SHANK

IPC: G02B6/125 ,  H01L33/58 ,  H01L31/0232 ,  G02B6/132 ,  G02B6/136

CPC classification number: G02B6/125 ,  G02B6/122 ,  G02B6/132 ,  G02B6/136 ,  G02B2006/12061 ,  H01L31/02327 ,  H01L33/58

Abstract: Si waveguide devices on a bulk Si substrate with supporting anchors and methods of manufacture are disclosed. The method includes forming a waveguide device over an Si substrate, and forming one or more anchors from the Si substrate. The one or more anchors support the waveguide device.

Abstract translation: 公开了具有支撑锚固体和制造方法的体积Si衬底上的Si波导器件。 该方法包括在Si衬底上形成波导器件，并从Si衬底形成一个或多个锚固件。 一个或多个锚固件支撑波导装置。