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公开(公告)号:US11004768B2
公开(公告)日:2021-05-11
申请号:US16529639
申请日:2019-08-01
Applicant: Intel Corporation
Inventor: Muhammad S. Islam , Enisa Harris , Suzana Prstic , Sergio Chan Arguedas , Sachin Deshmukh , Aravindha Antoniswamy , Elah Bozorg-Grayeli
IPC: H01L23/42 , H01L23/367 , H01L23/10 , H05K7/20 , H01L23/00 , H01L25/065 , H01L23/40
Abstract: A multi-chip package includes multiple IC die interconnected to a package substrate. An integrated heat spreader (IHS) is located over one or more primary IC die, but is absent from over one or more secondary IC die. Thermal cross-talk between IC dies and/or thermal performance of individual IC dies may be improved by constraining the dimensions of the IHS to be over less than all IC die of the package. A first thermal interface material (TIM) may be between the IHS and the primary IC die, but absent from over the secondary IC die. A second TIM may be between a heat sink and the IHS and also between the heat sink and the secondary IC die. The heat sink may be segmented, or have a non-planarity to accommodate differences in z-height across the IC die and/or as a result of constraining the dimensions of the IHS to be over less than all IC die.
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公开(公告)号:US20210013115A1
公开(公告)日:2021-01-14
申请号:US16504734
申请日:2019-07-08
Applicant: Intel Corporation
Inventor: Taylor William Gaines , Ken Hackenberg , Frederick W. Atadana , Elah Bozorg-Grayeli
IPC: H01L23/10 , H01L23/367 , H01L23/373 , H01L21/50
Abstract: Embodiments may relate to a microelectronic package comprising an integrated heat spreader (IHS) coupled with a package substrate. A sealant may be positioned between, and physically coupled to, the IHS and the package substrate. The sealant may at least partially extend from a footprint of the IHS. Other embodiments may be described or claimed.
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公开(公告)号:US20240222288A1
公开(公告)日:2024-07-04
申请号:US18090140
申请日:2022-12-28
Applicant: Intel Corporation
Inventor: David Shia , Timothy Gosselin , Aravindha Antoniswamy , Sergio Antonio Chan Arguedas , Elah Bozorg-Grayeli , Johnny Cook, JR. , Steven Klein , Rick Canham
IPC: H01L23/544 , H01L23/00 , H01L23/427 , H01L23/49
CPC classification number: H01L23/544 , H01L23/427 , H01L23/49 , H01L24/08 , H01L24/48 , H01L2224/08113 , H01L2224/48229 , H01L2924/15165 , H01L2924/1711 , H01L2924/173 , H01L2924/17724 , H01L2924/1776
Abstract: Integrated circuit (IC) device substrates and structures for mating and aligning with sockets. An IC device may include a frame on and around a substrate, which may include glass or silicon. The frame may include an alignment feature, such as a notch or hole, to mate with a complementary keying feature of a socket. A heat spreader may be coupled to an IC die and extend beyond the substrate or be coupled to the frame. The heat spreader may include a heat pipe. The IC device may be part of an IC system with the device substrate coupled to a system substrate by a socket configured to mate to the frame.
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14.
公开(公告)号:US11881440B2
公开(公告)日:2024-01-23
申请号:US16798118
申请日:2020-02-21
Applicant: INTEL CORPORATION
IPC: H01L23/373 , H01L21/48 , H01L23/367 , H01L23/42 , C08K3/04 , C09K5/14
CPC classification number: H01L23/3737 , C08K3/041 , C08K3/042 , C09K5/14 , H01L21/4871 , H01L23/367 , H01L23/42 , C08K2201/001 , C08K2201/011
Abstract: Microelectronic devices, assemblies, and systems include a microelectronic die and composite material to conduct heat from the microelectronic die such that the composite material includes polymer chains chemically bonded to fill particles having a hexagonal lattice of carbon atoms such as graphene sheet fill particles and/or carbon nanotube fill particles.
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15.
公开(公告)号:US11881438B2
公开(公告)日:2024-01-23
申请号:US16746732
申请日:2020-01-17
Applicant: Intel Corporation
Inventor: Elah Bozorg-Grayeli , Kyle Arrington , Sergio Chan Arguedas , Aravindha Antoniswamy
IPC: H01L23/373 , H01L23/367 , H01L23/16 , H01L23/00 , H01L21/48
CPC classification number: H01L23/3733 , H01L21/4853 , H01L21/4871 , H01L23/16 , H01L23/367 , H01L23/562 , H01L24/16 , H01L2224/16225 , H01L2924/3511
Abstract: A second-level thermal interface material (TIM2) that is to couple to a system-level thermal solution is applied to an integrated circuit (IC) assembly comprising an IC die and an assembly substrate prior to the assembly substrate being joined to a host component at the system-level. Challenges associated with TIM2 application may therefore be addressed at a first level of IC die integration, simplifying subsequent assembly and better controlling thermal coupling to a subsequently applied thermal solution. Where a first-level IC assembly includes a stiffener, the TIM may be affixed to the stiffener through an adhesive bond or a fusion bond. After the IC assembly including the TIM is soldered to the host board, a thermal solution may be placed in contact with the TIM. With early application of a solder TIM, a solder TIM may be reflowed upon the IC die multiple times.
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公开(公告)号:US20210305121A1
公开(公告)日:2021-09-30
申请号:US16831068
申请日:2020-03-26
Applicant: Intel Corporation
Inventor: Debendra Mallik , Je-Young Chang , Ram Viswanath , Elah Bozorg-Grayeli , Ahmad Al Mohammad
IPC: H01L23/367 , H01L23/538 , H01L23/00 , H01L23/373 , H01L23/18 , H01L21/48
Abstract: Thermal heat spreaders and/or an IC die with solderable thermal structures may be assembled together with a solder array thermal interconnects. A thermal heat spreader may include a non-metallic material and one or more metallized surfaces suitable for bonding to a solder alloy employed as thermal interface material between the heat spreader and an IC die. An IC die may include a metallized back-side surface similarly suitable for bonding to a thermal interconnect comprising a solder alloy. Metallization on the IC die and/or heat spreader may comprise a plurality of solderable structures. A multi-chip package may include multiple IC die having different die thickness that are accommodated by a z-height thickness variation in the thermal interconnects and/or the solderable structures of the IC die or heat spreader.
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公开(公告)号:US20210134698A1
公开(公告)日:2021-05-06
申请号:US16672858
申请日:2019-11-04
Applicant: Intel Corporation
Inventor: Kyle J. Arrington , Aaron McCann , Kelly Lofgreen , Elah Bozorg-Grayeli , Aravindha Antoniswamy , Joseph B. Petrini
IPC: H01L23/373 , H01L23/00 , H01L25/00
Abstract: A thermal interface structure may be formed comprising a thermally conductive substrate having a first surface and an opposing second surface, a first liquid metal layer on the first surface of the thermally conductive substrate, and a second liquid metal layer on the second surface of the thermally conductive substrate. The thermal interface structure may be used in an integrated circuit assembly or package between at least one integrated circuit device and a heat dissipation device.
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公开(公告)号:US20210013123A1
公开(公告)日:2021-01-14
申请号:US16505052
申请日:2019-07-08
Applicant: Intel Corporation
Inventor: Taylor William Gaines , Ken Hackenberg , Elah Bozorg-Grayeli
IPC: H01L23/40 , H01L23/367 , H01L21/48 , F28F3/10
Abstract: Embodiments may relate to a microelectronic package that includes an integrated heat spreader (IHS) coupled with a package substrate. The microelectronic package may further include a sealant material between the package substrate and the IHS. The sealant material may be formed of a material that cures when exposed to ultraviolet (UV) wavelengths. Other embodiments may be described or claimed.
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公开(公告)号:US20170170088A1
公开(公告)日:2017-06-15
申请号:US15037851
申请日:2015-06-17
Applicant: Intel Corporation
Inventor: Venmathy McMahan , Sivakumar Nagarajan , Elah Bozorg-Grayeli , Amrita Mallik , Kuang-Han Chu , Liwei Wang , Nisha Ananthakrishnan , Craig J. Weinman , Amram Eitan
Abstract: Some embodiments relate to an electronic package. The electronic package includes a first die and a second die stacked onto the first die. A first encapsulant is positioned between the first die and the second die. The first encapsulant includes a first material that covers a first volume between the first die and the second die. A second encapsulant is positioned between the first die and the second die. The second encapsulant includes a second material that covers a second volume between the first die and the second die. The first material has a higher thermal conductivity than the second material, and the second material more effectively promotes electrical connections between the first die and the second die as compared to the first material.
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公开(公告)号:US11984377B2
公开(公告)日:2024-05-14
申请号:US16831068
申请日:2020-03-26
Applicant: Intel Corporation
Inventor: Debendra Mallik , Je-Young Chang , Ram Viswanath , Elah Bozorg-Grayeli , Ahmad Al Mohammad
IPC: H01L23/367 , H01L21/48 , H01L23/00 , H01L23/18 , H01L23/373 , H01L23/538
CPC classification number: H01L23/3675 , H01L21/4875 , H01L23/18 , H01L23/3735 , H01L23/5383 , H01L23/5386 , H01L24/16 , H01L24/17 , H01L24/32 , H01L24/33 , H01L24/73 , H01L2224/16227 , H01L2224/16245 , H01L2224/17181 , H01L2224/17519 , H01L2224/32225 , H01L2224/32245 , H01L2224/33181 , H01L2224/73204 , H01L2224/73253 , H01L2924/1432 , H01L2924/1434
Abstract: Thermal heat spreaders and/or an IC die with solderable thermal structures may be assembled together with a solder array thermal interconnects. A thermal heat spreader may include a non-metallic material and one or more metallized surfaces suitable for bonding to a solder alloy employed as thermal interface material between the heat spreader and an IC die. An IC die may include a metallized back-side surface similarly suitable for bonding to a thermal interconnect comprising a solder alloy. Metallization on the IC die and/or heat spreader may comprise a plurality of solderable structures. A multi-chip package may include multiple IC die having different die thickness that are accommodated by a z-height thickness variation in the thermal interconnects and/or the solderable structures of the IC die or heat spreader.
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