公开(公告)号：US20100295179A1

公开(公告)日：2010-11-25

申请号：US12846120

申请日：2010-07-29

申请人： Yuji Watanabe ,  Hisashi Tanie ,  Koji Hosokawa ,  Mitsuaki Katagiri ,  Ichiro Anjo

发明人： Yuji Watanabe ,  Hisashi Tanie ,  Koji Hosokawa ,  Mitsuaki Katagiri ,  Ichiro Anjo

IPC分类号： H01L23/498

CPC分类号： H01L23/49816 ,  H01L23/3128 ,  H01L24/81 ,  H01L2224/81801 ,  H01L2924/15311 ,  H05K3/303 ,  H05K3/3436 ,  H05K2201/09781 ,  H05K2201/2036 ,  Y02P70/613

摘要： A BGA semiconductor device includes a semiconductor package and a mounting board mounting thereon the semiconductor package, wherein an array of signal electrodes of the semiconductor package and an array of signal electrodes of the mounting board are coupled together via signal bumps. The BGA semiconductor device also includes a dummy bump, which reinforces the bending strength of the BGA semiconductor device and is broken by a shearing force caused by thermal expansion to alleviate the stress for the signal bumps.

摘要翻译： BGA半导体器件包括半导体封装和安装在其上的半导体封装的安装板，其中半导体封装的信号电极阵列和安装板的信号电极阵列通过信号凸块耦合在一起。 BGA半导体器件还包括虚拟凸块，其加强了BGA半导体器件的弯曲强度，并被由热膨胀引起的剪切力破坏以减轻信号凸块的应力。

公开(公告)号：US07119428B2

公开(公告)日：2006-10-10

申请号：US11025634

申请日：2004-12-28

申请人： Hisashi Tanie ,  Nae Hisano ,  Hiroyuki Ohta ,  Hiroaki Ikeda ,  Ichiro Anjo ,  Mitsuaki Katagiri ,  Yuji Watanabe

发明人： Hisashi Tanie ,  Nae Hisano ,  Hiroyuki Ohta ,  Hiroaki Ikeda ,  Ichiro Anjo ,  Mitsuaki Katagiri ,  Yuji Watanabe

IPC分类号： H01L23/22 ,  H01L23/053 ,  H01L21/44

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L24/48 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device capable of reducing a temperature increase during operation thereof is provided. In the semiconductor device, an interface chip is stacked on a plurality of stacked semiconductor elements. Both an “Si” interposer and a resin interposer are arranged under the plural semiconductor elements. The Si interposer is arranged between the resin interposer and the plural semiconductor elements. The Si interposer owns a thickness which is thicker than a thickness of a semiconductor element, and also has a linear expansion coefficient which is smaller than a linear expansion coefficient of the resin interposer, and further, is larger than, or equal to linear expansion coefficients of the plural semiconductor elements.

摘要翻译： 提供一种能够在其操作期间降低温度升高的半导体器件。 在半导体装置中，在多个层叠的半导体元件上层叠有接口芯片。 “Si”插入件和树脂插入器都布置在多个半导体元件下方。 Si插入件布置在树脂插入件和多个半导体元件之间。 Si插入件具有比半导体元件的厚度厚的厚度，并且还具有比树脂插入体的线膨胀系数小的线膨胀系数，并且还大于或等于线膨胀系数 的多个半导体元件。

公开(公告)号：US08222737B2

公开(公告)日：2012-07-17

申请号：US12846120

申请日：2010-07-29

申请人： Yuji Watanabe ,  Hisashi Tanie ,  Koji Hosokawa ,  Mitsuaki Katagiri ,  Ichiro Anjo

发明人： Yuji Watanabe ,  Hisashi Tanie ,  Koji Hosokawa ,  Mitsuaki Katagiri ,  Ichiro Anjo

IPC分类号： H01L23/48

CPC分类号： H01L23/49816 ,  H01L23/3128 ,  H01L24/81 ,  H01L2224/81801 ,  H01L2924/15311 ,  H05K3/303 ,  H05K3/3436 ,  H05K2201/09781 ,  H05K2201/2036 ,  Y02P70/613

摘要： A BGA semiconductor device includes a semiconductor package and a mounting board mounting thereon the semiconductor package, wherein an array of signal electrodes of the semiconductor package and an array of signal electrodes of the mounting board are coupled together via signal bumps. The BGA semiconductor device also includes a dummy bump, which reinforces the bending strength of the BGA semiconductor device and is broken by a shearing force caused by thermal expansion to alleviate the stress for the signal bumps.

公开(公告)号：US07960846B2

公开(公告)日：2011-06-14

申请号：US12363166

申请日：2009-01-30

申请人： Mitsuaki Katagiri ,  Hisashi Tanie

发明人： Mitsuaki Katagiri ,  Hisashi Tanie

IPC分类号： H01L23/48

CPC分类号： H01L24/50 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L2224/50 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/3011

摘要： A semiconductor chip is mounted on a flexible wiring board through the interposition of an elastomer. The flexible wiring board is made up of a tape on which wiring is fixed. A part of the wiring is projected beyond the edge of the tape, extended in the direction of the thickness of the elastomer and connected to an electrode of the semiconductor chip. The edge of the tape beyond which the wiring is projected protrudes beyond the edge of the elastomer by a length no smaller than the thickness of the elastomer.

摘要翻译： 通过插入弹性体将半导体芯片安装在柔性布线板上。 柔性布线板由布线固定的胶带组成。 布线的一部分突出超过带的边缘，在弹性体的厚度方向上延伸并连接到半导体芯片的电极。 布线超过其的突出部分的边缘突出超过弹性体边缘的长度不小于弹性体的厚度。

公开(公告)号：US20060249829A1

公开(公告)日：2006-11-09

申请号：US11399608

申请日：2006-04-07

申请人： Mitsuaki Katagiri ,  Masanori Shibamoto ,  Tsutomu Hara ,  Koichiro Aoki ,  Naoya Kanda ,  Shuji Kikuchi ,  Hisashi Tanie

发明人： Mitsuaki Katagiri ,  Masanori Shibamoto ,  Tsutomu Hara ,  Koichiro Aoki ,  Naoya Kanda ,  Shuji Kikuchi ,  Hisashi Tanie

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L24/50 ,  H01L2225/06527 ,  H01L2225/06551 ,  H01L2225/06579 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/3011

摘要： A stacked type semiconductor device comprising: a baseboard having a terminal row formed at an end in which connecting terminals is arranged linearly and having a wiring pattern connected to the connecting terminals and external terminals; semiconductor chips having a pad row in which pads is arranged linearly in parallel to the terminal row and being stacked on the baseboard; and interposer boards having a wiring layer including a plurality of wires arranged in parallel with the same length for connecting between pads of the pad row and connecting terminals of the terminal row.

摘要翻译： 一种叠层型半导体器件，包括：基板，其端部形成在端部，所述端子排连接端子线性布置，并且具有连接到所述连接端子和外部端子的布线图案; 具有垫排的半导体芯片，其中焊盘与端子排平行布置并且堆叠在基板上; 以及具有布线层的插入板，所述布线层包括以相同长度平行布置的多条布线，用于连接所述焊盘排的焊盘和所述端子排的连接端子。

公开(公告)号：US20050236697A1

公开(公告)日：2005-10-27

申请号：US11063877

申请日：2005-02-24

申请人： Mitsuaki Katagiri ,  Hisashi Tanie

发明人： Mitsuaki Katagiri ,  Hisashi Tanie

IPC分类号： H01L23/12 ,  H01L23/31 ,  H01L23/495 ,  H01L23/498

CPC分类号： H01L24/50 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L2224/50 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/3011

摘要： A semiconductor chip is mounted on a flexible wiring board through the interposition of an elastmer. The flexible wiring board is made up of a tape on which wiring is fixed. A part of the wiring is projected beyond the edge of the tape, extended in the direction of the thickness of the elastmer and connected to an electrode of the semiconductor chip. The edge of the tape beyond which the wiring is projected protrudes beyond the edge of the elastmer by a length no smaller than the thickness of the elastmer.

摘要翻译： 通过插入弹性体将半导体芯片安装在柔性布线板上。 柔性布线板由布线固定的胶带组成。 布线的一部分突出超过带的边缘，沿着弹性体的厚度方向延伸并连接到半导体芯片的电极。 布线超过其的投影边缘突出超过弹性体边缘的长度不小于弹性体的厚度。

公开(公告)号：US20060216848A1

公开(公告)日：2006-09-28

申请号：US11349913

申请日：2006-02-09

申请人： Hisashi Tanie ,  Takashi Sumigawa ,  Hiroyuki Ohta

发明人： Hisashi Tanie ,  Takashi Sumigawa ,  Hiroyuki Ohta

IPC分类号： H01L21/00

CPC分类号： G01B7/18 ,  G01L1/2293

摘要： A semiconductor mechanical quantity measuring apparatus in which the reverse surface of a strain-detecting semiconductor element is bonded to an object of measurement, and a member having a small elastic modulus is interposed between the wiring board for supporting the strain-detecting semiconductor element and the strain-detecting semiconductor element. It then becomes possible to reduce an undesirable effect that the rigidity and thermal deformation of the wiring board have on the strain-detecting semiconductor element, while supporting the strain-detecting semiconductor element.

公开(公告)号：US08053908B2

公开(公告)日：2011-11-08

申请号：US12694298

申请日：2010-01-27

申请人： Hisashi Tanie ,  Nobuhiko Chiwata ,  Motoki Wakano ,  Takeyuki Itabashi

发明人： Hisashi Tanie ,  Nobuhiko Chiwata ,  Motoki Wakano ,  Takeyuki Itabashi

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/49816 ,  H01L21/563 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/03828 ,  H01L2224/0401 ,  H01L2224/11334 ,  H01L2224/13023 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2224/13099 ,  H01L2924/00

摘要： A novel structure capable of reducing the stress in the insulating layer in the semiconductor element and thereby securing reliability is provided. When the semiconductor element and the substrate are connected with a solder, the stress generated in the insulating layer is reduced by placing a spherical core made of a material having a greater rigidity inside the solder and satisfying the following inequalities: 1 GPa

摘要翻译： 提供了能够减小半导体元件中的绝缘层中的应力并由此确保可靠性的新型结构。 当半导体元件和衬底与焊料连接时，通过将由焊料中具有较大刚性的材料制成的球形芯放置在绝缘层中产生的应力减小，并满足以下不等式：1 GPa <（杨氏模量 的密封树脂）<30GPa，20ppm / k（包封树脂的线膨胀系数）<200ppm / k，10MPa <（室温下焊料的屈服应力）<30MPa。 在连接时，要放置在半导体元件表面上的焊盘与芯之间的焊料的厚度被调节为端子间距的1/10以下。

公开(公告)号：US20090134498A1

公开(公告)日：2009-05-28

申请号：US12273590

申请日：2008-11-19

申请人： Hiroaki IKEDA ,  Masakazu Ishino ,  Hideharu Miyake ,  Shiro Uchiyama ,  Yasuhiro Naka ,  Nae Hisano ,  Hisashi Tanie ,  Kunihiko Nishi ,  Hiroyuki Tenmei

发明人： Hiroaki IKEDA ,  Masakazu Ishino ,  Hideharu Miyake ,  Shiro Uchiyama ,  Yasuhiro Naka ,  Nae Hisano ,  Hisashi Tanie ,  Kunihiko Nishi ,  Hiroyuki Tenmei

IPC分类号： H01L23/538 ,  H01L23/52 ,  H01L23/58

CPC分类号： H01L23/3128 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/02 ,  H01L24/11 ,  H01L24/12 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/2518 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： The present invention includes a semiconductor element provided with an electrode passing through front and back sides. The electrode is formed as a cylinder including a hollow portion, and stress relaxing material is provided in the hollow portion, which is used to reduce stress that is induced between the semiconductor element and the electrode. The stress relaxing material is an elastic body made of resin material.

摘要翻译： 本发明包括具有通过正面和背面的电极的半导体元件。 电极形成为包括中空部分的圆柱体，并且应力松弛材料设置在中空部分中，其用于减小在半导体元件和电极之间感应的应力。 应力松弛材料是由树脂材料制成的弹性体。

公开(公告)号：US20130067424A1

公开(公告)日：2013-03-14

申请号：US13593499

申请日：2012-08-23

申请人： Kenichi YAMAMOTO ,  Ryosuke Kimoto ,  Kenya Kawano ,  Hisashi Tanie ,  Yasuhiro Naka

发明人： Kenichi YAMAMOTO ,  Ryosuke Kimoto ,  Kenya Kawano ,  Hisashi Tanie ,  Yasuhiro Naka

IPC分类号： G06F19/00 ,  G06F17/50

CPC分类号： G06F17/5018 ,  G06F2217/40 ,  G06F2217/76 ,  G06F2217/80

摘要： A life prediction method of an electronic device in which the life prediction accuracy is more improved than that in a related art technique, and a design method of an electronic device based on the above method, are established. Life prediction is performed by incorporating either of a change in a physical property of a solder joint portion and a change in the fatigue life of a solder, the changes occurring when left at a high temperature. The change in a physical property of the solder joint portion or the change in the fatigue life of the solder is determined from the relationship between a heat treatment temperature and a heat treatment time. These changes are then formulated to be incorporated into the life prediction.

摘要翻译： 建立了寿命预测精度比现有技术更好的电子设备的寿命预测方法，并且建立了基于上述方法的电子设备的设计方法。 寿命预测通过掺入焊接部分的物理性质的改变和焊料的疲劳寿命的变化来执行，当在高温下放置时发生的变化。 根据热处理温度和热处理时间的关系，确定焊点的物性的变化或焊料的疲劳寿命的变化。 然后将这些变化制定为纳入人生预测。