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公开(公告)号：US20170025570A1
公开(公告)日：2017-01-26
申请号：US15287140
申请日：2016-10-06
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Matthias Peter , Tobias Meyer , Alexander Walter , Tetsuya Taki , Juergen Off , Rainer Butendeich , Joachim Hertkorn
CPC classification number: H01L33/06 , H01L33/0079 , H01L33/04 , H01L33/14 , H01L33/22 , H01L33/24 , H01L33/32 , H01L33/382 , H01L2224/16225 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor chip includes a semiconductor body with a semiconductor layer sequence. An active region intended for generating radiation is arranged between an n-conductive multilayer structure and a p-conductive semiconductor layer. A doping profile is formed in the n-conductive multilayer structure which includes at least one doping peak.
Abstract translation: 半导体芯片包括具有半导体层序列的半导体本体。 用于产生辐射的有源区域设置在n导电多层结构和p导电半导体层之间。 掺杂分布形成在包括至少一个掺杂峰的n导电多层结构中。
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公开(公告)号：US12199134B2
公开(公告)日：2025-01-14
申请号：US17515338
申请日：2021-10-29
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Martin Behringer , Andreas Biebersdorf , Ruth Boss , Erwin Lang , Tobias Meyer , Alexander Pfeuffer , Marc Philippens , Julia Stolz , Tansen Varghese , Sebastian Wittmann , Siegfried Herrmann , Berthold Hahn , Bruno Jentzsch , Korbinian Perzlmaier , Peter Stauss , Petrus Sundgren , Jens Mueller , Kerstin Neveling , Frank Singer , Christian Mueller
Abstract: The invention relates to various aspects of a μ-LED or a μ-LED array for augmented reality or lighting applications, in particular in the automotive field. The μ-LED is characterized by particularly small dimensions in the range of a few μm.
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公开(公告)号：US11710650B2
公开(公告)日：2023-07-25
申请号：US17440841
申请日：2020-02-25
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Tobias Meyer , Korbinian Perzlmaier
CPC classification number: H01L21/67271 , H01L31/186 , H01L33/0095
Abstract: A method for sorting optoelectronic semiconductor components is specified. The semiconductor components each include an active region for emission or detection of electromagnetic radiation. The method includes the following steps: introducing the semiconductor components into a sorting region on a specified path; irradiating the optoelectronic semiconductor components with electromagnetic radiation of a first wavelength range to generate dipole moments by charge separation in the active regions of the optoelectronic semiconductor components; and deflecting the optoelectronic semiconductor components from the specified path as a function of their dipole moment by means of a non-homogeneous electromagnetic field. A device for sorting optoelectronic semiconductor components is further specified.
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公开(公告)号：US20220406757A1
公开(公告)日：2022-12-22
申请号：US17638710
申请日：2020-08-12
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Alexander F. Pfeuffer , Tobias Meyer , Korbinian Perzlmaier , Thomas Schwarz , Sebastian Hoibl
IPC: H01L25/075 , H01L33/00 , H01L33/62
Abstract: In an embodiment a method for producing radiation-emitting semiconductor chips includes providing a semiconductor wafer, applying first contact layers on the semiconductor wafer, applying a second dielectric layer on the semiconductor wafer and the first contact layers, attaching a carrier arrangement to the semiconductor wafer, singulating the semiconductor wafer into semiconductor bodies and applying second contact layers on the semiconductor bodies, wherein the second dielectric layer is formed such that it mechanically stabilizes itself.
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公开(公告)号：US20190259911A1
公开(公告)日：2019-08-22
申请号：US16315463
申请日：2017-07-11
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Roland Zeisel , Michael Binder , Jens Ebbecke , Tobias Meyer
Abstract: An optoelectronic semiconductor chip is disclosed. In an embodiment an optoelectronic semiconductor chip includes a semiconductor body comprising a first semiconductor structure, a second semiconductor structure and an active region between the first and the second semiconductor structure and a plurality of recesses, each penetrating at least one of the semiconductor structures and the active region, wherein a cover surface of the active region is a continuous surface, and wherein at least in some of the recesses, surfaces of the recesses are completely covered with an electrically insulating material.
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Patent Agency Ranking
公开(公告)号：US20170324001A1
公开(公告)日：2017-11-09
申请号：US15656169
申请日：2017-07-21
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Matthias Peter , Tobias Meyer , Alexander Walter , Tetsuya Taki , Juergen Off , Rainer Butendeich , Joachim Hertkorn
CPC classification number: H01L33/06 , H01L33/0079 , H01L33/04 , H01L33/14 , H01L33/22 , H01L33/24 , H01L33/32 , H01L33/382 , H01L2224/16225 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor chip includes a semiconductor body with a semiconductor layer sequence. An active region intended for generating radiation is arranged between an n-conductive multilayer structure and a p-conductive semiconductor layer. A doping profile is formed in the n-conductive multilayer structure which includes at least one doping peak.
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公开(公告)号：US09761758B2
公开(公告)日：2017-09-12
申请号：US14784135
申请日：2014-04-17
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Tobias Meyer , Matthias Peter , Jürgen Off , Alexander Walter , Tobias Gotschke , Christian Leirer
CPC classification number: H01L33/325 , H01L33/0025 , H01L33/025 , H01L33/12 , H01L33/22
Abstract: An optoelectronic semiconductor component includes a layer sequence including a p-doped layer, an n-doped layer and an active zone that generates electromagnetic radiation arranged between the n-doped layer and the p-doped layer, wherein the n-doped layer includes at least GaN, an interlayer is arranged in the n-doped layer, wherein the interlayer includes AlxGa1-xN, wherein 0
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公开(公告)号：US20160079476A1
公开(公告)日：2016-03-17
申请号：US14784135
申请日：2014-04-17
Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
Inventor： Tobias Meyer , Matthias Peter , Jürgen Off , Alexander Walter , Tobias Gotschke , Christian Leirer
CPC classification number: H01L33/325 , H01L33/0025 , H01L33/025 , H01L33/12 , H01L33/22
Abstract: An optoelectronic semiconductor component includes a layer sequence including a p-doped layer, an n-doped layer and an active zone that generates electromagnetic radiation arranged between the n-doped layer and the p-doped layer, wherein the n-doped layer includes at least GaN, an interlayer is arranged in the n-doped layer, wherein the interlayer includes AlxGa1-xN, wherein 0
Abstract translation: 光电子半导体部件包括层序列，其包括p掺杂层，n掺杂层和产生布置在n掺杂层和p掺杂层之间的电磁辐射的有源区，其中n掺杂层包括在 在n掺杂层中布置了最小的GaN，中间层，其中中间层包括Al x Ga 1-x N，其中0
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19.发明申请公开(公告)号：US20150270434A1
公开(公告)日：2015-09-24
申请号：US14430538
申请日：2013-09-18
Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
Inventor： Joachim Hertkorn , Jan-Philipp Ahl , Lorenzo Zini , Matthias Peter , Tobias Meyer , Alexander Frey
CPC classification number: H01L33/0075 , H01L21/02458 , H01L21/0254 , H01L21/02639 , H01L21/02647 , H01L33/007 , H01L33/0079 , H01L33/025 , H01L33/14 , H01L33/22 , H01L33/32
Abstract: A method is provided for producing an optoelectronic device, comprising the steps of providing a substrate, applying a nucleation layer on a surface of the substrate, applying and patterning a mask layer on the nucleation layer, growing a nitride semiconductor in a first growth step, wherein webs are laid which form a lateral lattice, wherein the webs have trapezoidal cross-sectional areas in places in the direction of growth, and laterally overgrowing the webs with a nitride semiconductor in a second growth step, to close spaces between the webs.
Abstract translation: 提供了一种用于制造光电子器件的方法，包括以下步骤：提供衬底，在所述衬底的表面上施加成核层，在所述成核层上施加和图案化掩模层，在第一生长步骤中生长氮化物半导体， 其中布置形成横向晶格的网，其中所述网在生长方向上的位置具有梯形横截面面积，并且在第二生长步骤中用氮化物半导体横向过度生长所述网以封闭所述网之间的空间。
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公开(公告)号：US20220238773A1
公开(公告)日：2022-07-28
申请号：US17609256
申请日：2020-05-06
Applicant: OSRAM Opto Semiconductors GmbH
Inventor： Alexander F. Pfeuffer , Tobias Berthold , Lutz Höppel , Tobias Meyer , Korbinian Perzlmaier
IPC: H01L33/62 , H01L25/04 , H01L25/075 , H01L31/02 , H01L31/18
Abstract: In an embodiment a method for producing a component having a carrier and at least one component part electrically conductively connected to the carrier and mechanically fixed to the carrier by an electrically insulating bonding layer includes providing the carrier having a connection layer, wherein the bonding layer is disposed on the carrier and has at least one opening, wherein a connection surface of the connection layer is exposed, and wherein the bonding layer projects vertically beyond the exposed connection surface or vice versa, applying the component part having a contact layer on the carrier in such that, in top view of the carrier, an exposed contact surface of the contact layer covers the opening and the connection surface located therein, wherein the exposed contact surface is spaced apart from the exposed connection surface by a vertical distance and reducing the vertical distance by changing a volume of the bonding layer such that the exposed contact surface and the exposed connection surface are brought together, such that they are directly adjacent to each other and such that a direct electrical contact is formed between the contact layer and the connection layer.
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