-
公开(公告)号:US20140210672A1
公开(公告)日:2014-07-31
申请号:US14107446
申请日:2013-12-16
Applicant: Siliconware Precision Industries Co., Ltd
Inventor: Chih-Hsien Chiu , Heng-Cheng Chu , Chien-Cheng Lin , Tsung-Hsien Tsai , Chao-Ya Yang , Yude Chu
IPC: H01Q1/38
Abstract: An electronic package structure is provided, including a substrate, a package encapsulant disposed on the substrate, and an antenna structure corresponding to a disposing area of the package encapsulant and having a first extension layer, a second extension layer disposed on the substrate, and a connection portion disposed between and electrically connected to the first extension layer and the second extension layer. Through the formation of the antenna structure on the disposing area of the package encapsulant, the substrate is not required to be widen, and, as such, the electronic package structure meets the miniaturization requirement.
Abstract translation: 提供一种电子封装结构,包括基板,设置在基板上的封装密封剂,以及对应于封装密封剂的布置区域的天线结构,并具有第一延伸层,设置在基板上的第二延伸层和 连接部分设置在第一延伸层和第二延伸层之间并且电连接到第一延伸层和第二延伸层。 通过在封装密封剂的配置区域上形成天线结构,不需要扩大基板,因此电子封装结构满足小型化要求。
-
公开(公告)号:US11476572B2
公开(公告)日:2022-10-18
申请号:US16750459
申请日:2020-01-23
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor: Chih-Yuan Shih , Chih-Hsien Chiu , Yueh-Chiung Chang , Tsung-Li Lin , Chi-Pin Tsai , Chien-Cheng Lin , Tsung-Hsien Tsai , Heng-Cheng Chu , Ming-Fan Tsai
IPC: H01Q1/52 , H01Q9/42 , H01Q1/24 , H01L21/56 , H01L23/31 , H01L23/498 , H01L23/552 , H01L23/66 , H01Q1/22 , H01Q1/48
Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.
-
公开(公告)号:US09627748B2
公开(公告)日:2017-04-18
申请号:US14151184
申请日:2014-01-09
Applicant: Siliconware Precision Industries Co., Ltd
Inventor: Chih-Hsien Chiu , Heng-Cheng Chu , Cheng-Yu Chiang
CPC classification number: H01Q9/0421 , H01Q1/38 , H01Q1/40
Abstract: An electronic component is provided, which includes a substrate having opposite first and second surfaces and an antenna structure combined with the substrate. The antenna structure has at least a first extending portion disposed on the first surface of the substrate, at least a second extending portion disposed on the second surface of the substrate, and a plurality of connecting portions disposed in the substrate for electrically connecting the first extending portion and the second extending portion. Any adjacent ones of the connecting portions are connected through one of the first extending portion and the second extending portion. As such, the antenna structure becomes three-dimensional. The present invention does not need to provide an additional region on the substrate for disposing the antenna structure, thereby reducing the width of the substrate so as to meet the miniaturization requirement of the electronic component.
-
14.
公开(公告)号:US09337250B2
公开(公告)日:2016-05-10
申请号:US14087554
申请日:2013-11-22
Applicant: Siliconware Precision Industries Co., Ltd
Inventor: Tsung-Hsien Tsai , Heng-Cheng Chu , Chien-Cheng Lin , Chih-Hsien Chiu , Hsin-Lung Chung , Yude Chu
CPC classification number: H01L23/66 , H01L21/56 , H01L23/3128 , H01L23/3135 , H01L23/64 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/85 , H01L25/16 , H01L25/50 , H01L28/00 , H01L2223/6661 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19105 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.
Abstract translation: 提供半导体封装及其制造方法。 半导体封装包括:具有多个导电焊盘的衬底和围绕形成在其表面上的导电焊盘的多个焊盘; 安装在导电焊盘上的多个无源器件; 绝缘层,其形成在所述表面上并且具有嵌入其中的无源器件的一部分; 安装在所述绝缘层的顶表面上的半导体芯片; 电连接半导体芯片和接合焊盘的多个接合线; 形成在基板的表面上以封装绝缘层,接合线和半导体芯片的密封剂,其中投射到基板上的半导体芯片的区域覆盖无源器件中最外面的一个的一部分。 因此,无源器件的安装密度提高。
-
公开(公告)号:US08963299B2
公开(公告)日:2015-02-24
申请号:US13660277
申请日:2012-10-25
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor: Chien-Cheng Lin , Tsung-Hsien Hsu , Heng-Cheng Chu , Chao-Ya Yang , Chih-Ming Cheng
IPC: H01L23/552 , H01L21/00
CPC classification number: H01L24/27 , H01L21/563 , H01L21/565 , H01L23/3121 , H01L23/3128 , H01L23/552 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L2224/16225 , H01L2224/2929 , H01L2224/32014 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/83192 , H01L2224/83951 , H01L2224/92125 , H01L2225/0651 , H01L2225/06517 , H01L2225/06558 , H01L2924/00014 , H01L2924/181 , H01L2924/3025 , H01L2924/00012 , H01L2224/45099 , H01L2924/00015 , H01L2924/0781 , H01L2924/00
Abstract: A semiconductor package is provided, including: a substrate having at least a conductive pad; a semiconductor element disposed on the substrate; a conductive adhesive formed on top and side surfaces of the semiconductor element and extending to the conductive pad; and an electronic element disposed on the conductive adhesive. The conductive adhesive and the conductive pad form a shielding structure so as to prevent electromagnetic interference from occurring between the semiconductor element and the electronic element.
Abstract translation: 提供一种半导体封装,包括:具有至少导电焊盘的衬底; 设置在所述基板上的半导体元件; 形成在半导体元件的顶表面和侧表面上并延伸到导电焊盘的导电粘合剂; 以及设置在导电粘合剂上的电子元件。 导电粘合剂和导电垫形成屏蔽结构,以防止在半导体元件和电子元件之间发生电磁干扰。
-
公开(公告)号:US20180090835A1
公开(公告)日:2018-03-29
申请号:US15596113
申请日:2017-05-16
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor: Chih-Yuan Shih , Chih-Hsien Chiu , Yueh-Chiung Chang , Tsung-Li Lin , Chi-Pin Tsai , Chien-Cheng Lin , Tsung-Hsien Tsai , Heng-Cheng Chu , Ming-Fan Tsai
IPC: H01Q1/52 , H01Q1/22 , H01Q1/48 , H01L23/552 , H01L23/498 , H01L23/31 , H01L21/56 , H01L23/66
CPC classification number: H01Q1/526 , H01L21/56 , H01L23/3121 , H01L23/498 , H01L23/49838 , H01L23/552 , H01L23/66 , H01L2223/6677 , H01L2224/48091 , H01Q1/2283 , H01Q1/243 , H01Q1/48 , H01Q9/42 , H01L2924/00014
Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.
-
公开(公告)号:US20160225728A1
公开(公告)日:2016-08-04
申请号:US15094125
申请日:2016-04-08
Applicant: Siliconware Precision Industries Co., Ltd.
Inventor: Tsung-Hsien Tsai , Heng-Cheng Chu , Chien-Cheng Lin , Chih-Hsien Chiu , Hsin-Lung Chung , Yude Chu
CPC classification number: H01L23/66 , H01L21/56 , H01L23/3128 , H01L23/3135 , H01L23/64 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/85 , H01L25/16 , H01L25/50 , H01L28/00 , H01L2223/6661 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19105 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.
Abstract translation: 提供半导体封装及其制造方法。 半导体封装包括:具有多个导电焊盘的衬底和围绕形成在其表面上的导电焊盘的多个焊盘; 安装在导电焊盘上的多个无源器件; 绝缘层,其形成在所述表面上并且具有嵌入其中的无源器件的一部分; 安装在所述绝缘层的顶表面上的半导体芯片; 电连接半导体芯片和接合焊盘的多个接合线; 形成在基板的表面上以封装绝缘层,接合线和半导体芯片的密封剂,其中投射到基板上的半导体芯片的区域覆盖无源器件中最外面的一个的一部分。 因此,无源器件的安装密度提高。
-
公开(公告)号:US20150123251A1
公开(公告)日:2015-05-07
申请号:US14133842
申请日:2013-12-19
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
Inventor: Chih-Hsien Chiu , Chia-Yang Chen , Tsung-Hsien Tsai , Heng-Cheng Chu , Cheng-Yu Chiang
IPC: H01L23/552 , H01L23/31
CPC classification number: H01L23/552 , H01L23/31 , H01L23/3121 , H01L24/16 , H01L24/48 , H01L2224/16225 , H01L2224/16245 , H01L2224/48227 , H01L2224/48247 , H01L2924/00014 , H01L2924/3011 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor package is disclosed, which includes: a packaging structure having at least a semiconductor element; and at least three shielding layers sequentially stacked on the packaging structure so as to cover the semiconductor element, wherein a middle layer of the shielding layers is lower in electrical conductivity than adjacent shielding layers on both sides of the middle layer, thereby reducing electromagnetic interferences so as to increase the shielding effectiveness.
Abstract translation: 公开了一种半导体封装,其包括:具有至少半导体元件的封装结构; 以及至少三个屏蔽层,其顺序堆叠在所述封装结构上以覆盖所述半导体元件,其中所述屏蔽层的中间层的导电性低于所述中间层的两侧上的相邻屏蔽层,从而降低电磁干扰 以提高屏蔽效能。
-
19.
公开(公告)号:US20140203395A1
公开(公告)日:2014-07-24
申请号:US14087554
申请日:2013-11-22
Applicant: Siliconware Precision industries Co., Ltd
Inventor: Tsung-Hsien Tsai , Heng-Cheng Chu , Chien-Cheng Lin , Chih-Hsien Chiu , Hsin-Lung Chung , Yude Chu
CPC classification number: H01L23/66 , H01L21/56 , H01L23/3128 , H01L23/3135 , H01L23/64 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/85 , H01L25/16 , H01L25/50 , H01L28/00 , H01L2223/6661 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19105 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.
Abstract translation: 提供半导体封装及其制造方法。 半导体封装包括:具有多个导电焊盘的衬底和围绕形成在其表面上的导电焊盘的多个焊盘; 安装在导电焊盘上的多个无源器件; 绝缘层,其形成在所述表面上并且具有嵌入其中的无源器件的一部分; 安装在所述绝缘层的顶表面上的半导体芯片; 电连接半导体芯片和接合焊盘的多个接合线; 形成在基板的表面上以封装绝缘层,接合线和半导体芯片的密封剂,其中投射到基板上的半导体芯片的区域覆盖无源器件中最外面的一个的一部分。 因此,无源器件的安装密度提高。
-
20.
公开(公告)号:US20140080265A1
公开(公告)日:2014-03-20
申请号:US14086135
申请日:2013-11-21
Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
Inventor: Ching-Hua Chen , Heng-Cheng Chu , Hsin-Lung Chung , Chih-Hsien Chiu , Chia-Yang Chen
IPC: H01L21/56
CPC classification number: H01L21/56 , H01L21/6835 , H01L23/3128 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2221/68345 , H01L2224/32225 , H01L2224/48227 , H01L2224/48237 , H01L2224/49174 , H01L2224/73265 , H01L2924/00013 , H01L2924/00014 , H01L2924/12042 , H01L2924/15311 , H01L2924/3011 , H01L2924/00 , H01L2224/13099 , H01L2224/13599 , H01L2224/05599 , H01L2224/05099 , H01L2224/29099 , H01L2224/29599 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A carrier-free semiconductor package includes a circuit structure having an insulating layer and a circuit layer embedded in the insulating layer and having a plurality of conductive traces and RF (radio frequency) traces, a chip disposed on a first surface of the insulating layer and electrically connected to the conductive traces, an encapsulant covering the chip and the circuit layer, a ground layer formed on a second surface of the insulating layer opposite to the first surface, and a plurality of solder balls disposed on the conductive traces or terminals on the conductive traces, wherein portions of the solder balls electrically connect the ground layer so as to allow the RF traces and the ground layer to form a microstrip line having an RF function, thus obtaining a single-layer carrier-free semiconductor package having low cost and simplified RF design.
Abstract translation: 一种无载体半导体封装,包括具有绝缘层和嵌入绝缘层中的电路层并具有多个导电迹线和RF(射频)迹线的电路结构,设置在该绝缘层的第一表面上的芯片,以及 电连接到导电迹线,覆盖芯片和电路层的密封剂,形成在与第一表面相对的绝缘层的第二表面上的接地层和设置在导电迹线上的多个焊球 导电迹线,其中焊球的部分电连接接地层,以便允许RF迹线和接地层形成具有RF功能的微带线,从而获得具有低成本的单层无载流子半导体封装, 简化射频设计。
-
-
-
-
-
-
-
-
-