公开(公告)号：US08823101B2

公开(公告)日：2014-09-02

申请号：US12341906

申请日：2008-12-22

申请人： Tatsuya Ohguro

发明人： Tatsuya Ohguro

IPC分类号： H01L29/78 ,  H01L23/00 ,  H01L29/66 ,  H01L27/02

CPC分类号： H01L24/06 ,  H01L24/05 ,  H01L24/48 ,  H01L27/0248 ,  H01L29/66818 ,  H01L29/785 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/05599 ,  H01L2224/48463 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01083 ,  H01L2924/05042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/30105 ,  H01L2224/45099 ,  H01L2924/00

摘要： Fins of semiconductor are formed on the substrate. Each of the fins is located separately from one another. A gate insulating film is formed on side surfaces of the fins. A gate electrode is formed on the gate insulating film. The gate electrode extends to cross over the fins. A gate contact portion is provided to supply an electric signal. In the fins, first drain regions and first source regions are formed respectively so as to sandwich portions of the fins located below the gate electrode. A width of first one of the fins is larger than that of second one of the fins which is more distant from the gate contact portion than the first one of the fins.

摘要翻译： 半导体芯片形成在基板上。 每个翅片彼此分开设置。 栅极绝缘膜形成在翅片的侧表面上。 在栅极绝缘膜上形成栅电极。 栅电极延伸以跨越鳍片。 提供栅极接触部分以提供电信号。 在翅片中，分别形成第一漏极区域和第一源极区域，以夹住位于栅极电极下方的鳍片的部分。 翅片中的第一个翼片的宽度大于比第一翼片更远离栅极接触部分的第二翼片的宽度。

公开(公告)号：US20110298023A1

公开(公告)日：2011-12-08

申请号：US13154579

申请日：2011-06-07

申请人： Tatsuya Ohguro

发明人： Tatsuya Ohguro

IPC分类号： H01L27/146

CPC分类号： H01L27/14645 ,  H01L27/14621 ,  H01L27/1464

摘要： According to the embodiments, a solid-state imaging device is provided, which includes a first electrode film, a first photoelectric conversion film, a first conductive film, a dielectric film, a second photoelectric conversion film, and a second conductive film. The first photoelectric conversion film covers the surface and the side of the first electrode film. The first conductive film covers the light receiving surface and the side of the first photoelectric conversion film. The dielectric film covers a portion corresponding to the side of the first photoelectric conversion film in the first conductive film. The second photoelectric conversion film covers a main portion of a portion corresponding to the light receiving surface of the first photoelectric conversion film in the first conductive film. The second conductive film covers the light receiving surface and the side of the second photoelectric conversion film.

摘要翻译： 根据实施例，提供了一种固态成像装置，其包括第一电极膜，第一光电转换膜，第一导电膜，电介质膜，第二光电转换膜和第二导电膜。 第一光电转换膜覆盖第一电极膜的表面和侧面。 第一导电膜覆盖光接收表面和第一光电转换膜的侧面。 电介质膜覆盖与第一导电膜中的第一光电转换膜侧相对应的部分。 第二光电转换膜覆盖与第一导电膜中的第一光电转换膜的光接收表面相对应的部分的主要部分。 第二导电膜覆盖光接收表面和第二光电转换膜的一侧。

公开(公告)号：US20090070084A1

公开(公告)日：2009-03-12

申请号：US12130320

申请日：2008-05-30

申请人： Mitiko Miura ,  Masahiro Yokomichi ,  Takahiro Kajiwara ,  Norio Sadachika ,  Masataka Miyake ,  Takahiro Iizuka ,  Masahiko Taguchi ,  Tatsuya Ohguro

发明人： Mitiko Miura ,  Masahiro Yokomichi ,  Takahiro Kajiwara ,  Norio Sadachika ,  Masataka Miyake ,  Takahiro Iizuka ,  Masahiko Taguchi ,  Tatsuya Ohguro

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： The drift region for increasing the breakdown voltage in an LDMOSFET is regarded as a resistive element. The potential distribution of the overall device is calculated by obtaining a potential distribution considering the resistance by iterative calculation. A capacitance generated in the drift region is analytically calculated assuming a linear potential distribution. A capacitance generated in the overlap region between the gate electrode and the drift region is calculated by considering the potential from the depletion region to the accumulation region.

摘要翻译： 用于增加LDMOSFET中的击穿电压的漂移区域被认为是电阻元件。 通过迭代计算考虑电阻的电位分布来计算整个装置的电位分布。 假设线性电位分布，分析地计算在漂移区域中产生的电容。 通过考虑从耗尽区域到累积区域的电位来计算在栅电极和漂移区域之间的重叠区域中产生的电容。

公开(公告)号：US07177134B2

公开(公告)日：2007-02-13

申请号：US11137794

申请日：2005-05-26

申请人： Tamio Ikehashi ,  Tatsuya Ohguro ,  Mie Matsuo

发明人： Tamio Ikehashi ,  Tatsuya Ohguro ,  Mie Matsuo

IPC分类号： H01G5/01 ,  H01G4/005

CPC分类号： H01G5/16 ,  H01G5/18

摘要： A variable-capacitance element includes: a first electrode and a second electrode which are fixed on a substrate with a spacing; a movable electrode; an actuator which is supported on a supporting portion provided on the substrate to drive the movable electrode. The movable electrode is put in an electrically connecting state with the second electrode, when the movable electrode is driven to a first position by the actuator, and the movable electrode is put in an electrically non-connected state with the second electrode, when the movable electrode is driven to a second position by the actuator. The movable electrode is constituted to be always put in an electrically non-connected state with the first electrode.

摘要翻译： 可变电容元件包括：以间隔固定在基板上的第一电极和第二电极; 可动电极; 支撑在设置在基板上的支撑部上以驱动可动电极的致动器。 当可动电极通过致动器驱动到第一位置时，可动电极与第二电极处于电连接状态，并且可移动电极与第二电极处于与电不连接的状态，当可移动电极 电极被致动器驱动到第二位置。 可动电极构成为与第一电极总是处于非连接状态。

公开(公告)号：US20050275061A1

公开(公告)日：2005-12-15

申请号：US10964805

申请日：2004-10-14

申请人： Tatsuya Ohguro

发明人： Tatsuya Ohguro

IPC分类号： H01L25/18 ,  H01F17/00 ,  H01L21/58 ,  H01L21/68 ,  H01L23/552 ,  H01L23/64 ,  H01L25/00 ,  H01L25/065 ,  H01L25/07 ,  H01L25/16

CPC分类号： H01L25/16 ,  H01F2017/008 ,  H01L21/6835 ,  H01L23/552 ,  H01L23/645 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L25/0657 ,  H01L2221/6835 ,  H01L2221/68368 ,  H01L2224/29198 ,  H01L2224/32145 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/8385 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01056 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01105 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/07802 ,  H01L2924/13091 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/30107 ,  H01L2924/3025 ,  H01L2924/01025 ,  H01L2924/01028 ,  H01L2924/01051 ,  H01L2924/01026 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A semiconductor device includes a first chip having an inductor, a second chip stacked on the first chip and having a conductive layer, and a first magnetic shielding layer formed between the first and second chips.

摘要翻译： 半导体器件包括具有电感器的第一芯片，堆叠在第一芯片上并具有导电层的第二芯片，以及形成在第一芯片和第二芯片之间的第一磁屏蔽层。

公开(公告)号：US20050224898A1

公开(公告)日：2005-10-13

申请号：US11143594

申请日：2005-06-03

申请人： Hisayo Momose ,  Hiroshi Iwai ,  Masanobu Saito ,  Tatsuya Ohguro ,  Mizuki Ono ,  Takashi Yoshitomi ,  Shinichi Nakamura

发明人： Hisayo Momose ,  Hiroshi Iwai ,  Masanobu Saito ,  Tatsuya Ohguro ,  Mizuki Ono ,  Takashi Yoshitomi ,  Shinichi Nakamura

IPC分类号： H01L21/225 ,  H01L21/336 ,  H01L27/088 ,  H01L29/423 ,  H01L29/76 ,  H01L29/78

CPC分类号： H01L29/66575 ,  H01L21/2255 ,  H01L21/2256 ,  H01L21/28211 ,  H01L27/0629 ,  H01L27/088 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/78

摘要： A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed an the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 μm; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined a be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

摘要翻译： 半导体器件包括：p型半导体衬底（1）; 绝缘膜（3）; 经由所述绝缘膜形成所述基板的栅电极（2） 以及形成在形成在基板（1）上的栅电极（2）下方的沟道形成区域（4）的两侧的n型源极/漏极区域（5）。 特别地，在氧化硅膜的转换率（氧化硅当量厚度）下，确定绝缘膜（3）的厚度（T×OX ）小于2.5nm。 栅极（2）的栅极长度（L SUB）确定为等于或小于0.3μm; 并且进一步施加到栅电极（2）和漏区（6）的电压为1.5V以下。 因此，在具有隧穿栅极氧化膜（3）的MOSFET中，可以提高热载流子应力下的晶体管的可靠性，并且可以显着降低栅极漏电流，从而可以显着提高晶体管特性。

公开(公告)号：US20050001255A1

公开(公告)日：2005-01-06

申请号：US10902579

申请日：2004-07-30

申请人： Takashi Yoshitomi ,  Tatsuya Ohguro ,  Ryoji Hasumi ,  Hideki Kimijima ,  Takashi Yamaguchi ,  Masahiro Inohara

发明人： Takashi Yoshitomi ,  Tatsuya Ohguro ,  Ryoji Hasumi ,  Hideki Kimijima ,  Takashi Yamaguchi ,  Masahiro Inohara

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L27/06 ,  H01L27/08 ,  H01L27/108

CPC分类号： H01L28/60 ,  H01L27/0629 ,  H01L27/0805

摘要： At present, Cu (copper) is being used as a wiring material. In an RF-CMOS device as a combination of an RF analog device and CMOS logic device, two electrodes of a MIM capacitor are formed from Cu having a large diffusion coefficient. To prevent Cu from diffusing to the capacitor insulating film of the MIM capacitor, diffusion prevention films having a function of preventing diffusion of Cu are interposed between the capacitor insulating film and the two electrodes. As a result, Cu forming the electrodes does not diffuse to the capacitor insulating film.

公开(公告)号：US06777756B2

公开(公告)日：2004-08-17

申请号：US10102631

申请日：2002-03-22

申请人： Tatsuya Ohguro

发明人： Tatsuya Ohguro

IPC分类号： H01L2976

CPC分类号： H01L29/0692 ,  H01L29/4238

摘要： An aspect the present invention is to provide a semiconductor device including at least one MISFET structure having an element isolation region formed on a surface portion of a semiconductor substrate to have a closed region, an element region formed on the surface region of the semiconductor substrate to surround the element isolation region, a gate insulating film formed to cover at least the surface of the element region, a contact region formed on the element isolation region, and at least four gate electrodes connected to the contact region and formed on the surface of the element region via the gate insulating film to extend to at least outside the element region.

摘要翻译： 本发明的一个方面是提供一种半导体器件，其包括至少一个MISFET结构，其具有形成在半导体衬底的表面部分上的元件隔离区域以具有闭合区域，形成在半导体衬底的表面区域上的元件区域 围绕元件隔离区域，形成为至少覆盖元件区域的表面的栅极绝缘膜，形成在元件隔离区域上的接触区域以及连接到接触区域并形成在元件隔离区域的表面上的至少四个栅电极 元件区域经由栅极绝缘膜延伸至至少在元件区域外部。

公开(公告)号：US08958574B2

公开(公告)日：2015-02-17

申请号：US13536002

申请日：2012-06-28

申请人： Hideaki Fukuzawa ,  Tatsuya Ohguro ,  Akihiro Kojima ,  Yoshiaki Sugizaki ,  Mariko Takayanagi ,  Yoshihiko Fuji ,  Akio Hori ,  Michiko Hara

发明人： Hideaki Fukuzawa ,  Tatsuya Ohguro ,  Akihiro Kojima ,  Yoshiaki Sugizaki ,  Mariko Takayanagi ,  Yoshihiko Fuji ,  Akio Hori ,  Michiko Hara

IPC分类号： H04R3/00 ,  G01L9/00 ,  H04R1/08 ,  B81C1/00 ,  H04R19/00 ,  H04R19/04 ,  H04R31/00

CPC分类号： B81C1/00158 ,  B81B2201/0264 ,  B81C1/00246 ,  B81C2203/0771 ,  G01L9/0042 ,  H04R1/08 ,  H04R19/005 ,  H04R19/04 ,  H04R31/00

摘要： According to one embodiment, a strain and pressure sensing device includes a semiconductor circuit unit and a sensing unit. The semiconductor circuit unit includes a semiconductor substrate and a transistor. The transistor is provided on a semiconductor substrate. The sensing unit is provided on the semiconductor circuit unit, and has space and non-space portions. The non-space portion is juxtaposed with the space portion. The sensing unit further includes a movable beam, a strain sensing element unit, and first and second buried interconnects. The movable beam has fixed and movable portions, and includes first and second interconnect layers. The fixed portion is fixed to the non-space portion. The movable portion is separated from the transistor and extends from the fixed portion into the space portion. The strain sensing element unit is fixed to the movable portion. The first and second buried interconnects are provided in the non-space portion.

摘要翻译： 根据一个实施例，应变和压力感测装置包括半导体电路单元和感测单元。 半导体电路单元包括半导体衬底和晶体管。 晶体管设置在半导体衬底上。 感测单元设置在半导体电路单元上，并且具有空间和非空间部分。 非空间部分与空间部分并置。 感测单元还包括可移动光束，应变传感元件单元以及第一和第二掩埋互连。 可移动光束具有固定和可移动部分，并且包括第一和第二互连层。 固定部固定在非空间部。 可动部分与晶体管分离，并从固定部分延伸到空间部分。 应变传感元件单元固定在可动部上。 第一和第二掩埋互连件设置在非空间部分中。

公开(公告)号：US07655995B2

公开(公告)日：2010-02-02

申请号：US11341853

申请日：2006-01-30

申请人： Tatsuya Ohguro

发明人： Tatsuya Ohguro

IPC分类号： H01L27/20

CPC分类号： H01H59/0009 ,  H01H2057/006

摘要： A semiconductor device using a MEMS technology according to an example of the present invention comprises a cavity, a lower electrode provided in a lower part of the cavity, an actuator provided in an upper part or inside of the cavity, an upper electrode connected to the actuator, and a conductive layer in contact with the lower electrode outside the cavity via a contact hole whose bottom face is provided above an upper face of the lower electrode in the cavity.

摘要翻译： 使用根据本发明的示例的MEMS技术的半导体器件包括空腔，设置在腔的下部中的下电极，设置在腔的上部或内部的致动器，连接到腔的上电极 致动器，以及通过接触孔与空腔外部的下部电极接触的导电层，该接触孔的底面设置在空腔中的下部电极的上表面的上方。