公开(公告)号：US20140264910A1

公开(公告)日：2014-09-18

申请号：US13829483

申请日：2013-03-14

申请人： Sandeep Razdan ,  Edward R. Prack ,  Sairam Agraharam ,  Robert L. Sankman ,  Shan Zhong ,  Robert M. Nickerson

发明人： Sandeep Razdan ,  Edward R. Prack ,  Sairam Agraharam ,  Robert L. Sankman ,  Shan Zhong ,  Robert M. Nickerson

IPC分类号： H01L25/065 ,  H01L23/00

CPC分类号： H01L25/0657 ,  C09J9/02 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49866 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53228 ,  H01L23/53242 ,  H01L23/5329 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/95 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/12105 ,  H01L2224/13005 ,  H01L2224/13025 ,  H01L2224/16113 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/29078 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/2939 ,  H01L2224/29411 ,  H01L2224/29439 ,  H01L2224/29444 ,  H01L2224/29447 ,  H01L2224/29455 ,  H01L2224/29499 ,  H01L2224/73104 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83851 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1088 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/13611 ,  H01L2224/13639 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13613 ,  H01L2924/014 ,  H01L2924/207 ,  H01L2924/0665 ,  H01L2924/00

摘要： Embodiments of the present disclosure are directed towards techniques and configurations of interconnect structures having a polymer core in integrated circuit (IC) package assemblies. In one embodiment, an apparatus includes a first die having a plurality of transistor devices disposed on an active side of the first die and a plurality of interconnect structures electrically coupled with the first die, wherein individual interconnect structures of the plurality of interconnect structures have a polymer core, and an electrically conductive material disposed on the polymer core, the electrically conductive material being configured to route electrical signals between the transistor devices of the first die and a second die. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例涉及在集成电路（IC）封装组件中具有聚合物芯的互连结构的技术和配置。 在一个实施例中，一种装置包括具有设置在第一管芯的有源侧上的多个晶体管器件的第一管芯和与第一管芯电耦合的多个互连结构，其中多个互连结构中的各个互连结构具有 聚合物芯和设置在聚合物芯上的导电材料，所述导电材料被配置为在第一管芯的晶体管器件和第二管芯之间布置电信号。 可以描述和/或要求保护其他实施例。

公开(公告)号：US07818878B2

公开(公告)日：2010-10-26

申请号：US12042222

申请日：2008-03-04

申请人： Robert M. Nickerson ,  Ronald L. Spreitzer ,  John C. Conner ,  Brian Taggart

发明人： Robert M. Nickerson ,  Ronald L. Spreitzer ,  John C. Conner ,  Brian Taggart

IPC分类号： H05K3/30

CPC分类号： H01L23/5387 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06579 ,  H01L2225/06586 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/141 ,  H05K1/147 ,  H05K1/189 ,  H05K7/1061 ,  H05K2201/056 ,  H05K2201/10378 ,  H05K2201/10734 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49144 ,  Y10T29/49146 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In one embodiment, a package-to-package stack is assembled comprising a first integrated circuit package, and a second integrated circuit package which are mechanically and electrically connected using an interposer and a substrate folded around the interposer. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，组装包装堆叠包括第一集成电路封装和第二集成电路封装，所述第一集成电路封装使用中介层和围绕插入件折叠的衬底机械地和电连接。 描述和要求保护其他实施例。

公开(公告)号：US06794760B1

公开(公告)日：2004-09-21

申请号：US10656413

申请日：2003-09-05

申请人： Edward Jaeck ,  Ronald I. Spreitzer ,  Robert M. Nickerson ,  Lesley A. Polka

发明人： Edward Jaeck ,  Ronald I. Spreitzer ,  Robert M. Nickerson ,  Lesley A. Polka

IPC分类号： H01L2940

CPC分类号： H01L24/49 ,  H01L23/66 ,  H01L24/45 ,  H01L24/46 ,  H01L24/48 ,  H01L24/85 ,  H01L2224/05553 ,  H01L2224/16 ,  H01L2224/32145 ,  H01L2224/45013 ,  H01L2224/45015 ,  H01L2224/45025 ,  H01L2224/45028 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4519 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4903 ,  H01L2224/49051 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2924/00011 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10162 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/20752 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01049

摘要： A system may include an integrated circuit die, a package, and an interconnect. The integrated circuit die may include a conductive die pad, the package may include a conductive package pad, and the interconnect may include two or more stranded wires. A first end of the interconnect is electrically coupled to the conductive die pad, and a second end of the interconnect is electrically coupled to the package pad.

摘要翻译： 系统可以包括集成电路管芯，封装和互连。 集成电路管芯可以包括导电管芯焊盘，封装可以包括导电封装焊盘，并且互连可以包括两条或更多条绞线。 互连的第一端电耦合到导电管芯焊盘，并且互连的第二端电耦合到封装焊盘。

公开(公告)号：US20140159250A1

公开(公告)日：2014-06-12

申请号：US13976394

申请日：2011-12-31

申请人： Robert M. Nickerson

发明人： Robert M. Nickerson

IPC分类号： H01L23/00 ,  H01L23/498

CPC分类号： H01L24/19 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/06 ,  H01L24/16 ,  H01L24/20 ,  H01L24/73 ,  H01L24/92 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/16147 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24225 ,  H01L2224/73259 ,  H01L2224/821 ,  H01L2224/92224 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/10253 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/3511 ,  H05K1/185 ,  H05K1/186 ,  H05K3/4682 ,  H05K2201/10674 ,  H05K2203/1469 ,  H01L2224/81 ,  H01L2224/82 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/05599 ,  H01L2924/00

摘要： An apparatus including a die including a first side and an opposite second side including a device side with contact points; and a build-up carrier including at least one layer of conductive material disposed on a first side of the die, and a plurality of alternating layers of conductive material and dielectric material disposed on the second side of the die, wherein the at least one layer of conductive material on the first side of the die is coupled to at least one of (1) at least one of the alternating layers of conductive material on the second side of the die and (2) at least one of the contact points of the die. A method including forming a first portion of a build-up carrier adjacent one side of a die, and forming a second portion of the build-up carrier adjacent another side of the die.

摘要翻译： 一种包括模具的设备，所述模具包括具有接触点的装置侧的第一侧和相对的第二侧; 以及堆叠载体，其包括设置在所述管芯的第一侧上的至少一层导电材料，以及设置在所述管芯的第二侧上的导电材料和介电材料的多个交替层，其中所述至少一个层 在模具的第一侧上的导电材料的至少一个与模具的第二侧上的（1）至少一个导电材料的交替层中的至少一个耦合，并且（2）至少一个 死。 一种方法，包括邻近模具的一侧形成积聚载体的第一部分，以及与所述模具的另一侧相邻地形成所述堆积载体的第二部分。

公开(公告)号：US20100258927A1

公开(公告)日：2010-10-14

申请号：US12384984

申请日：2009-04-10

申请人： Sanka Ganesan ,  Yosuke Kanaoka ,  Ram S. Viswanath ,  Rajasekaran Swaminathan ,  Robert M. Nickerson ,  Leonel R. Arane ,  John S. Guzek ,  Yoshihiro Tomita

发明人： Sanka Ganesan ,  Yosuke Kanaoka ,  Ram S. Viswanath ,  Rajasekaran Swaminathan ,  Robert M. Nickerson ,  Leonel R. Arane ,  John S. Guzek ,  Yoshihiro Tomita

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H01L23/488 ,  H01L21/50 ,  H01L23/3128 ,  H01L23/49833 ,  H01L23/562 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Embodiments of the invention relate to a package-on-package (PoP) assembly comprising a top device package and a bottom device package interconnected by way of an electrically interconnected planar stiffener. Embodiments of the invention include a first semiconductor package having a plurality of inter-package contact pads and a plurality of second level interconnect (SLI) pads; a second semiconductor package having a plurality of SLI pads on the bottom side of the package; and a planar stiffener having a first plurality of planar contact pads on the top side of the stiffener electrically connected to the SLI pads of the second package, and a second plurality of planar contact pads electrically connected to the inter-package contact pads of the first package.

摘要翻译： 本发明的实施例涉及一种封装封装（PoP）组件，其包括顶部器件封装和通过电互连平面加强件互连的底部器件封装。 本发明的实施例包括具有多个封装间接触焊盘和多个第二级互连（SLI）焊盘的第一半导体封装; 第二半导体封装，其具有在封装的底侧上的多个SLI焊盘; 以及平面加强件，其具有与所述第二封装的SLI焊盘电连接的所述加强件的顶侧上的第一多个平面接触焊盘，以及电连接到所述第一封装的所述封装间接触焊盘的第二多个平面接触焊盘 包。