公开(公告)号：US08056795B2

公开(公告)日：2011-11-15

申请号：US12511951

申请日：2009-07-29

Applicant: Corey A. Peterson

Inventor： Corey A. Peterson

IPC: B23K1/00 ,  B23K5/00 ,  G01N11/00

CPC classification number: H05K3/3489 ,  B23K3/082 ,  H05K2201/10204 ,  H05K2203/0169 ,  H05K2203/162

Abstract: A fluxometer system and method is provided. The fluxometer comprises a frame, a simulated circuit board disposed in the frame and having a plurality of holes formed therein extending generally transverse to a plane of the board and a cover. The cover is received on the frame over the simulated circuit board and includes several protrusions simulating leads that extend into the holes of the simulated circuit board. The fluxometer further includes an indicator sheet disposed between the simulated circuit board and the cover, the protrusions extending through the indicator sheet.

Abstract translation: 提供了流量计系统和方法。 流量计包括框架，设置在框架中的模拟电路板，并且具有形成在其中的多个孔，其大致横向于板的平面和盖。 盖子被接收在模拟电路板上的框架上，并且包括模拟延伸到模拟电路板的孔中的引线的几个突起。 流量计还包括设置在模拟电路板和盖之间的指示片，突出部延伸穿过指示片。

公开(公告)号：US20110133752A1

公开(公告)日：2011-06-09

申请号：US12958982

申请日：2010-12-02

Applicant: Swen Weitemeier ,  Christian Oldendorf

Inventor： Swen Weitemeier ,  Christian Oldendorf

IPC: G01R27/28

CPC classification number: G01R31/2815 ,  G01R31/2839 ,  G06F21/86 ,  H05K1/0275 ,  H05K2201/10151 ,  H05K2201/10204

Abstract: An electronic device, and associated method, provided with a circuit board (10), with a set of input contacts (IN/COM), a set of output contacts (OUT/COM) and an electrical circuit (18) connected between the input contacts (IN/COM) and the output contacts (OUT/COM) and a controller. The controller carries out a real-time test of the circuit board using a test signal introduced into the electrical circuit, the electrical circuit (18) being designed as a passive network having a characteristic transfer function and provided with at least one capacitive element, wherein the capacitive element is a conductor surface (221) forming a capacitor in the assembled state with a corresponding, device-side conductor surface (222″), which is connected to the electrical circuit (18) via a contact element in the assembled state, whereby the capacitive value of the capacitive element in the assembled state differs from the capacitive value of the capacitive element in the disassembled state.

Abstract translation: 一种具有电路板（10）的电子设备和相关方法，具有一组输入触点（IN / COM），一组输出触点（OUT / COM）和连接在输入端之间的电路（18） 触点（IN / COM）和输出触点（OUT / COM）和控制器。 控制器使用引入电路的测试信号对电路板进行实时测试，电路（18）被设计为具有特征传递函数并具有至少一个电容元件的无源网络，其中 所述电容元件是在组装状态下形成电容器的导体表面（221），该电容器与相应的器件侧导体表面（222“）形成，所述导体表面（222”）在组装状态下通过接触元件连接到电路（18） 由此，组装状态下的电容元件的电容值与分解状态下的电容元件的电容值不同。

公开(公告)号：US20110006405A1

公开(公告)日：2011-01-13

申请号：US12818331

申请日：2010-06-18

Applicant: Keiichi YAMAMOTO ,  Takashi FUKUDA

Inventor： Keiichi YAMAMOTO ,  Takashi FUKUDA

IPC: H01L23/00 ,  H01L21/71

CPC classification number: H05K1/0271 ,  H01L23/498 ,  H01L23/562 ,  H01L2924/0002 ,  H05K1/181 ,  H05K2201/09909 ,  H05K2201/10204 ,  H05K2201/10689 ,  H05K2201/2009 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate, an electronic component and a resin member. The substrate has a first electrode. The electronic component is provided on the substrate, and has a second electrode electrically connected to the first electrode. The resin member alleviates an external stress to the second electrode of the electronic component. The resin member is disposed on the substrate at a region separated from the electronic component.

Abstract translation: 半导体器件包括基板，电子部件和树脂部件。 基板具有第一电极。 电子部件设置在基板上，并且具有与第一电极电连接的第二电极。 树脂构件减轻对电子部件的第二电极的外部应力。 树脂构件在与电子部件分离的区域处设置在基板上。

公开(公告)号：US20100073022A1

公开(公告)日：2010-03-25

申请号：US12628276

申请日：2009-12-01

Applicant: Ted R. Schnetker

Inventor： Ted R. Schnetker

IPC: G01R31/26

CPC classification number: H05K1/0268 ,  H01L23/3128 ,  H01L2224/48091 ,  H01L2924/15311 ,  H05K3/3436 ,  H05K2201/10204 ,  H05K2201/10734 ,  H05K2203/163 ,  H01L2924/00014

Abstract: A monitoring system includes a monitor chip or chips soldered to a printed wiring board. By mirroring a function IC chip interface with the monitor chip, the consumed and remaining thermal/and or vibration-fatigue life of the function IC chip based on the life-environment actually experienced through monitoring of the monitor chip is readily determined. The monitor chip includes monitoring interconnections and/or circuitry which determines the number and/or location of failed-open solder terminations of the monitor chip.

Abstract translation: 监视系统包括焊接到印刷电路板的监视器芯片或芯片。 通过与显示器芯片镜像功能IC芯片接口，可以容易地确定基于通过监视芯片实际经历的使用寿命的功能IC芯片的消耗和剩余的热和/或振动疲劳寿命。 监视器芯片包括监视互连和/或电路，其确定监视器芯片的故障开放焊接终端的数量和/或位置。

公开(公告)号：US20100071207A1

公开(公告)日：2010-03-25

申请号：US12545371

申请日：2009-08-21

Applicant: Woo-suk CHOI ,  Deok-heung KIM

Inventor： Woo-suk CHOI ,  Deok-heung KIM

IPC: H05K3/10 ,  B05C13/02

CPC classification number: H05K3/0085 ,  B65H18/103 ,  B65H23/188 ,  B65H2301/522 ,  B65H2701/1752 ,  H05K1/0393 ,  H05K3/0097 ,  H05K2201/10204 ,  H05K2203/1545

Abstract: Provided are an apparatus for roll-to-roll manufacturing of semiconductor parts and a method of the roll-to-roll manufacturing. The apparatus includes a material supplying unit continuously supplying a material, a processing unit processing the material supplied by the material supplying unit, a transferring unit transferring the material, a tension adjusting unit adjusting tension of the material in a direction in which the material is being transferred; and a connection operating unit, which is disposed between the material supplying unit and the processing unit, attaching a leading board to a leading portion of the material.

Abstract translation: 提供了一种用于半导体部件的卷对卷制造的设备和卷对卷制造的方法。 该设备包括连续供应材料的材料供应单元，处理由材料供应单元供应的材料的处理单元，转移材料的转移单元，调节材料沿材料方向的张力的张力调节单元 转入; 以及连接操作单元，其设置在所述材料供应单元和所述处理单元之间，将前导板附接到所述材料的前端部分。

公开(公告)号：US07659604B2

公开(公告)日：2010-02-09

申请号：US10549996

申请日：2005-03-17

Applicant: Joji Fujiwara ,  Tsuyoshi Himori ,  Michiaki Tsuneoka

Inventor： Joji Fujiwara ,  Tsuyoshi Himori ,  Michiaki Tsuneoka

IPC: H01L23/552

CPC classification number: H05K1/0218 ,  H01L23/29 ,  H01L23/552 ,  H01L2924/15159 ,  H05K3/284 ,  H05K9/0022 ,  H05K2201/09972 ,  H05K2201/10204

Abstract: A module component in which mounting components and a conductive partition for dividing into a plurality of circuit blocks are mounted on a substrate. The circuit blocks are covered with a sealing member, which is further covered on its surface with a conductive film to electrically shield the circuit blocks individually. This module component can maintain bending strength, with little warpage by a sufficient shielding effect achieved without increasing the number of manufacturing processes.

Abstract translation: 其中安装部件和用于分割成多个电路块的导电隔板安装在基板上的模块部件。 电路块被密封构件覆盖，密封构件在其表面上进一步用导电膜覆盖，以电隔离电路块。 该模块组件可以在不增加制造工艺的数量的情况下实现足够的屏蔽效果，从而保持弯曲强度，几乎没有翘曲。

公开(公告)号：US20080175298A1

公开(公告)日：2008-07-24

申请号：US11624267

申请日：2007-01-18

Applicant: Craig Damon Hillman ,  Nathan John Blattau ,  Danko Dmitrievich Priimak

Inventor： Craig Damon Hillman ,  Nathan John Blattau ,  Danko Dmitrievich Priimak

IPC: G01N25/72

CPC classification number: G01R31/2817 ,  G01R31/048 ,  H05K1/0212 ,  H05K3/341 ,  H05K2201/10204 ,  H05K2203/162

Abstract: Embodiments may include a method and an apparatus for inducing degradation through temperature cycling of a solder joint or a component on a surface mount printed wiring board (SMPWB) coupon. The coupon may include alternating layers of dielectric material and conductive material stacked one upon another and a heating trace mounted on a surface of the SMPWB or between layers of dielectric material. A first value indicative of a temperature of the heating trace may be determined based on a measured electrical resistance of the heating trace. A difference between the first value and a second value indicative of a desired temperature of the heating trace may be determined. A particular current and a particular voltage may be applied to the heating trace based on the determined difference between the first value and the second value.

Abstract translation: 实施例可以包括用于通过焊接接头或表面安装印刷电路板（SMPWB）试样上的部件的温度循环来引起劣化的方法和装置。 优惠券可以包括交替的介电材料层和导电材料层叠在一起，以及安装在SMPWB的表面上或介电材料层之间的加热迹线。 可以基于所测量的加热迹线的电阻来确定表示加热迹线的温度的第一值。 可以确定表示加热迹线的期望温度的第一值和第二值之间的差。 可以基于所确定的第一值和第二值之间的差异，将特定电流和特定电压施加到加热迹线。

公开(公告)号：US20070063324A1

公开(公告)日：2007-03-22

申请号：US11319656

申请日：2005-12-29

Applicant: Kinuko Mishiro ,  Ken-ichiro Tsubone

Inventor： Kinuko Mishiro ,  Ken-ichiro Tsubone

IPC: H01L23/02

CPC classification number: H01L21/4871 ,  H01L23/49816 ,  H01L2224/16 ,  H01L2924/10253 ,  H05K1/0231 ,  H05K1/0271 ,  H05K3/3415 ,  H05K3/3436 ,  H05K3/3463 ,  H05K2201/10204 ,  H05K2201/10545 ,  H05K2201/10734 ,  H05K2201/2009 ,  H05K2203/047 ,  Y02P70/613 ,  H01L2924/00

Abstract: A warp reducing member is bonded to an area on one surface of the substrate corresponding to other side of an electronic part for which the warp is to be reduced with respect to a substrate. An external size of the warp reducing member is substantially same as a size of each of a plurality of electronic parts or large enough to include multiple electronic parts. The warp reducing member is bonded to the substrate with a bonding material having a melting point lower than that of other bonding material that electrically connects the electronic parts to the substrate.

Abstract translation: 翘曲减少构件被结合到基板的一个表面上的相对于基板相对于要减薄的电子部件的另一侧的区域。 翘曲减少构件的外部尺寸基本上与多个电子部件的尺寸相同或足够大以包括多个电子部件。 翘曲减少构件用熔点低于将电子部件与基板电连接的其他接合材料的熔点低的接合材料接合到基板。

公开(公告)号：US07143492B2

公开(公告)日：2006-12-05

申请号：US10832321

申请日：2004-04-27

Applicant: Chih-Chung Chen

Inventor： Chih-Chung Chen

IPC: B23P19/04

CPC classification number: H05K3/0052 ,  H05K1/0269 ,  H05K3/225 ,  H05K2201/09145 ,  H05K2201/09845 ,  H05K2201/10204 ,  H05K2201/10598 ,  H05K2203/0143 ,  H05K2203/0191 ,  H05K2203/0228 ,  H05K2203/0278 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49135 ,  Y10T29/49718 ,  Y10T29/49721 ,  Y10T29/49723 ,  Y10T29/49725 ,  Y10T29/49726 ,  Y10T29/4973 ,  Y10T29/49732 ,  Y10T29/49734 ,  Y10T29/4975

Abstract: A printed circuit board defective area transplant repair method in which printed circuit boards that are determined to be defective undergo a series of reworking procedures comprised of plotting the printed circuit board area block plan, selecting the printed circuit boards, cutting out the area blocks, cutting the selected area blocks, applying the adhesive and fitting area blocks, adjusting the area block alignment, roller tamping the plastic band, curing the adhesive, and tearing off the plastic band. Following the reworking operations, defective printed circuit boards are restored into a good products capable of continuous use such that printed circuit board fabrication and production is even more economical and environmentally protective and, furthermore, printed circuit board manufacturing reaches maximum utilization rates, thereby effectively increasing practical production value.

Abstract translation: 一种印刷电路板缺陷区域移植修复方法，其中确定为有缺陷的印刷电路板经历一系列返工程序，其包括绘制印刷电路板区域块图，选择印刷电路板，切割区域块，切割 所选区域块，涂抹粘合剂和装配区域块，调整区域块对齐，辊夯塑料带，固化粘合剂，撕下塑料带。 在返工操作之后，有缺陷的印刷电路板被恢复成能够连续使用的良好产品，使得印刷电路板的制造和生产更加经济和环境保护，此外，印刷电路板制造达到最大利用率，从而有效地增加 实用生产价值。

公开(公告)号：US06879493B2

公开(公告)日：2005-04-12

申请号：US10212698

申请日：2002-08-07

Applicant: Suzushi Kimura ,  Tsuyoshi Himori ,  Koji Hashimoto

Inventor： Suzushi Kimura ,  Tsuyoshi Himori ,  Koji Hashimoto

IPC: H01L23/538 ,  H01L25/16 ,  H05K1/02 ,  H05K1/18 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K1/184 ,  H01L23/5383 ,  H01L23/5386 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16265 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/19103 ,  H01L2924/19105 ,  H05K1/023 ,  H05K1/0231 ,  H05K1/185 ,  H05K3/4046 ,  H05K3/4602 ,  H05K2201/09118 ,  H05K2201/09827 ,  H05K2201/10204 ,  H05K2201/1053 ,  H05K2201/10636 ,  H05K2203/1469 ,  H05K2203/161 ,  Y02P70/611 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49146 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49172

Abstract: The invention relates to a module component having chip components buried in a circuit board, and a method of manufacturing the same, and more specifically it relates to a module component capable of obtaining desired circuit characteristics and functions stably if the size of the component is reduced, being produced very efficiently, and suited to machine mounting, and a method of manufacturing the same. According to the invention, since a desired circuit is composed by disposing a specific number of chip components according to a specified rule, it is not necessary to heat the buried chip components at high temperature when forming a module, chip components are obtained in specified values, and the circuit characteristics, functions, and dimensional precision are stably obtained exactly as designed, and moreover since the chip components are disposed according to a specified rule, it is easy to automate insertion of chip components and increase its operation speed, even if the size of the chip components is reduced, and the circuit composition may be flexibly and easily changed only by changing the inserting position and type of chip components.

Abstract translation: 本发明涉及一种具有埋入电路板中的芯片组件的模块组件及其制造方法，更具体地说，涉及一种能够获得希望的电路特性并能够稳定地工作的模块组件，如果该组件的尺寸减小 ，非常有效地生产并且适合于机器安装及其制造方法。 根据本发明，由于根据规定通过设置特定数量的芯片部件来构成所需的电路，因此在形成模块时不需要在高温下加热埋层芯片部件，以特定值获得芯片部件 ，并且电路特性，功能和尺寸精度都按照设计得到稳定的获得，而且由于芯片部件按照规定进行配置，因此即使是 芯片部件的尺寸减小，并且仅通过改变芯片部件的插入位置和类型可以灵活且容易地改变电路组成。