公开(公告)号：US20070273019A1

公开(公告)日：2007-11-29

申请号：US11709992

申请日：2007-02-23

申请人： Chien Ping Huang ,  Ho-Yi Tsai

发明人： Chien Ping Huang ,  Ho-Yi Tsai

IPC分类号： H01L23/52 ,  H01L21/00

CPC分类号： H01L23/24 ,  H01L21/561 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/36 ,  H01L24/48 ,  H01L24/97 ,  H01L25/0655 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package, a chip carrier structure thereof, and a method for fabricating the chip carrier structure are provided. A substrate having a mounting region and a covering region is disposed in an opening of a carrier. A molding process is performed to form an encapsulant on the covering region of the substrate, with the mounting region of the substrate being exposed from the encapsulant. A cutting process is performed along edges of the substrate, such that the chip carrier structure is fabricated. A semiconductor chip is mounted on the mounting region of the substrate in a flip-chip manner, such that the semiconductor package is completed. The encapsulant formed on the covering region of the substrate provides the substrate with supporting strength and prevents poor electrical contact for the semiconductor package caused by substrate warpage.

摘要翻译： 提供半导体封装，其芯片载体结构和制造芯片载体结构的方法。 具有安装区域和覆盖区域的基板设置在载体的开口中。 进行成型工艺以在衬底的覆盖区域上形成密封剂，衬底的安装区域从密封剂暴露出来。 沿着衬底的边缘进行切割处理，从而制造芯片载体结构。 半导体芯片以倒装芯片的方式安装在基板的安装区域上，使得半导体封装完成。 形成在基板的覆盖区域上的密封剂为基板提供支撑强度，并防止由基板翘曲导致的半导体封装的不良电接触。

公开(公告)号：US20070202633A1

公开(公告)日：2007-08-30

申请号：US11651708

申请日：2007-01-09

申请人： Wen-Tsung Tseng ,  Fang-Lin Tsai ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

发明人： Wen-Tsung Tseng ,  Fang-Lin Tsai ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

IPC分类号： H01L21/00

CPC分类号： H01L21/4882 ,  H01L23/3675 ,  H01L23/544 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2223/5442 ,  H01L2223/54473 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/01079 ,  H01L2924/16152 ,  H01L2924/16315 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00015

摘要： A semiconductor package and a method for fabricating the same are provided. The method includes providing a substrate having recognition points and a heat sink having openings, and placing the heat sink on the substrate with the recognition points being exposed through the openings; using a checking system to inspect the recognition points through the openings so as to ensure that the heat sink is placed at a predetermined position on the substrate; and attaching the heat sink to the substrate via an adhesive. By the above semiconductor package and method, there is no need to form positioning holes in the substrate such that any adverse effect on the circuit layout and reliability of the semiconductor package is avoided, and any positional shifting of the heat sink relative to the substrate can be determined in a real time manner.

摘要翻译： 提供半导体封装及其制造方法。 该方法包括提供具有识别点的基板和具有开口的散热器，并且将散热器放置在基板上，识别点通过开口露出; 使用检查系统通过开口检查识别点，以确保散热器被放置在基板上的预定位置; 以及通过粘合剂将散热器附接到基板。 通过上述半导体封装和方法，不需要在衬底中形成定位孔，从而避免对半导体封装的电路布局和可靠性的任何不利影响，并且散热片相对于衬底的任何位置偏移可以 以实时的方式确定。

公开(公告)号：US20070145561A1

公开(公告)日：2007-06-28

申请号：US11643147

申请日：2006-12-20

申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

IPC分类号： H01L23/02

CPC分类号： H01L23/3121 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/3025 ,  H05K3/284 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/0989 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00

摘要： An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.

摘要翻译： 提供电子载体板及其封装结构。 电子载板包括载体，形成在载体上的至少一对接合焊盘和覆盖载体的保护层。 保护层形成有用于暴露接合焊盘的开口。 在成对的接合焊盘之间形成有一个沟槽，其长度大于安装在成对接合焊盘上的电子部件的宽度。 该沟槽与一对接合焊盘相邻，并与该接合焊盘露出的相应的一个开口连通。 因此，电子部件和电子载体板之间的间隙可以有效地填充用于封装电子部件的绝缘树脂，从而防止成对焊盘之间的空隙和不期望的电桥发生。

公开(公告)号：US20070138632A1

公开(公告)日：2007-06-21

申请号：US11642439

申请日：2006-12-19

申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/34

CPC分类号： H05K3/3452 ,  H05K3/284 ,  H05K3/303 ,  H05K2201/0989 ,  H05K2201/10636 ,  H05K2201/10727 ,  H05K2201/2036 ,  Y02P70/611 ,  Y02P70/613

摘要： An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. An opening is formed in the protective layer to expose at least three sides of each of the paired bond pads. The protective layer includes at least one independent residual portion located in the opening and between the paired bond pads, such that an electronic component is mounted on the independent residual portion and electrically connected to the bond pads. A groove without a dead space is formed between the electronic component and the carrier, such that a molding compound for encapsulating the electronic component can flow through the groove to fill the opening and a space under the electronic component and encapsulate the at least three sides of each of the bond pads.

摘要翻译： 提供电子载体板及其封装结构。 电子载板包括载体，形成在载体上的至少一对接合焊盘和覆盖载体的保护层。 在保护层中形成开口以暴露每个配对接合焊盘的至少三个侧面。 保护层包括至少一个独立的残留部分，位于开口内和成对的接合焊盘之间，使得电子部件安装在独立的残留部分上并电连接到接合焊盘。 在电子部件和载体之间形成没有死空间的凹槽，使得用于封装电子部件的模制化合物可以流过凹槽以填充开口和电子部件下方的空间，并将至少三个侧面 每个接合垫。

公开(公告)号：US07173828B2

公开(公告)日：2007-02-06

申请号：US10674317

申请日：2003-09-29

申请人： Ying-Ren Lin ,  Chih-Ming Huang ,  Ho-Yi Tsai

发明人： Ying-Ren Lin ,  Chih-Ming Huang ,  Ho-Yi Tsai

IPC分类号： H05K1/11

CPC分类号： H05K1/111 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/17 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16106 ,  H01L2224/16237 ,  H01L2224/17051 ,  H01L2224/17106 ,  H01L2924/01087 ,  H01L2924/15311 ,  H05K3/284 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/093 ,  H05K2201/09381 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2224/17104 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A ground pad structure for preventing solder extrusion and a semiconductor package having the ground pad structure are disclosed, wherein the ground pad structure has the ground pads located along the circumference of its ground plane be formed in a non-solder mask defined manner. Accordingly, a good grounding quality is maintained, and the occurrence of the electrical bridging among the adjacent conductive traces can be avoided as the extrusion of the molten solder bumps from the ground pads located along the ground pad structure's circumference toward their adjacent conductive traces is effectively prevented.

摘要翻译： 公开了一种用于防止焊料挤出的接地焊盘结构和具有接地焊盘结构的半导体封装，其中接地焊盘结构具有沿其接地平面的圆周定位的接地焊盘以非阻焊掩模定义的方式形成。 因此，保持良好的接地质量，并且可以避免相邻导电迹线之间的电桥接的发生，因为熔融焊料凸块从沿着接地焊盘结构的圆周朝向其相邻导电迹线的接地焊盘的挤出是有效的 防止了

公开(公告)号：US07164210B2

公开(公告)日：2007-01-16

申请号：US11026880

申请日：2004-12-29

申请人： Ho-Yi Tsai ,  Chien-Ping Huang

发明人： Ho-Yi Tsai ,  Chien-Ping Huang

IPC分类号： H01L23/28 ,  H01L21/50

CPC分类号： H01L23/4334 ,  H01L23/3128 ,  H01L23/4951 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0401

摘要： A semiconductor package with a heat sink and a method for fabricating the same are proposed. The heat sink is provided with a rigid and thermally resistant detach member on a top surface thereof, and is attached via its bottom surface to a chip mounted on a chip carrier. The detach member is sized larger than the heat sink and can be easily removed from the top surface of the heat sink. Subsequently, a molding process is performed to form an encapsulant for completely encapsulating the chip, the heat sink and the detach member. Then, a singulation process is performed to cut along predetermined cutting lines located between sides of the heat sink and corresponding sides of the detach member. Finally, the detach member and a portion of the encapsulant formed on the detach member are removed from the heat sink. The above fabrication method reduces the packaging cost.

摘要翻译： 提出了具有散热器的半导体封装及其制造方法。 散热器在其顶表面上设置有刚性和耐热的分离构件，并且经由其底表面附接到安装在芯片载体上的芯片。 分离构件的尺寸大于散热器，并且可以容易地从散热器的顶表面去除。 随后，进行模制处理以形成用于完全封装芯片，散热器和分离构件的密封剂。 然后，进行切割处理，以沿着位于散热片的侧面和分离构件的相应侧面之间的预定切割线切割。 最后，分离构件和形成在分离构件上的密封剂的一部分从散热器移除。 上述制造方法降低了包装成本。

公开(公告)号：US07129119B2

公开(公告)日：2006-10-31

申请号：US11049054

申请日：2005-02-01

申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang

发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang

IPC分类号： H01L21/50

CPC分类号： H01L21/4846 ,  H01L21/50 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/4334 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012

摘要： A method for fabricating semiconductor packages is proposed. A plurality of substrates are prepared each having a chip thereon. Length and width of each substrate are equal to predetermined length and width of the semiconductor package. A carrier having a plurality of openings is prepared. A protruded portion is formed at each corner of each opening, wherein a distance between two diagonal protruded portions is slightly larger than that between two diagonal corners of the substrate. The substrates are fixed in the openings of the carrier by means of the protruded portions, and gaps between the substrates and the carrier are sealed. An encapsulant is formed over each opening to encapsulate the corresponding chip by a molding process. An area on the carrier covered by the encapsulant is larger in length and width than the opening. A plurality of the semiconductor packages are formed after performing mold-releasing and singulation processes.

摘要翻译： 提出了制造半导体封装的方法。 准备了各自具有芯片的多个基板。 每个基片的长度和宽度等于半导体封装的预定长度和宽度。 制备具有多个开口的载体。 在每个开口的每个角部处形成突出部分，其中两个对角线突出部分之间的距离略大于基板的两个对角线之间的距离。 基板通过突出部固定在载体的开口中，基板和载体之间的间隙被密封。 在每个开口上形成密封剂，以通过模制工艺封装相应的芯片。 由密封剂覆盖的载体上的区域的长度和宽度大于开口的宽度。 在进行脱模和切割处理之后形成多个半导体封装。

公开(公告)号：US20050023704A1

公开(公告)日：2005-02-03

申请号：US10674317

申请日：2003-09-29

申请人： Ying-Ren Lin ,  Chih-Ming Huang ,  Ho-Yi Tsai

发明人： Ying-Ren Lin ,  Chih-Ming Huang ,  Ho-Yi Tsai

IPC分类号： H01L23/498 ,  H01L23/50 ,  H05K1/11 ,  H05K3/28 ,  H05K3/34 ,  H05K7/14 ,  H01L23/48

CPC分类号： H05K1/111 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/17 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16106 ,  H01L2224/16237 ,  H01L2224/17051 ,  H01L2224/17106 ,  H01L2924/01087 ,  H01L2924/15311 ,  H05K3/284 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/093 ,  H05K2201/09381 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2224/17104 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A ground pad structure for preventing solder extrusion and a semiconductor package having the ground pad structure are disclosed, wherein the ground pad structure has the ground pads located along the circumference of its ground plane be formed in a non-solder mask defined manner. Accordingly, a good grounding quality is maintained, and the occurrence of the electrical bridging among the adjacent conductive traces can be avoided as the extrusion of the molten solder bumps from the ground pads located along the ground pad structure's circumference toward their adjacent conductive traces is effectively prevented.

摘要翻译： 公开了一种用于防止焊料挤出的接地焊盘结构和具有接地焊盘结构的半导体封装，其中接地焊盘结构具有沿其接地平面的圆周定位的接地焊盘以非阻焊掩模定义的方式形成。 因此，保持良好的接地质量，并且可以避免相邻导电迹线之间的电桥接的发生，因为熔融焊料凸块从沿着接地焊盘结构的圆周朝向其相邻导电迹线的接地焊盘的挤出是有效的 防止了

公开(公告)号：US08420521B2

公开(公告)日：2013-04-16

申请号：US12955256

申请日：2010-11-29

申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/44

CPC分类号： H01L25/105 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/73 ,  H01L25/50 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01077 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A stack structure of semiconductor packages and a method for fabricating the stack structure are provided. A plurality of electrical connection pads and dummy pads are formed on a surface of a substrate of an upper semiconductor package and at positions corresponding to those around an encapsulant of a lower semiconductor package. Solder balls are implanted to the electrical connection pads and the dummy pads. The upper semiconductor package is mounted on the lower semiconductor package. The upper semiconductor package is electrically connected to the lower semiconductor package by the solder balls implanted to the electrical connection pads, and the encapsulant of the lower semiconductor package is surrounded and confined by the solder balls implanted to the dummy pads. Thereby, the upper semiconductor package is properly and securely positioned on the lower semiconductor package, without the occurrence of misalignment between the upper and lower semiconductor packages.

摘要翻译： 提供半导体封装的堆叠结构以及制造叠层结构的方法。 在上半导体封装的衬底的表面上和与下半导体封装的密封剂周围的位置对应的位置处形成多个电连接焊盘和虚拟焊盘。 将焊球植入电连接焊盘和虚拟焊盘。 上半导体封装安装在下半导体封装上。 上半导体封装通过注入电连接焊盘的焊球电连接到下半导体封装，并且下半导体封装的密封剂被植入到虚拟焊盘中的焊球围绕并限制。 因此，上半导体封装被适当且牢固地定位在下半导体封装上，而不会发生上下半导体封装之间的未对准。

公开(公告)号：US20110287587A1

公开(公告)日：2011-11-24

申请号：US13195617

申请日：2011-08-01

申请人： Min-Shun Hung ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Min-Shun Hung ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/52

CPC分类号： H01L23/4334 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/4824 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2224/0401 ,  H01L2224/45099

摘要： A heat dissipation package structure and method for fabricating the same are disclosed, which includes mounting and electrically connecting a semiconductor chip to a chip carrier through its active surface; mounting a heat dissipation member having a heat dissipation section and a supporting section on the chip carrier such that the semiconductor chip can be received in the space formed by the heat dissipation section and the supporting section, wherein the heat dissipation section has an opening formed corresponding to the semiconductor chip; forming an encapsulant to encapsulate the semiconductor chip, and the heat dissipation member; and thinning the encapsulant to remove the encapsulant formed on the semiconductor chip to expose inactive surface of the semiconductor chip and the top surface of the heat dissipation section from the encapsulant. Therefore, the heat dissipation package structure is fabricated through simplified fabrication steps at low cost, and also the problem that the chip is easily damaged in a package molding process of the prior art is overcome.

摘要翻译： 公开了一种散热封装结构及其制造方法，其包括通过其有源表面安装和电连接半导体芯片到芯片载体; 将具有散热部和支撑部的散热部件安装在所述芯片载体上，使得所述半导体芯片能够容纳在由所述散热部和所述支撑部形成的空间中，其中，所述散热部具有对应的开口 到半导体芯片; 形成密封剂以封装半导体芯片和散热构件; 并且使所述密封剂变薄以除去形成在所述半导体芯片上的所述密封剂，以从所述密封剂暴露所述半导体芯片的无效表面和所述散热部分的顶表面。 因此，通过以低成本的简化的制造步骤制造散热封装结构，并且克服了在现有技术的封装成型工艺中芯片容易损坏的问题。