公开(公告)号：US09355905B2

公开(公告)日：2016-05-31

申请号：US14722672

申请日：2015-05-27

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Pezhman Monadgemi ,  Michael Newman ,  Charles G. Woychik ,  Terrence Caskey

IPC: H01L21/768 ,  H01L21/78 ,  H01L21/56 ,  H01L23/48 ,  H01L21/3105 ,  H01L21/683 ,  H01L23/00

CPC classification number: H01L21/76898 ,  H01L21/31053 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/768 ,  H01L21/76841 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/481 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2924/0002 ,  H01L2924/12042 ,  H01L2924/00

Abstract: Methods of forming a microelectronic assembly and the resulting structures and devices are disclosed herein. In one embodiment, a method of forming a microelectronic assembly includes removing material exposed at portions of a surface of a substrate to form a processed substrate having a plurality of thinned portions separated by integral supporting portions of the processed substrate having a thickness greater than a thickness of the thinned portions, at least some of the thinned portions including a plurality of electrically conductive interconnects extending in a direction of the thicknesses of the thinned portions and exposed at the surface; and removing the supporting portions of the substrate to sever the substrate into a plurality of individual thinned portions, at least some individual thinned portions including the interconnects.

公开(公告)号：US09237648B2

公开(公告)日：2016-01-12

申请号：US13776035

申请日：2013-02-25

Applicant: Invensas Corporation

Inventor： Michael Newman ,  Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Pezhman Monadgemi ,  Terrence Caskey

IPC: H05K7/10 ,  H05K7/12 ,  H05K1/11 ,  H05K3/40 ,  H01L23/14 ,  H01L23/498 ,  H01L21/48

CPC classification number: H01L21/486 ,  H01L23/147 ,  H01L23/49827 ,  H01L2224/13 ,  H01L2224/16225 ,  H05K1/111 ,  H05K3/0014 ,  H05K3/4038 ,  Y10T29/49117

Abstract: An interposer has conductive elements at a first side and terminals at a second side opposite therefrom, for connecting with a microelectronic element and a second component, respectively. The component includes a first element having a thermal expansion coefficient less than 10 ppm/° C., and an insulating second element, with a plurality of openings extending from the second side through the second element towards the first element. A conductive structure extending through the openings in the second element and through the first element electrically connects the terminals with the conductive elements.

Abstract translation: 插入件在第一侧具有导电元件，在与其相对的第二侧具有端子，用于分别与微电子元件和第二元件连接。 该组件包括具有小于10ppm /℃的热膨胀系数的第一元件和绝缘的第二元件，多个开口从第二侧延伸穿过第二元件朝向第一元件。 延伸穿过第二元件中的开口并通过第一元件的导电结构将端子与导电元件电连接。

公开(公告)号：US20140175654A1

公开(公告)日：2014-06-26

申请号：US13722365

申请日：2012-12-20

Applicant: INVENSAS CORPORATION

Inventor： Belgacem Haba ,  Fatima Lina Ayatollahi ,  Michael Newman ,  Pezhman Monadgemi

IPC: H01L23/48 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/50 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Microelectronic elements and methods of their manufacture are disclosed. A microelectronic element may include a substrate including an opening extending through a semiconductor region of the substrate, a dielectric layer cover a wall of the opening within at least a first portion of the opening, a first metal disposed within the first portion of the opening, a second metal disposed within a second portion of the opening. The second metal may form at least part of a contact of the microelectronic element.

Abstract translation: 公开了微电子元件及其制造方法。 微电子元件可以包括：衬底，其包括延伸穿过衬底的半导体区域的开口;电介质层覆盖开口的至少第一部分内的开口的壁;布置在开口的第一部分内的第一金属， 设置在开口的第二部分内的第二金属。 第二金属可以形成微电子元件的接触的至少一部分。

公开(公告)号：US20170365546A1

公开(公告)日：2017-12-21

申请号：US15626687

申请日：2017-06-19

Applicant: Invensas Corporation

Inventor： Cyprian Emeka Uzoh ,  Pezhman Monadgemi ,  Terrence Caskey ,  Fatima Lina Ayatollahi ,  Belgacem Haba ,  Charles G. Woychik ,  Michael Newman

IPC: H01L23/498 ,  H01L23/48 ,  H01L23/367 ,  H01L21/768 ,  H01L23/373 ,  H01L23/36

CPC classification number: H01L23/49827 ,  H01L21/76829 ,  H01L21/76898 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/481 ,  H01L23/49838 ,  H01L23/49866 ,  H01L2924/00 ,  H01L2924/0002

Abstract: An interconnect element includes a semiconductor or insulating material layer that has a first thickness and defines a first surface; a thermally conductive layer; a plurality of conductive elements; and a dielectric coating. The thermally conductive layer includes a second thickness of at least 10 microns and defines a second surface of the interconnect element. The plurality of conductive elements extend from the first surface of the interconnect element to the second surface of the interconnect element. The dielectric coating is between at least a portion of each conductive element and the thermally conductive layer.

公开(公告)号：US09312175B2

公开(公告)日：2016-04-12

申请号：US13722365

申请日：2012-12-20

Applicant: Invensas Corporation

Inventor： Belgacem Haba ,  Fatima Lina Ayatollahi ,  Michael Newman ,  Pezhman Monadgemi

IPC: H01L21/768 ,  H01L23/50 ,  H01L23/522 ,  H01L23/48

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L23/50 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Microelectronic elements and methods of their manufacture are disclosed. A microelectronic element may include a substrate including an opening extending through a semiconductor region of the substrate, a dielectric layer cover a wall of the opening within at least a first portion of the opening, a first metal disposed within the first portion of the opening, a second metal disposed within a second portion of the opening. The second metal may form at least part of a contact of the microelectronic element.

Abstract translation: 公开了微电子元件及其制造方法。 微电子元件可以包括：衬底，其包括延伸穿过衬底的半导体区域的开口;电介质层覆盖开口的至少第一部分内的开口的壁;布置在开口的第一部分内的第一金属， 设置在开口的第二部分内的第二金属。 第二金属可以形成微电子元件的接触的至少一部分。

公开(公告)号：US20160079214A1

公开(公告)日：2016-03-17

申请号：US14952064

申请日：2015-11-25

Applicant: Invensas Corporation

Inventor： Terrence Caskey ,  Ilyas Mohammed ,  Cyprian Uzoh ,  Charles G. Woychik ,  Michael Newman ,  Pezhman Monadgemi ,  Reynaldo Co ,  Ellis Chau ,  Belgacem Haba

IPC: H01L25/10 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L25/105 ,  H01L21/486 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0655 ,  H01L2224/02379 ,  H01L2224/04042 ,  H01L2224/16225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45664 ,  H01L2224/48091 ,  H01L2224/48108 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2224/73257 ,  H01L2225/1023 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/381 ,  H05K1/0298 ,  H05K3/46 ,  Y10T29/49126 ,  Y10T29/49162 ,  H01L2924/00012 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: A method for making an interposer includes forming a plurality of wire bonds bonded to one or more first surfaces of a first element. A dielectric encapsulation is formed contacting an edge surface of the wire bonds which separates adjacent wire bonds from one another. Further processing comprises removing at least portions of the first element, wherein the interposer has first and second opposite sides separated from one another by at least the encapsulation, and the interposer having first contacts and second contacts at the first and second opposite sides, respectively, for electrical connection with first and second components, respectively, the first contacts being electrically connected with the second contacts through the wire bonds.

Abstract translation: 制造插入件的方法包括形成结合到第一元件的一个或多个第一表面的多个引线键合。 形成电介质封装，其接触将引线接合部彼此分隔开的引线接合的边缘表面。 进一步的处理包括去除第一元件的至少一部分，其中插入件具有通过至少封装相互隔开的第一和第二相对侧，并且插入件分别在第一和第二相对侧具有第一接触和第二接触， 分别与第一和第二部件电连接，第一触点通过引线键与第二触点电连接。

公开(公告)号：US09099482B2

公开(公告)日：2015-08-04

申请号：US14323329

申请日：2014-07-03

Applicant: Invensas Corporation

Inventor： Pezhman Monadgemi

IPC: H01L21/304 ,  H01L23/00 ,  H01L21/311 ,  H01L21/768 ,  H01L21/78

CPC classification number: H01L23/562 ,  H01L21/304 ,  H01L21/31133 ,  H01L21/76898 ,  H01L21/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of processing a device substrate are disclosed herein. In one embodiment, a method of processing a device substrate can include bonding a first surface of a device substrate to a carrier with a polymeric material. The device substrate may have a plurality of first openings extending from the first surface towards a second surface of the device substrate opposite from the first surface. Then, material can be removed at the second surface of the device substrate, wherein at least some of the first openings communicate with the second surface at least one of before or after performing the removal of the material. Then, at least a portion of the polymeric material disposed between the first surface and the carrier substrate can be exposed to a substance through at least some first openings to debond the device substrate from the carrier substrate.

Abstract translation: 本文公开了处理器件衬底的方法。 在一个实施例中，处理器件衬底的方法可以包括将器件衬底的第一表面与聚合物材料接合到载体上。 器件衬底可以具有多个第一开口，从第一表面延伸到与第一表面相对的器件衬底的第二表面。 然后，可以在器件基板的第二表面处去除材料，其中至少一些第一开口在进行材料去除之前或之后与第二表面连通。 然后，设置在第一表面和载体衬底之间的聚合物材料的至少一部分可以通过至少一些第一开口暴露于物质，以使器件衬底从载体衬底脱离。

公开(公告)号：US20150014688A1

公开(公告)日：2015-01-15

申请号：US14500858

申请日：2014-09-29

Applicant: Invensas Corporation

Inventor： Charles G. Woychik ,  Se Young Yang ,  Pezhman Monadgemi ,  Terrence Caskey

IPC: H01L21/66 ,  H01L23/00

CPC classification number: H01L22/32 ,  G01R31/2886 ,  H01L21/6835 ,  H01L22/14 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/04 ,  H01L25/0652 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2221/68331 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/11015 ,  H01L2224/11849 ,  H01L2224/13014 ,  H01L2224/13082 ,  H01L2224/14131 ,  H01L2224/14135 ,  H01L2224/16111 ,  H01L2224/16112 ,  H01L2224/16146 ,  H01L2224/16147 ,  H01L2224/16237 ,  H01L2224/16257 ,  H01L2224/16267 ,  H01L2224/16503 ,  H01L2224/17051 ,  H01L2224/8109 ,  H01L2224/81138 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00011 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/12 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/81805

Abstract: A method of attaching a microelectronic element to a substrate can include aligning the substrate with a microelectronic element, the microelectronic element having a plurality of spaced-apart electrically conductive bumps each including a bond metal, and reflowing the bumps. The bumps can be exposed at a front surface of the microelectronic element. The substrate can have a plurality of spaced-apart recesses extending from a first surface thereof. The recesses can each have at least a portion of one or more inner surfaces that are non-wettable by the bond metal of which the bumps are formed. The reflowing of the bumps can be performed so that at least some of the bond metal of each bump liquefies and flows at least partially into one of the recesses and solidifies therein such that the reflowed bond material in at least some of the recesses mechanically engages the substrate.

Abstract translation: 将微电子元件附接到衬底的方法可以包括将衬底与微电子元件对准，微电子元件具有多个间隔开的导电凸块，每个包括接合金属，并且回流凸块。 凸起可以暴露在微电子元件的前表面处。 衬底可以具有从其第一表面延伸的多个间隔开的凹部。 这些凹部各自可以具有一个或多个内表面的至少一部分，该内表面不被其形成凸起的粘结金属润湿。 可以进行凸块的回流，使得每个凸块的至少一些粘结金属液化并且至少部分地流入其中一个凹部并在其中固化，使得至少一些凹部中的回流焊接材料机械地接合 基质。

公开(公告)号：US20140240938A1

公开(公告)日：2014-08-28

申请号：US13776035

申请日：2013-02-25

Applicant: INVENSAS CORPORATION

Inventor： Michael Newman ,  Cyprian Emeka Uzoh ,  Charles G. Woychik ,  Pezhman Monadgemi ,  Terrence Caskey

IPC: H05K1/11 ,  H05K3/40

CPC classification number: H01L21/486 ,  H01L23/147 ,  H01L23/49827 ,  H01L2224/13 ,  H01L2224/16225 ,  H05K1/111 ,  H05K3/0014 ,  H05K3/4038 ,  Y10T29/49117

Abstract: An interposer can have conductive elements at a first side and terminals at a second side opposite therefrom, for connecting with a microelectronic element and a second component, respectively. The component can include a first element having a thermal expansion coefficient less than 10 ppm/° C., and an insulating second element, with a plurality of openings extending from the second side through the second element towards the first element. Conductive structure extending through the openings in the second element and through the first element electrically connects the terminals with the conductive elements.

Abstract translation: 插入件可以在第一侧具有导电元件，并且在与其相对的第二侧具有端子，用于分别与微电子元件和第二元件连接。 该组件可以包括具有小于10ppm /℃的热膨胀系数的第一元件和绝缘的第二元件，其中多个开口从第二侧延伸穿过第二元件朝向第一元件。 延伸穿过第二元件中的开口并通过第一元件的导电结构将端子与导电元件电连接。

公开(公告)号：US20140179099A1

公开(公告)日：2014-06-26

申请号：US13724223

申请日：2012-12-21

Applicant: INVENSAS CORPORATION

Inventor： Cyprian Emeka Uzoh ,  Pezhman Monadgemi ,  Michael Newman ,  Charles G. Woychik ,  Terrence Caskey

IPC: H01L21/768

CPC classification number: H01L21/76898 ,  H01L21/31053 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/768 ,  H01L21/76841 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/481 ,  H01L24/94 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2924/0002 ,  H01L2924/12042 ,  H01L2924/00

Abstract: Methods of forming a microelectronic assembly and the resulting structures and devices are disclosed herein. In one embodiment, a method of forming a microelectronic assembly includes removing material exposed at portions of a surface of a substrate to form a processed substrate having a plurality of thinned portions separated by integral supporting portions of the processed substrate having a thickness greater than a thickness of the thinned portions, at least some of the thinned portions including a plurality of electrically conductive interconnects extending in a direction of the thicknesses of the thinned portions and exposed at the surface; and removing the supporting portions of the substrate to sever the substrate into a plurality of individual thinned portions, at least some individual thinned portions including the interconnects.

Abstract translation: 本文公开了形成微电子组件的方法以及所得到的结构和装置。 在一个实施例中，形成微电子组件的方法包括去除在衬底的表面的部分处暴露的材料，以形成经处理的衬底，该衬底具有多个由处理衬底的整体支撑部分分隔开的薄化部分，该部分的厚度大于厚度 减薄部分中的至少一些薄化部分包括在薄壁部分的厚度方向上延伸并在表面露出的多个导电互连件; 以及去除衬底的支撑部分以将衬底切割成多个单独的薄化部分，至少一些单独的变薄部分，包括互连。