公开(公告)号：US20160380079A1

公开(公告)日：2016-12-29

申请号：US15261308

申请日：2016-09-09

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Gordon M. GRIVNA

IPC: H01L29/66 ,  H01L29/423 ,  H01L29/417 ,  H01L29/78 ,  H01L29/40

CPC classification number: H01L29/66666 ,  H01L29/407 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/513 ,  H01L29/66621 ,  H01L29/66636 ,  H01L29/66734 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/7834 ,  H01L29/7835

Abstract: In one embodiment, a semiconductor device is formed to include a gate structure extending into a semiconductor material that is underlying a first region of semiconductor material. The gate structure includes a conductor and also a gate insulator that has a first portion positioned between the gate conductor and a first portion of the semiconductor material that underlies the gate conductor. The first portion of the semiconductor material is configured to form a channel region of the transistor which underlies the gate conductor. The gate structure may also include a shield conductor overlying the gate conductor and having a shield insulator between the shield conductor and the gate conductor. The shield insulator may also have a second portion positioned between the shield conductor and a second portion of the gate insulator and a third portion overlying the shield conductor.

Abstract translation: 在一个实施例中，半导体器件形成为包括延伸到半导体材料中的栅极结构，该半导体材料位于半导体材料的第一区域下方。 栅极结构包括导体和栅极绝缘体，栅极绝缘体具有位于栅极导体与栅极导体之下的半导体材料的第一部分之间的第一部分。 半导体材料的第一部分被配置为形成在栅极导体下面的晶体管的沟道区。 栅极结构还可以包括覆盖栅极导体并且在屏蔽导体和栅极导体之间​​具有屏蔽绝缘体的屏蔽导体。 屏蔽绝缘体还可以具有位于屏蔽导体和栅极绝缘体的第二部分之间的第二部分和覆盖屏蔽导体的第三部分。

公开(公告)号：US20160322969A1

公开(公告)日：2016-11-03

申请号：US15133644

申请日：2016-04-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Peter MOENS ,  Mihir MUDHOLKAR ,  Joe FULTON ,  Philip CELAYA ,  Stephen ST. GERMAIN ,  Chun-Li LIU ,  Jason MCDONALD ,  Alexander YOUNG ,  Ali SALIH

IPC: H03K17/687 ,  H01L25/11 ,  H01L29/778

CPC classification number: H01L29/747 ,  H01L21/8258 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/40 ,  H01L25/115 ,  H01L25/18 ,  H01L27/0629 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/205 ,  H01L29/404 ,  H01L29/4238 ,  H01L29/7416 ,  H01L29/742 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2224/0603 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2924/00014 ,  H03K17/6874 ,  H03K2017/6878 ,  H03K2217/0009 ,  H03K2217/0018 ,  H01L2224/37099

Abstract: A half-bridge circuit can include a high-side HEMT, a high-side switch transistor, a low-side HEMT, and a low-side switch transistor. The die substrates of the HEMTs can be coupled to the sources of their corresponding switch transistors. In another aspect, a packaged electronic device for a half-bridge circuit can have a design that can use shorter connectors that help to reduce parasitic inductance and resistance. In a further aspect, a packaged electronic device for a half-bridge circuit can include more than one connection along the bottom of the package allows less lead connections along the periphery of the packaged electronic device and can allow for a smaller package.

Abstract translation: 半桥电路可以包括高侧HEMT，高侧开关晶体管，低侧HEMT和低侧开关晶体管。 HEMT的管芯衬底可以耦合到其相应的开关晶体管的源极。 在另一方面，用于半桥电路的封装电子器件可以具有可以使用有助于减小寄生电感和电阻的较短连接器的设计。 在另一方面，用于半桥电路的封装电子设备可以包括沿着封装底部的多于一个的连接允许沿着封装的电子器件的周边的较少的引线连接并且可以允许较小的封装。

公开(公告)号：US20160322351A1

公开(公告)日：2016-11-03

申请号：US15133679

申请日：2016-04-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Peter MOENS ,  Balaji PADMANABHAN ,  Herbert DE VLEESCHOUWER ,  Prasad VENKATRAMAN

IPC: H01L27/088 ,  H01L29/423 ,  H01L29/40 ,  H01L29/778 ,  H01L29/20 ,  H01L29/205

CPC classification number: H01L29/747 ,  H01L21/8258 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/40 ,  H01L25/115 ,  H01L25/18 ,  H01L27/0629 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/205 ,  H01L29/404 ,  H01L29/4238 ,  H01L29/7416 ,  H01L29/742 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2224/0603 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2924/00014 ,  H03K17/6874 ,  H03K2017/6878 ,  H03K2217/0009 ,  H03K2217/0018 ,  H01L2224/37099

Abstract: An electronic device can include a bidirectional HEMT. In an aspect, the electronic device can include a pair of switch gate and blocking gate electrodes, wherein the switch gate electrodes are not electrically connected to the blocking gate electrodes, and the first blocking, first switch, second blocking, and second switch gate electrodes are on the same die. In another aspect, the electronic device can include shielding structures having different numbers of laterally extending portions. In a further aspect, the electronic device can include a gate electrode and a shielding structure, wherein a portion of the shielding structure defines an opening overlying the gate electrode.

Abstract translation: 电子设备可以包括双向HEMT。 一方面，电子设备可以包括一对开关栅极和阻挡栅电极，其中开关栅极电极不与阻挡栅电极电连接，并且第一阻塞，第一开关，第二阻断和第二开关栅电极 在同一个死亡。 在另一方面，电子设备可以包括具有不同数量的横向延伸部分的屏蔽结构。 在另一方面，电子设备可以包括栅电极和屏蔽结构，其中屏蔽结构的一部分限定了覆盖栅电极的开口。

公开(公告)号：US20160118490A1

公开(公告)日：2016-04-28

申请号：US14853720

申请日：2015-09-14

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Zia HOSSAIN ,  Chun-Li LIU ,  Jason MCDONALD ,  Ali SALIH ,  Alexander YOUNG

IPC: H01L29/778 ,  H01L27/02

CPC classification number: H01L27/0629 ,  H01L21/743 ,  H01L21/8258 ,  H01L23/3677 ,  H01L23/481 ,  H01L27/0255 ,  H01L27/0266 ,  H01L27/0688 ,  H01L29/1087 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/7783 ,  H01L29/861 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In one embodiment, a group III-V transistor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are disposed adjacent a major surface of the heterostructure and a control electrode is disposed between the first and second current carrying electrode. A clamping device is integrated with the group III-V transistor structure and is electrically connected to the first current carrying electrode a third electrode to provide a secondary current path during, for example, an electrical stress event.

Abstract translation: 在一个实施例中，III-V族晶体管结构包括设置在半导体衬底上的异质结构。 第一载流电极和第二载流电极邻近异质结构的主表面设置，并且控制电极设置在第一和第二载流电极之间。 钳位装置与III-V族晶体管结构集成，并且在第一电流承载电极处电连接第三电极，以在例如电应力事件期间提供次级电流路径。

公开(公告)号：US20160118379A1

公开(公告)日：2016-04-28

申请号：US14853729

申请日：2015-09-14

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Zia HOSSAIN ,  Chun-Li LIU ,  Woochul JEON ,  Jason MCDONALD

IPC: H01L27/06 ,  H01L23/535 ,  H01L29/872 ,  H01L29/778 ,  H01L29/205

CPC classification number: H01L27/0629 ,  H01L21/743 ,  H01L21/8258 ,  H01L23/3677 ,  H01L23/481 ,  H01L27/0255 ,  H01L27/0266 ,  H01L27/0688 ,  H01L29/1087 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/7783 ,  H01L29/861 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In one embodiment, a cascode rectifier structure includes a group III-V semiconductor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are disposed adjacent a major surface of the heterostructure and a control electrode is disposed between the first and second current carrying electrode. A rectifier device is integrated with the group III-V semiconductor structure and is electrically connected to the first current carrying electrode and to a third electrode. The control electrode is further electrically connected to the semiconductor substrate and the second current path is generally perpendicular to a primary current path between the first and second current carrying electrodes.

Abstract translation: 在一个实施例中，共源共栅整流器结构包括III-V族半导体结构，其包括设置在半导体衬底上的异质结构。 第一载流电极和第二载流电极邻近异质结构的主表面设置，并且控制电极设置在第一和第二载流电极之间。 整流器件与III-V族半导体结构集成，并与第一载流电极和第三电极电连接。 控制电极进一步电连接到半导体衬底，第二电流通路大致垂直于第一和第二载流电极之间的初级电流通路。

公开(公告)号：US20150340482A1

公开(公告)日：2015-11-26

申请号：US14814106

申请日：2015-07-30

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  John Michael PARSEY, JR. ,  Ali SALIH ,  Prasad VENKATRAMAN

IPC: H01L29/778 ,  H01L29/423 ,  H01L29/06

CPC classification number: H01L29/7783 ,  H01L21/845 ,  H01L27/0688 ,  H01L27/0886 ,  H01L27/1211 ,  H01L29/045 ,  H01L29/0615 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/402 ,  H01L29/404 ,  H01L29/407 ,  H01L29/4175 ,  H01L29/41791 ,  H01L29/42316 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/66795 ,  H01L29/778 ,  H01L29/7786 ,  H01L29/7787 ,  H01L29/7789 ,  H01L29/785 ,  H01L29/872

Abstract: In one embodiment, Group III-nitride materials are used to form a semiconductor device. A fin structure is formed in the Group III-nitride material, and a gate structure, source electrodes and drain electrodes are formed in spaced relationship to the fin structure. The fin structure provides both polar and semi-polar 2DEG regions. In one embodiment, the gate structure is configured to control current flow in the polar 2DEG region. Shield conductor layers are included above the gate structure and in spaced relationship with drain regions of the semiconductor device.

Abstract translation: 在一个实施例中，III族氮化物材料用于形成半导体器件。 在III族氮化物材料中形成翅片结构，并且栅极结构，源电极和漏电极形成为与翅片结构间隔开的关系。 鳍结构提供极性和半极性2DEG区域。 在一个实施例中，门结构被配置为控制极地2DEG区域中的电流。 屏蔽导体层包括在栅极结构之上并与半导体器件的漏极区间隔开。