公开(公告)号：US09490148B2

公开(公告)日：2016-11-08

申请号：US13628927

申请日：2012-09-27

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Hao Tseng ,  Ying-Hao Kuo ,  Kai-Feng Cheng ,  Hai-Ching Chen ,  Tien-I Bao

IPC: H01L33/00 ,  H01L21/02 ,  H01L21/18 ,  H01L31/12 ,  H01L21/56 ,  H01L29/06 ,  H01L23/31 ,  G02B6/138

CPC classification number: G02B6/132 ,  G02B6/122 ,  G02B6/136 ,  G02B6/138 ,  G02B2006/12104 ,  H01L21/48 ,  H01L21/56 ,  H01L21/563 ,  H01L23/3142 ,  H01L23/3192 ,  H01L29/06 ,  H01L2224/73204

Abstract: A structure comprises a substrate having a plateau region and a trench region, a reflecting layer formed over a top surface of the trench region, a first adhesion promoter layer formed over the reflecting layer, a bottom cladding layer deposited over the first adhesion promoter layer, a core layer formed over the bottom cladding layer and a top cladding layer formed over the core layer.

Abstract translation: 一种结构包括具有平台区和沟槽区的衬底，形成在沟槽区的顶表面上的反射层，形成在反射层上的第一粘附促进层，沉积在第一粘附促进层上的底包层， 形成在所述底部包层上的芯层和形成在所述芯层上的顶部覆层。

公开(公告)号：US09490133B2

公开(公告)日：2016-11-08

申请号：US13749119

申请日：2013-01-24

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wan-Yu Lee ,  Ying-Hao Kuo ,  Hai-Ching Chen ,  Tien-I Bao

IPC: H01L21/00 ,  H01L21/66 ,  G01R31/26 ,  H01L21/302 ,  H01L21/461 ,  H01L21/306 ,  H01L21/67 ,  H01L21/02 ,  H01L21/311

CPC classification number: H01L21/30604 ,  C09K13/04 ,  G01N21/33 ,  H01L21/0206 ,  H01L21/306 ,  H01L21/30608 ,  H01L21/31133 ,  H01L21/67075 ,  H01L21/67086 ,  H01L21/67253 ,  H01L22/20 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A system and method of etching a semiconductor device are provided. Etching solution is sampled and analyzed by a monitoring unit to determine a concentration of components within the etching solution, such as an oxidant concentration. Then, based upon such measurement, a makeup amount of the components may be added be a makeup unit to the etching solution to control the concentration of the components within the etching system.

Abstract translation: 提供了蚀刻半导体器件的系统和方法。 蚀刻溶液由监测单元取样和分析，以确定蚀刻溶液中组分的浓度，例如氧化剂浓度。 然后，基于这样的测量，可以将组分的补充量添加到蚀刻溶液中的化妆单元以控制蚀刻系统内的组分的浓度。

公开(公告)号：US09405063B2

公开(公告)日：2016-08-02

申请号：US13915300

申请日：2013-06-11

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jui Hsieh Lai ,  Tien-I Bao ,  Hai-Ching Chen ,  Ying-Hao Kuo

IPC: G02B6/124 ,  G02B6/34 ,  G02B6/12 ,  H01L31/0203 ,  G02B6/42

CPC classification number: G02B6/12002 ,  G02B6/12004 ,  G02B6/124 ,  G02B6/34 ,  G02B6/428 ,  G02B2006/12085 ,  G02B2006/12107 ,  G02B2006/12123 ,  H01L31/0203 ,  Y10T29/49826

Abstract: An integrated circuit includes a substrate, a metal grating disposed over the substrate, and a waveguide layer disposed over or under the metal grating. The metal grating is arranged to change a propagation direction of an optical signal and the waveguide layer is arranged to guide the optical signal to a desired direction.

Abstract translation: 集成电路包括衬底，设置在衬底上的金属光栅以及设置在金属光栅上或之下的波导层。 金属光栅被布置成改变光信号的传播方向，并且波导层被布置成将光信号引导到期望的方向。

公开(公告)号：US09330989B2

公开(公告)日：2016-05-03

申请号：US13631684

申请日：2012-09-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Yung-Hsu Wu ,  Shih-Kang Fu ,  Hsin-Chieh Yao ,  Hsiang-Huan Lee ,  Chung-Ju Lee ,  Hai-Ching Chen ,  Shau-Lin Shue

IPC: H01L21/4763 ,  H01L21/66 ,  H01L21/311 ,  H01L21/321 ,  H01L21/768

CPC classification number: H01L22/26 ,  H01L21/31144 ,  H01L21/3212 ,  H01L21/76811 ,  H01L21/76828 ,  H01L21/76835 ,  H01L21/7684 ,  H01L22/14

Abstract: A method for forming a field-effect transistor with a raised drain structure is disclosed. The method includes depositing a low-k inter-metal layer over a semiconductor substrate, depositing a porogen-containing low-k layer over the low-k inter-metal layer, and etching a space for the via through the low-k inter-metal layer and the porogen-containing low-k layer. The method further includes depositing a metal layer, a portion of the metal layer filling the space for the via, another portion of the metal layer being over the porogen-containing low-layer, removing the portion of the metal layer over the porogen-containing layer by a CMP process, and curing the porogen-containing low-k layer to form a cured low-k layer.

Abstract translation: 公开了一种形成具有升高的漏极结构的场效应晶体管的方法。 该方法包括在半导体衬底上沉积低k金属间层，在低k金属间层上沉积含致孔剂的低k层，并通过低k互隔层蚀刻通孔的空间， 金属层和含致孔剂的低k层。 该方法还包括沉积金属层，金属层的一部分填充用于通孔的空间，金属层的另一部分位于含致孔基原子的低层之上，在含致孔剂的层上除去金属层的一部分 通过CMP工艺层，并固化含致孔剂的低k层以形成固化的低k层。

公开(公告)号：US20150380321A1

公开(公告)日：2015-12-31

申请号：US14850532

申请日：2015-09-10

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Bo-Jiun Lin ,  Hai-Ching Chen ,  Hsin-Chieh Yao ,  Tien-I Bao

IPC: H01L21/66 ,  G01N21/88 ,  G01N21/956 ,  H01L21/027

CPC classification number: G03F9/7069 ,  G01N21/8806 ,  G01N21/956 ,  G01N2021/8822 ,  G01N2021/8825 ,  G01N2021/95676 ,  G01N2201/061 ,  G01N2201/06113 ,  G03F7/70633 ,  H01L21/027 ,  H01L22/12 ,  H01L22/20

Abstract: A method for fabricating a semiconductor structure includes providing a substrate and a first layer over the substrate, wherein the first layer includes one or more overlay marks. The method further includes forming one or more layers on the first layer and performing a dark field (DF) inspection on the one or more overlay marks underlying the one or more layers to receive a post-film-formation data.

Abstract translation: 一种用于制造半导体结构的方法包括在衬底上提供衬底和第一层，其中第一层包括一个或多个覆盖标记。 该方法还包括在第一层上形成一个或多个层，并对一个或多个层下面的一个或多个重叠标记执行暗场（DF）检查，以接收后期成膜数据。

公开(公告)号：US20150197849A1

公开(公告)日：2015-07-16

申请号：US14153738

申请日：2014-01-13

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsiang-Huan Lee ,  Shau-Lin Shue ,  Keith Kuang-Kuo Koai ,  Hai-Ching Chen ,  Tung-Ching Tseng ,  Wen-Cheng Yang ,  Chung-En Kao ,  Ming-Han Lee ,  Hsin-Yen Huang

IPC: C23C14/58 ,  H01L21/306 ,  H01L21/768 ,  H01L21/677 ,  C23C16/455 ,  C23C16/56 ,  C23C16/44 ,  H01L21/02 ,  C23C14/24

CPC classification number: H01L21/76846 ,  H01L21/02057 ,  H01L21/0206 ,  H01L21/02063 ,  H01L21/02631 ,  H01L21/2855 ,  H01L21/30604 ,  H01L21/3105 ,  H01L21/3212 ,  H01L21/67184 ,  H01L21/67207 ,  H01L21/677 ,  H01L21/67742 ,  H01L21/76802 ,  H01L21/76814 ,  H01L21/76825 ,  H01L21/76828 ,  H01L21/7684 ,  H01L21/76862 ,  H01L21/76871 ,  H01L21/76877

Abstract: Semiconductor device metallization systems and methods are disclosed. In some embodiments, a metallization system for semiconductor devices includes a mainframe, and a plurality of modules disposed proximate the mainframe. One of the plurality of modules comprises a physical vapor deposition (PVD) module and one of the plurality of modules comprises an ultraviolet light (UV) cure module.

Abstract translation: 公开了半导体器件金属化系统和方法。 在一些实施例中，用于半导体器件的金属化系统包括主机以及靠近主机设置的多个模块。 多个模块中的一个模块包括物理气相沉积（PVD）模块，并且多个模块中的一个模块包括紫外线（UV）固化模块。

公开(公告)号：US08922900B2

公开(公告)日：2014-12-30

申请号：US13747394

申请日：2013-01-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Hao Tseng ,  Ying-Hao Kuo ,  Hai-Ching Chen ,  Tien-I Bao

IPC: B05D5/06 ,  G02B3/00

CPC classification number: B05D5/06 ,  G02B3/00 ,  G02B3/0012 ,  G02B3/0043 ,  G02B6/136

Abstract: An optical element structure and a fabricating process for the same are provided. The optical element fabricating process includes providing a substrate forming thereon a protrusion; and forming an over coating layer over the protrusion and the substrate by a deposition scheme to form an optical element.

Abstract translation: 提供了一种光学元件结构及其制造方法。 光学元件制造工艺包括提供在其上形成突起的基板; 以及通过沉积方案在所述突起和所述基底之上形成覆盖层以形成光学元件。

公开(公告)号：US08847396B2

公开(公告)日：2014-09-30

申请号：US13744781

申请日：2013-01-18

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsin-Yen Huang ,  Yu-Sheng Chang ,  Hai-Ching Chen ,  Tien-I Bao

IPC: H01L23/48 ,  H01L21/4763 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L23/5329 ,  H01L21/7682 ,  H01L21/76835 ,  H01L23/528 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes receiving a precursor. A decomposable polymer layer (DPL) is deposited between the conductive features of the precursor. The DPL is annealed to form an ordered periodic pattern of different types of polymer nanostructures. One type of polymer nanostructure is decomposed by a first selectively to form a trench. The trench is filled by a dielectric layer to form a dielectric block. The remaining types of polymer nanostructures are decomposed by a second selectively etching to form nano-air-gaps.

Abstract translation: 公开了制造半导体集成电路（IC）的方法。 该方法包括接收前体。 可分解的聚合物层（DPL）沉积在前体的导电特征之间。 DPL被退火以形成不同类型的聚合物纳米结构的有序周期性图案。 一种类型的聚合物纳米结构被选择性地分解以形成沟槽。 沟槽由介电层填充以形成介质块。 剩余的聚合物纳米结构类型通过第二选择性蚀刻分解以形成纳米气隙。

公开(公告)号：US20140269805A1

公开(公告)日：2014-09-18

申请号：US13797999

申请日：2013-03-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Jui Hsieh Lai ,  Ying-Hao Kuo ,  Hai-Ching Chen ,  Tien-I Bao

IPC: H01S5/026

CPC classification number: H01S5/0267 ,  G02B6/421 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/15311 ,  H01L2924/181 ,  H01S5/02276 ,  H01S5/02284 ,  H01S5/02288 ,  H01S5/026 ,  H01S5/183 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An embodiment is a semiconductor device comprising an optical device over a first substrate, a vertical waveguide on a top surface of the optical device, the vertical waveguide having a first refractive index, and a capping layer over the vertical waveguide, the capping layer configured to be a lens for the vertical waveguide and the capping layer having a second refractive index.

Abstract translation: 一个实施例是一种半导体器件，包括在第一衬底上的光学器件，在光学器件的顶表面上的垂直波导，具有第一折射率的垂直波导和垂直波导上的覆盖层，所述封盖层被配置为 作为垂直波导的透镜和具有第二折射率的封盖层。

公开(公告)号：US20140206110A1

公开(公告)日：2014-07-24

申请号：US13749119

申请日：2013-01-24

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wan-Yu Lee ,  Ying-Hao Kuo ,  Hai-Ching Chen ,  Tien-I Bao

IPC: H01L21/66 ,  H01L21/306

CPC classification number: H01L21/30604 ,  C09K13/04 ,  G01N21/33 ,  H01L21/0206 ,  H01L21/306 ,  H01L21/30608 ,  H01L21/31133 ,  H01L21/67075 ,  H01L21/67086 ,  H01L21/67253 ,  H01L22/20 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A system and method of etching a semiconductor device are provided. Etching solution is sampled and analyzed by a monitoring unit to determine a concentration of components within the etching solution, such as an oxidant concentration. Then, based upon such measurement, a makeup amount of the components may be added be a makeup unit to the etching solution to control the concentration of the components within the etching system.

Abstract translation: 提供了蚀刻半导体器件的系统和方法。 蚀刻溶液由监测单元取样和分析，以确定蚀刻溶液中组分的浓度，例如氧化剂浓度。 然后，基于这样的测量，可以将组分的补充量添加到蚀刻溶液中的化妆单元以控制蚀刻系统内的组分的浓度。