公开(公告)号：US20120106086A1

公开(公告)日：2012-05-03

申请号：US12914171

申请日：2010-10-28

申请人： Ralf Schloerke ,  Thilo Stolze

发明人： Ralf Schloerke ,  Thilo Stolze

IPC分类号： H05K7/20 ,  H01L21/02 ,  H05K7/00

CPC分类号： H01L23/24 ,  H01L23/10 ,  H01L23/367 ,  H01L23/3735 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/34 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L25/072 ,  H01L2224/291 ,  H01L2224/29139 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48132 ,  H01L2224/48227 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/8384 ,  H01L2224/8584 ,  H01L2924/00014 ,  H01L2924/01068 ,  H01L2924/1301 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/181 ,  Y10T29/41 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A power semiconductor module includes a module housing with a sealing ring on its top side. The sealing ring, in co-operation with the module housing and a printed circuit board attached to the power semiconductor module, hermetically seals feed-through locations at the top side of the module housing for feeding through electric terminals of the power semiconductor module. On the bottom side of the module housing a sealing ring hermetically seals the bottom side of the module housing.

摘要翻译： 功率半导体模块包括在其顶侧具有密封环的模块壳体。 与模块壳体配合的密封环和连接到功率半导体模块的印刷电路板密封地密封模块壳体顶侧的馈通位置，以通过功率半导体模块的电端子供电。 在密封环的模块的底侧上，密封环密封模块壳体的底侧。

公开(公告)号：US20240178192A1

公开(公告)日：2024-05-30

申请号：US18522978

申请日：2023-11-29

申请人： Kioxia Corporation

发明人： Yasuo TAKEMOTO

IPC分类号： H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498

CPC分类号： H01L25/0657 ,  H01L23/315 ,  H01L23/49816 ,  H01L24/08 ,  H01L24/48 ,  H01L2224/08113 ,  H01L2224/08238 ,  H01L2224/48091 ,  H01L2224/48132 ,  H01L2224/48227 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/183

摘要： According to one embodiment, a semiconductor device includes a wiring substrate and a first semiconductor chip. The first semiconductor chip has a first surface facing the wiring substrate. The first surface has a groove. The groove extends across the first surface and divides the first surface into a first portion and a second portion. A first bonding layer is between the first portion of the first surface and the wiring substrate. A second bonding layer is between the second portion of the first surface and the wiring substrate. A second semiconductor chip is on the wiring substrate. The second semiconductor chip has a portion inside the groove of the first semiconductor chip. A third bonding layer is between the bottom of the groove and a second surface of the second semiconductor chip.

公开(公告)号：US20230420319A1

公开(公告)日：2023-12-28

申请号：US18211911

申请日：2023-06-20

申请人： Infineon Technologies AG

发明人： Qun YE ,  Stefan SCHWAB

IPC分类号： H01L23/29 ,  H01L21/56 ,  H01L23/00

CPC分类号： H01L23/295 ,  H01L23/296 ,  H01L21/56 ,  H01L24/48 ,  H01L24/06 ,  H01L2224/06181 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48132 ,  H01L2224/48225 ,  H01L2224/48245 ,  H01L2924/186 ,  H01L24/32 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L24/73 ,  H01L2224/73265

摘要： A semiconductor package encapsulant is enclosed. In one example, the semiconductor package encapsulant is for at least partially encapsulating a semiconductor component, wherein the semiconductor package encapsulant comprises metal activated inorganic filler particles providing a corrosion protection function.

公开(公告)号：US20170338186A1

公开(公告)日：2017-11-23

申请号：US15669273

申请日：2017-08-04

申请人： Siliconware Precision Industries Co., Ltd.

发明人： Fu-Tang Huang ,  Chun-Chi Ke

IPC分类号： H01L23/552 ,  H01L23/31 ,  H01L25/065 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00

CPC分类号： H01L23/552 ,  H01L21/56 ,  H01L23/3121 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/91 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/06133 ,  H01L2224/06135 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48132 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49052 ,  H01L2224/49107 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/92165 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06537 ,  H01L2225/06568 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/10162 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package is provided, including: a substrate; a first semiconductor element disposed on the substrate and having a first conductive pad grounded to the substrate; a conductive layer formed on the first semiconductor element and electrically connected to the substrate; a second semiconductor element disposed on the first semiconductor element through the conductive layer; and an encapsulant formed on the substrate and encapsulating the first and second semiconductor elements. Therefore, the first and second semiconductor elements are protected from electromagnetic interference (EMI) shielding with the conductive layer being connected to the grounding pad of the substrate. A fabrication method of the semiconductor package is also provided.

公开(公告)号：US09627337B2

公开(公告)日：2017-04-18

申请号：US14740286

申请日：2015-06-16

申请人： Novatek Microelectronics Corp.

发明人： Jung-Fu Hsu ,  Tai-Hung Lin ,  Chang-Tien Tsai

IPC分类号： H01L23/60 ,  H01L23/00 ,  H01L27/02

CPC分类号： H01L24/06 ,  H01L23/50 ,  H01L23/60 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L27/0248 ,  H01L27/0292 ,  H01L27/0296 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05088 ,  H01L2224/05095 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/0612 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48132 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/49113 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/2064 ,  H01L2924/30205 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/43

摘要： An integrated circuit device including a semiconductor substrate, a first bonding pad structure, a second bonding pad structure, and an internal bonding wire is provided. The first bonding pad structure is disposed on a surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The second bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The first bonding pad structure is electrically coupled to the second bonding pad structure via the internal bonding wire. The integrated circuit device having a better electrical performance is provided by eliminating internal resistance drop in power supply trails or ground trails, and improving signal integrity of the integrated circuit device.

公开(公告)号：US08921998B2

公开(公告)日：2014-12-30

申请号：US14236236

申请日：2012-08-24

申请人： Yusuke Zushi ,  Yoshinori Murakami ,  Satoshi Tanimoto ,  Shinji Sato ,  Kohei Matsui

发明人： Yusuke Zushi ,  Yoshinori Murakami ,  Satoshi Tanimoto ,  Shinji Sato ,  Kohei Matsui

IPC分类号： H01L23/10 ,  H01L23/34 ,  H01L23/538 ,  H01L23/373 ,  H01L23/00 ,  H01L25/07 ,  H01L23/498 ,  H01L25/18

CPC分类号： H01L23/5384 ,  H01L23/3735 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/48091 ,  H01L2224/48132 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor module has a pair of semiconductor devices, a heat sink, a first electrode, an output electrode and a second electrode. The semiconductor devices are connected in series with each other and have first terminals that are electrically connected to a first power system and a second terminal that is electrically connected to a second power system. The first electrode is electrically connected both to one of the first terminal and to an electrode of one of the semiconductor devices. The output electrode is electrically connected both to the second terminal and to an electrode of the other of the semiconductor device. The second electrode is electrically connected to the other of the first terminals. The second electrode is connected to the heat sink via a first insulating member. The output electrode is connected to the second electrode via a second insulating member.

摘要翻译： 半导体模块具有一对半导体器件，散热器，第一电极，输出电极和第二电极。 半导体器件彼此串联连接并且具有电连接到第一电力系统的第一端子和电连接到第二电力系统的第二端子。 第一电极电连接到第一端子中的一个和半导体器件中的一个的电极。 输出电极与第二端子和半导体器件的另一个的电极电连接。 第二电极与第一端子中的另一个电连接。 第二电极通过第一绝缘构件连接到散热器。 输出电极经由第二绝缘构件与第二电极连接。

公开(公告)号：US08836150B2

公开(公告)日：2014-09-16

申请号：US13989962

申请日：2010-11-29

申请人： Hiroaki Tanaka

发明人： Hiroaki Tanaka

IPC分类号： H01L23/498 ,  H01L23/00 ,  H01L29/739 ,  H01L29/417

CPC分类号： H01L23/498 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L29/417 ,  H01L29/41741 ,  H01L29/7397 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05557 ,  H01L2224/05624 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48132 ,  H01L2224/4847 ,  H01L2224/48491 ,  H01L2224/49175 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/3511 ,  H01L2224/45099 ,  H01L2924/00

摘要： A semiconductor device disclosed in this description has a semiconductor substrate including an element region in which a semiconductor element is formed, and an upper surface electrode formed on an upper surface of the element region of the semiconductor substrate. The upper surface electrode has a first thickness region and a second thickness region which is thicker than the first thickness region, and a bonding wire is bonded on the second thickness region.

摘要翻译： 在本说明书中公开的半导体器件具有包括其中形成半导体元件的元件区域和形成在半导体衬底的元件区域的上表面上的上表面电极的半导体衬底。 上表面电极具有比第一厚度区域厚的第一厚度区域和第二厚度区域，并且接合线接合在第二厚度区域上。

公开(公告)号：US20140191376A1

公开(公告)日：2014-07-10

申请号：US13855221

申请日：2013-04-02

申请人： SILICONWARE PRECISION INDUSTRIES CO., LTD.

发明人： Fu-Tang Huang ,  Chun-Chi Ke

IPC分类号： H01L23/552 ,  H01L21/02

CPC分类号： H01L23/552 ,  H01L21/56 ,  H01L23/3121 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/91 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/06133 ,  H01L2224/06135 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48132 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49052 ,  H01L2224/49107 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/92165 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06537 ,  H01L2225/06568 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/10162 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package is provided, including: a substrate; a first semiconductor element disposed on the substrate and having a first conductive pad grounded to the substrate; a conductive layer formed on the first semiconductor element and electrically connected to the substrate; a second semiconductor element disposed on the first semiconductor element through the conductive layer; and an encapsulant formed on the substrate and encapsulating the first and second semiconductor elements. Therefore, the first and second semiconductor elements are protected from electromagnetic interference (EMI) shielding with the conductive layer being connected to the grounding pad of the substrate. A fabrication method of the semiconductor package is also provided.

摘要翻译： 提供一种半导体封装，包括：基板; 第一半导体元件，其设置在所述基板上并具有与所述基板接地的第一导电焊盘; 导电层，其形成在所述第一半导体元件上并电连接到所述基板; 通过所述导电层设置在所述第一半导体元件上的第二半导体元件; 以及形成在所述基板上并封装所述第一和第二半导体元件的密封剂。 因此，第一和第二半导体元件被保护免受电磁干扰（EMI）屏蔽，导电层连接到衬底的接地衬垫。 还提供了半导体封装的制造方法。

公开(公告)号：US20140159225A1

公开(公告)日：2014-06-12

申请号：US14236236

申请日：2012-08-24

申请人： Yusuke Zushi ,  Yoshinori Murakami ,  Satoshi Tanimoto ,  Shinji Sato ,  Kohei Matsui

发明人： Yusuke Zushi ,  Yoshinori Murakami ,  Satoshi Tanimoto ,  Shinji Sato ,  Kohei Matsui

IPC分类号： H01L23/538

CPC分类号： H01L23/5384 ,  H01L23/3735 ,  H01L23/49811 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/48091 ,  H01L2224/48132 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/4846 ,  H01L2224/48472 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/1203 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor module has a pair of semiconductor devices, a heat sink, a first electrode, an output electrode and a second electrode. The semiconductor devices are connected in series with each other and have first terminals that are electrically connected to a first power system and a second terminal that is electrically connected to a second power system. The first electrode is electrically connected both to one of the first terminal and to an electrode of one of the semiconductor devices. The output electrode is electrically connected both to the second terminal and to an electrode of the other of the semiconductor device. The second electrode is electrically connected to the other of the first terminals. The second electrode is connected to the heat sink via a first insulating member. The output electrode is connected to the second electrode via a second insulating member.

摘要翻译： 半导体模块具有一对半导体器件，散热器，第一电极，输出电极和第二电极。 半导体器件彼此串联连接并且具有电连接到第一电力系统的第一端子和电连接到第二电力系统的第二端子。 第一电极电连接到第一端子中的一个和半导体器件中的一个的电极。 输出电极与第二端子和半导体器件的另一个的电极电连接。 第二电极与第一端子中的另一个电连接。 第二电极通过第一绝缘构件连接到散热器。 输出电极经由第二绝缘构件与第二电极连接。

公开(公告)号：US20130241084A1

公开(公告)日：2013-09-19

申请号：US13989962

申请日：2010-11-29

申请人： Hiroaki Tanaka

发明人： Hiroaki Tanaka

IPC分类号： H01L23/498

CPC分类号： H01L23/498 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L29/417 ,  H01L29/41741 ,  H01L29/7397 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05557 ,  H01L2224/05624 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48132 ,  H01L2224/4847 ,  H01L2224/48491 ,  H01L2224/49175 ,  H01L2224/85205 ,  H01L2924/00014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/3511 ,  H01L2224/45099 ,  H01L2924/00

摘要： A semiconductor device disclosed in this description has a semiconductor substrate including an element region in which a semiconductor element is formed, and an upper surface electrode formed on an upper surface of the element region of the semiconductor substrate. The upper surface electrode has a first thickness region and a second thickness region which is thicker than the first thickness region, and a bonding wire is bonded on the second thickness region.

摘要翻译： 在本说明书中公开的半导体器件具有包括其中形成半导体元件的元件区域和形成在半导体衬底的元件区域的上表面上的上表面电极的半导体衬底。 上表面电极具有比第一厚度区域厚的第一厚度区域和第二厚度区域，并且接合线接合在第二厚度区域上。