公开(公告)号：US08908386B2

公开(公告)日：2014-12-09

申请号：US13564483

申请日：2012-08-01

Applicant: Zhiwei Jiang ,  Xiaochen Chen ,  Zhipeng Guo

Inventor： Zhiwei Jiang ,  Xiaochen Chen ,  Zhipeng Guo

IPC: H05K7/10 ,  H05K1/11 ,  H05K1/14 ,  H05K3/22

CPC classification number: H05K1/111 ,  H05K1/112 ,  H05K1/141 ,  H05K3/225 ,  H05K2201/09072 ,  H05K2201/09381 ,  H05K2201/0939 ,  H05K2201/09663 ,  H05K2203/042 ,  Y02P70/611

Abstract: A printed circuit board assembly (PCBA) chip package component includes: a module board and an interface board. A first soldering pad is set on the bottom of the module board, a second soldering pad is set on top of the interface board, and the second soldering pad is of a castle-type structure. The first soldering pad includes a first soldering area, a second soldering area, and a connection bridge that connects the first soldering area and the second soldering area. The first soldering area corresponds to a top surface of the second soldering pad, and when the first soldering area is soldered to second soldering pad, the second soldering area is located outside the second soldering pad.

Abstract translation: 印刷电路板组件（PCBA）芯片封装组件包括：模块板和接口板。 第一个焊盘设置在模块板的底部，第二个焊盘设置在接口板的顶部，第二个焊盘为城堡式结构。 第一焊盘包括第一焊接区域，第二焊接区域和连接第一焊接区域和第二焊接区域的连接桥。 第一焊接区域对应于第二焊盘的顶表面，并且当第一焊接区域焊接到第二焊盘时，第二焊接区域位于第二焊盘的外部。

公开(公告)号：US08898613B2

公开(公告)日：2014-11-25

申请号：US14182821

申请日：2014-02-18

Applicant: Renesas Electronics Corporation

Inventor： Takafumi Betsui ,  Naoto Taoka ,  Motoo Suwa ,  Shigezumi Matsui ,  Norihiko Sugita ,  Yoshiharu Fukushima

IPC: G06F17/50 ,  G11C5/02 ,  G11C5/04 ,  G11C5/06 ,  H05K1/18 ,  H05K3/46 ,  H05K1/02

CPC classification number: G11C5/04 ,  G11C5/02 ,  G11C5/06 ,  G11C5/063 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/17 ,  H01L25/18 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/49175 ,  H01L2924/1432 ,  H01L2924/14361 ,  H01L2924/15311 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0237 ,  H05K1/181 ,  H05K3/4602 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/10159 ,  H05K2201/10522 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00

Abstract: A microcomputer provided on a rectangular semiconductor board has memory interface circuits. The memory interface circuits are separately disposed in such positions as to extend along the peripheries of the semiconductor board on both sides from one corner as a reference position. In this case, limitations to size reduction imposed on the semiconductor board can be reduced compared with a semiconductor board having memory interface circuits only on one side. Respective partial circuits on each of the separated memory interface circuits have equal data units associated with data and data strobe signals. Thus, the microcomputer has simplified line design on a mother board and on a module board.

公开(公告)号：US08835761B2

公开(公告)日：2014-09-16

申请号：US12602979

申请日：2008-03-07

Applicant: Takahiro Hayashi ,  Makoto Hora ,  Keiichi Miyajima

Inventor： Takahiro Hayashi ,  Makoto Hora ,  Keiichi Miyajima

IPC: H01J5/00 ,  H01J15/00 ,  H05K5/06 ,  H05K1/00 ,  H05K1/02

CPC classification number: H05K1/028 ,  H05K2201/09663 ,  H05K2203/1147

Abstract: To minimize thermal influence when integrally forming the sealing member on a flexible wiring board, a sealing structure includes a housing, a flexible wiring board inserted therethrough, and a sealing member integrally formed with the flexible wiring board to airtightly seal a gap between the housing and the flexible wiring board, the flexible wiring board includes a base substrate made of an elastic material, an electrically conductive printed wiring layer formed on a surface of the base substrate, and a cover film covering a surface of the printed wiring layer, and the printed wiring layer which crosses the sealing member is formed as a plurality of divided print wiring layers at only a crossing region with the sealing member and its vicinity.

Abstract translation: 为了在将密封构件整体形成在柔性布线板上时的热影响最小化，密封结构包括壳体，插入其中的柔性布线板以及与柔性布线板一体形成的密封构件，以密封地密封壳体和 柔性布线板，柔性布线板包括由弹性材料制成的基底基板，形成在基底基板的表面上的导电印刷布线层和覆盖印刷布线层的表面的覆盖膜，并且印刷 与密封构件交叉的布线层仅在与密封构件及其附近的交叉区域形成为多个分割印刷布线层。

公开(公告)号：US20140254108A1

公开(公告)日：2014-09-11

申请号：US13792092

申请日：2013-03-10

Applicant: QUALCOMM INCORPORATED

Inventor： Yang ZHANG ,  Jack B. STEENSTRA

IPC: H05K1/02 ,  H05K3/32 ,  H05K3/46 ,  H05K7/02

CPC classification number: H05K1/0298 ,  H05K1/0201 ,  H05K7/02 ,  H05K2201/09663 ,  H05K2201/09709 ,  H05K2201/09972 ,  H05K2201/10098 ,  H05K2201/10151 ,  Y10T29/49124 ,  Y10T29/4913

Abstract: A printed circuit board assembly for reducing the impact of heat generated from circuitry within a handheld or non-handheld device is provided. The printed circuit board assembly may include a printed circuit board comprising a plurality of conductive layers and a plurality of dielectric layers where each dielectric layer is disposed between a pair of conductive layers. Each conductive layer may include a first portion and a second portion separated by a gap where the gaps in the alternating conductive layers are misaligned. The first portion of each conductive layer may be substantially thermally isolated from the second portion of each conductive layer.

Abstract translation: 提供了一种用于减少由手持设备或非手持设备内的电路产生的热量的影响的印刷电路板组件。 印刷电路板组件可以包括印刷电路板，其包括多个导电层和多个电介质层，其中每个电介质层设置在一对导电层之间。 每个导电层可以包括由交替导电层中的间隙不对准的间隙分开的第一部分和第二部分。 每个导电层的第一部分可以与每个导电层的第二部分基本上热隔离。

公开(公告)号：US08804364B2

公开(公告)日：2014-08-12

申请号：US13169009

申请日：2011-06-26

Applicant: Hao-Jung Li

Inventor： Hao-Jung Li

IPC: H05K7/00 ,  H05K1/11

CPC classification number: H05K1/113 ,  H05K1/0206 ,  H05K3/3436 ,  H05K2201/094 ,  H05K2201/09663 ,  H05K2201/10969 ,  Y02P70/613

Abstract: A footprint of a printed circuit board (PCB) for a leadframe-based package includes a plurality of pads arranged within a central region on a main surface of the PCB; and an array of signal pads disposed within a peripheral region surrounding the central region.

Abstract translation: 用于基于引线框的封装的印刷电路板（PCB）的占位面积包括布置在PCB的主表面上的中心区域内的多个焊盘; 以及设置在围绕中心区域的周边区域内的信号焊盘阵列。

公开(公告)号：US08751178B2

公开(公告)日：2014-06-10

申请号：US13233121

申请日：2011-09-15

Applicant: Ming-Chin Tsai

Inventor： Ming-Chin Tsai

IPC: G01N37/00

CPC classification number: H05K3/0005 ,  H05K1/0262 ,  H05K1/115 ,  H05K2201/093 ,  H05K2201/09663

Abstract: A method for determining disposition of via hole on printed circuit board (PCB) includes the steps of: providing a PCB on which is disposed with a geometric layout and a via hole; providing a line on the PCB for intersecting the geometric layout to form a plurality of points of intersection; defining line segments by segmenting the line at each of the points of intersection to form a plurality of line segments; deleting some of the line segments having one end not being point of intersection for the geometric layout to form a plurality of segmented regions; searching a closed region by repeatedly searching region from any one of the points in the plurality of segmented regions; determining whether a closed region is a smallest closed region; determining whether a via hole is located within the smallest closed region.

Abstract translation: 一种用于确定印刷电路板（PCB）上的通孔布置的方法包括以下步骤：提供PCB，其上布置有几何布局和通孔; 在PCB上提供与几何布局相交的线以形成多个交点; 通过在每个相交点处分割线来定义线段以形成多个线段; 删除一些线段，其一端不是几何布局的交点，以形成多个分段区域; 通过从所述多个分割区域中的任一点反复搜索区域来搜索封闭区域; 确定封闭区域是否是最小的封闭区域; 确定通孔是否位于最小封闭区域内。

公开(公告)号：US08694949B2

公开(公告)日：2014-04-08

申请号：US13748167

申请日：2013-01-23

Applicant: Renesas Electronics Corporation

Inventor： Takafumi Betsui ,  Naoto Taoka ,  Motoo Suwa ,  Shigezumi Matsui ,  Norihiko Sugita ,  Yoshiharu Fukushima

IPC: G06F17/50

CPC classification number: G11C5/04 ,  G11C5/02 ,  G11C5/06 ,  G11C5/063 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/17 ,  H01L25/18 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/49175 ,  H01L2924/1432 ,  H01L2924/14361 ,  H01L2924/15311 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0237 ,  H05K1/181 ,  H05K3/4602 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09663 ,  H05K2201/10159 ,  H05K2201/10522 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2924/00

Abstract: A microcomputer provided on a rectangular semiconductor board has memory interface circuits. The memory interface circuits are separately disposed in such positions as to extend along the peripheries of the semiconductor board on both sides from one corner as a reference position. In this case, limitations to size reduction imposed on the semiconductor board can be reduced compared with a semiconductor board having memory interface circuits only on one side. Respective partial circuits on each of the separated memory interface circuits have equal data units associated with data and data strobe signals. Thus, the microcomputer has simplified line design on a mother board and on a module board.

Abstract translation: 设置在矩形半导体板上的微型计算机具有存储器接口电路。 存储器接口电路分别设置在从作为基准位置的一个角部沿着半导体板的两侧的周边延伸的位置。 在这种情况下，与仅在一侧具有存储器接口电路的半导体板相比，可以减小对半导体板的尺寸减小的限制。 每个分离的存储器接口电路上的各个部分电路具有与数据和数据选通信号相关联的相等的数据单元。 因此，微型计算机在主板和模块板上简化了线路设计。

公开(公告)号：US20140085891A1

公开(公告)日：2014-03-27

申请号：US13730157

申请日：2012-12-28

Applicant: TOSHIBA LIGHTING & TECHNOLOGY CORPORATION

Inventor： Yuichiro Takahara ,  Kazuya Kondo

IPC: F21V23/00

CPC classification number: F21V23/001 ,  F21S8/02 ,  F21V23/002 ,  F21V29/507 ,  F21V29/773 ,  F21V29/89 ,  F21Y2105/10 ,  F21Y2115/10 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48464 ,  H01L2224/73265 ,  H01L2924/181 ,  H01R12/57 ,  H01R12/75 ,  H05K1/0306 ,  H05K1/111 ,  H05K2201/068 ,  H05K2201/09663 ,  H05K2201/10106 ,  H05K2201/1031 ,  Y02P70/611 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A light-emitting apparatus may include a substrate (e.g., a ceramic substrate), a plurality of first light-emitting elements mounted on the substrate, and a plurality of receptacles of monopole connectors. In some examples, the light-emitting apparatus may further include a first line configured to connect anodes of the first light-emitting elements and a first receptacle from among the plurality of receptacles, and a second line configured to connect cathodes of the first light-emitting elements and a second receptacle from among the plurality of receptacles. The plurality of receptacles each may include a metallic base portion.

Abstract translation: 发光装置可以包括基板（例如，陶瓷基板），安装在基板上的多个第一发光元件和多个单极连接器的插座。 在一些示例中，发光装置还可以包括：第一线，被配置为将多个第一发光元件的阳极与第一插座中的多个插座相连;第二线，被配置为连接第一发光元件的阴极， 发射元件和多个插座之间的第二容器。 多个插座各自可以包括金属底座部分。

公开(公告)号：US20140078691A1

公开(公告)日：2014-03-20

申请号：US13727613

申请日：2012-12-27

Applicant: HANNSTAR DISPLAY CORPORATION

Inventor： Yung-Li Huang ,  Yu-Sheng Lin ,  Nan-Cheng Huang ,  Jih-Hsin Chiang

IPC: H05K1/18

CPC classification number: H05K1/181 ,  G06F3/0416 ,  H05K1/0268 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/09663

Abstract: A bonding structure of a touch panel and a flexible circuit board includes a touch panel, a flexible circuit board and a conductive adhesive film. The touch panel includes a shielding layer and multiple transmission wires disposed on the shielding layer. The flexible circuit board is under the touch panel and includes a substrate and multiple connection wires on the substrate. Each the connection wire includes a first connection portion and a second connection portion, and the two connection portions are separated from each other by an interval and electrically insulated from each other. The conductive adhesive film is between the transmission wires of the touch panel and the connection wires of the flexible circuit board, in which the first connection portions and the second connection portions of the connection wires are electrically connected to the transmission wires via the conductive adhesive film so as to form an electric loop.

Abstract translation: 触摸面板和柔性电路板的接合结构包括触摸面板，柔性电路板和导电粘合剂薄膜。 触摸面板包括屏蔽层和设置在屏蔽层上的多个传输线。 柔性电路板位于触摸面板的下面，包括基板和基板上的多个连接线。 每个连接线包括第一连接部分和第二连接部分，并且两个连接部分彼此隔开间隔并彼此电绝缘。 导电粘合膜位于触摸屏的传输线与柔性电路板的连接线之间，其中连接线的第一连接部分和第二连接部分经由导电粘合膜电连接到传输线 从而形成电路。

公开(公告)号：US20140061285A1

公开(公告)日：2014-03-06

申请号：US14073607

申请日：2013-11-06

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Thomas Kinsley

IPC: B23K1/00

CPC classification number: B23K1/0016 ,  G01R31/048 ,  H05K1/0268 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/09663 ,  H05K2201/09809 ,  H05K2201/10734 ,  H05K2203/163 ,  H05K2203/175 ,  Y02P70/611 ,  Y10T29/49004 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144

Abstract: Some embodiments of the present invention are generally directed to testing connections of a memory device to a circuit board or other device. In one embodiment, a memory device that is configured to facilitate continuity testing between the device and a printed circuit board or other device is disclosed. The memory device includes a substrate and two connection pads that are electrically coupled to one another via a test path. A system and method for testing the connections between a memory device and a circuit board or other device are also disclosed, as are additional techniques for detecting excess temperature and enabling special functionalities using multi-stage connection pads.

Abstract translation: 本发明的一些实施例通常涉及测试存储器件与电路板或其它器件的连接。 在一个实施例中，公开了一种被配置为便于该设备与印刷电路板或其他设备之间的连续性测试的存储器件。 存储器件包括一个基片和两个通过测试路径彼此电耦合的连接焊盘。 还公开了用于测试存储器件和电路板或其他器件之间的连接的系统和方法，以及用于检测过温度并使得能够使用多级连接焊盘的特殊功能的附加技术。