公开(公告)号：US09627883B2

公开(公告)日：2017-04-18

申请号：US13849834

申请日：2013-03-25

Applicant: RF Micro Devices, Inc.

Inventor： Swaminathan Muthukrishnan ,  Cody Hale ,  Randy Naylor ,  Nicholas Liu

IPC: H02H9/04 ,  H01L27/02

CPC classification number: H02H9/045 ,  H01L27/0274 ,  H01L27/0292 ,  H02H9/046

Abstract: Antenna switching circuitry comprises a plurality of communication ports, an antenna port, a plurality of switches, and an ESD protection device. The plurality of switches are adapted to selectively couple one or more of the communication ports to the antenna port in order to transmit or receive a signal. The ESD protection device is coupled between one of the plurality of communication ports and ground, and is adapted to form a substantially low impedance path to ground during an ESD event. Upon the occurrence of an ESD event, a received electrostatic charge passes through one or more of the plurality of switches to the ESD protection device, where it is safely diverted to ground. By using only one ESD protection device, desensitization of the antenna switching circuitry due to the parasitic loading of the ESD protection device is avoided. Further, the area of the antenna switching circuitry is minimized.

公开(公告)号：US09584085B2

公开(公告)日：2017-02-28

申请号：US14554542

申请日：2014-11-26

Applicant: RF Micro Devices, Inc.

Inventor： Baker Scott ,  George Maxim ,  Dirk Robert Walter Leipold

IPC: H03G3/30 ,  H03F3/68 ,  H03F3/19 ,  H03F1/32 ,  H03F1/52 ,  H03F1/02 ,  H04B1/04 ,  H03F1/22 ,  H03F1/56 ,  H03F3/45 ,  H03F3/193

CPC classification number: H03G3/3036 ,  H03F1/0211 ,  H03F1/0272 ,  H03F1/223 ,  H03F1/32 ,  H03F1/523 ,  H03F1/565 ,  H03F3/19 ,  H03F3/193 ,  H03F3/24 ,  H03F3/45179 ,  H03F3/45394 ,  H03F3/68 ,  H03F2200/324 ,  H03F2200/387 ,  H03F2200/451 ,  H03F2200/471 ,  H03F2201/3236 ,  H03G3/3042 ,  H04B1/0475 ,  H04B2001/0408 ,  H04B2001/0416 ,  H04B2001/0425

Abstract: An amplifying system with increased linearity is disclosed. The amplifying system includes a first gain stage with a first gain characteristic, a second gain stage with a second gain characteristic, and bias circuitry configured to substantially maintain alignment of distortion inflection points between the first gain characteristic and the second gain characteristic during operation. The bias circuitry is configured to further maintain alignment of the distortion inflection points between the first gain characteristic and the second gain characteristic over design corners by providing substantially constant headroom between quiescent bias voltage and turnoff of the first gain stage and the second gain stage. In some embodiments the first gain characteristic is expansive and the second gain characteristic is compressive. In other embodiments the first gain characteristic is compressive and the second gain characteristic is expansive. In some embodiments the first gain stage is configured to provide RF degeneration control of gain.

Abstract translation: 公开了具有增加的线性度的放大系统。 放大系统包括具有第一增益特性的第一增益级，具有第二增益特性的第二增益级，以及被配置为在操作期间基本保持第一增益特性与第二增益特性之间的失真拐点对准的偏置电路。 偏置电路被配置为通过在静态偏置电压和第一增益级与第二增益级的截止之间提供基本恒定的余量，进一步保持在设计角上的第一增益特性和第二增益特性之间的失真拐点的对准。 在一些实施例中，第一增益特性是膨胀的，第二增益特性是压缩的。 在其他实施例中，第一增益特性是压缩的，第二增益特性是膨胀的。 在一些实施例中，第一增益级被配置为提供增益的RF退化控制。

公开(公告)号：US09584071B2

公开(公告)日：2017-02-28

申请号：US14868890

申请日：2015-09-29

Applicant: RF Micro Devices, Inc.

Inventor： Nadim Khlat

IPC: H01B1/04 ,  H01Q11/12 ,  H03F3/04 ,  H03F1/02 ,  H03G3/30 ,  H04B1/04 ,  H03F3/19 ,  H03F3/24

CPC classification number: H03F1/0227 ,  H03F3/19 ,  H03F3/245 ,  H03F2200/102 ,  H03F2200/451 ,  H03G3/3036 ,  H04B1/04 ,  H04B2001/0416

Abstract: Envelope power supply circuitry includes power converter circuitry and envelope tracking circuitry. The power converter circuitry is configured to receive an envelope power converter control signal and a supply voltage and provide an envelope power supply signal for an amplifier from the supply voltage and based on the envelope power converter control signal. The envelope tracking circuitry is coupled to the power converter circuitry. In a first mode of operation, the envelope tracking circuitry is configured to provide the envelope power converter control signal such that a gain of the amplifier remains substantially constant over a range of input power provided to the amplifier. In a second mode of operation, the envelope tracking circuitry is configured to limit the dynamic range of the envelope power supply signal.

Abstract translation: 信封电源电路包括电源转换器电路和信封跟踪电路。 功率转换器电路被配置为接收包络功率转换器控制信号和电源电压，并且根据电源电压并基于包络功率转换器控制信号为放大器提供包络电源信号。 信封跟踪电路耦合到功率转换器电路。 在第一操作模式中，包络跟踪电路被配置为提供包络功率转换器控制信号，使得在提供给放大器的输入功率的范围上，放大器的增益保持基本恒定。 在第二操作模式中，包络跟踪电路被配置为限制包络电源信号的动态范围。

公开(公告)号：US09583471B2

公开(公告)日：2017-02-28

申请号：US14595451

申请日：2015-01-13

Applicant: RF Micro Devices, Inc.

Inventor： Douglas Andrew Teeter ,  Ming Ji ,  Bhavin Shah ,  Mohsen Haji-Rahim ,  William Kent Braxton

IPC: H01L25/04 ,  H01L25/065 ,  H01L25/18 ,  H03F3/195 ,  H01L25/00 ,  H01L23/00 ,  H01L23/40 ,  H01L25/075 ,  H01L23/66

CPC classification number: H01L25/18 ,  H01L23/4012 ,  H01L23/66 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/043 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/0756 ,  H01L25/50 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48106 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49096 ,  H01L2224/49111 ,  H01L2224/4917 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/141 ,  H01L2924/143 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/20102 ,  H01L2924/20103 ,  H01L2924/2064 ,  H03F3/195 ,  H03F2200/531 ,  H01L2924/20753 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Disclosed is an integrated circuit module that includes a first die having a plurality of hot regions and at least one cool region when operating under normal conditions. The first die with a top surface includes at least one power amplifier that resides in the plurality of hot regions. The integrated circuit module also includes a second die. The second die has a bottom surface, which is adhered to the top surface of the first die, wherein any portion of the bottom surface of the second die that is adhered to the top surface of the first die resides exclusively on the at least one cool region. In at least one embodiment, the first die is an RF power amplifier die and the second die is a controller die having control circuitry configured to control the at least one power amplifier that is an RF power amplifier type.

Abstract translation: 公开了一种集成电路模块，其包括具有多个热区域的第一管芯和在正常条件下操作时的至少一个冷却区域。 具有顶表面的第一管芯包括驻留在多个热区域中的至少一个功率放大器。 集成电路模块还包括第二管芯。 第二模具具有底表面，其粘附到第一模具的顶表面，其中粘附到第一模具的顶表面的第二模具的底表面的任何部分仅在至少一个冷却 地区。 在至少一个实施例中，第一裸片是RF功率放大器芯片，而第二裸片是具有控制电路的控制器芯片，控制电路配置成控制作为RF功率放大器类型的至少一个功率放大器。

公开(公告)号：US09583414B2

公开(公告)日：2017-02-28

申请号：US14529870

申请日：2014-10-31

Applicant: RF Micro Devices, Inc.

Inventor： Julio C. Costa ,  David M. Shuttleworth ,  Michael J. Antonell

IPC: H01L23/373 ,  H01L27/12 ,  H01L23/48

CPC classification number: H01L23/3737 ,  H01L21/0237 ,  H01L21/6835 ,  H01L23/481 ,  H01L23/485 ,  H01L27/1203 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device that does not produce nonlinearities attributed to a high resistivity silicon handle interfaced with a dielectric region of a buried oxide (BOX) layer is disclosed. The semiconductor device includes a semiconductor stack structure with a first surface and a second surface wherein the second surface is on an opposite side of the semiconductor stack structure from the first surface. At least one device terminal is included in the semiconductor stack structure and at least one electrical contact extends from the second surface and is electrically coupled to the at least one device terminal. The semiconductor stack is protected by a polymer disposed on the first surface of the semiconductor stack. The polymer has high thermal conductivity and high electrical resistivity.

Abstract translation: 公开了一种不产生归因于与掩埋氧化物（BOX）层的电介质区域连接的高电阻率硅手柄的非线性的半导体器件。 半导体器件包括具有第一表面和第二表面的半导体堆叠结构，其中第二表面与半导体堆叠结构相对于第一表面。 至少一个器件端子包括在半导体堆叠结构中，并且至少一个电触头从第二表面延伸并且电耦合到至少一个器件端子。 半导体堆叠由设置在半导体堆叠的第一表面上的聚合物保护。 聚合物具有高导热性和高电阻率。

公开(公告)号：US09577591B2

公开(公告)日：2017-02-21

申请号：US14715173

申请日：2015-05-18

Applicant: RF Micro Devices, Inc.

Inventor： Jeffery Peter Ortiz

IPC: H03F1/52 ,  H03F3/19 ,  H03F1/02 ,  H03F3/21 ,  H03F3/45 ,  H03F1/56

CPC classification number: H03F3/19 ,  H03F1/0205 ,  H03F1/0211 ,  H03F1/565 ,  H03F3/21 ,  H03F3/245 ,  H03F3/265 ,  H03F3/45076 ,  H03F2200/102 ,  H03F2200/171 ,  H03F2200/451 ,  H03F2200/516 ,  H03F2200/534 ,  H03F2200/537 ,  H03F2200/541 ,  H03F2203/45116 ,  H03F2203/45316

Abstract: A differential power amplifier has at least an input stage and an output stage. A first output stage amplifier is configured to receive a first portion of a differential signal from the input stage at a first output stage input and provide a first amplified signal at a first output stage output. The second output stage amplifier is configured to receive a second portion of the differential signal from the input stage at a second output stage input and provide a second amplified signal at a second output stage output. Power limiter circuitry is connected to the first and/or output stage inputs and is configured to limit a power level of the differential signal prior to being received at the output stage, such that the differential power amplifier and associated filters are not damaged, while the nominal performance of the differential power amplifier at rated power is not significantly affected.

Abstract translation: 差分功率放大器至少具有输入级和输出级。 第一输出级放大器被配置为在第一输出级输入端从输入级接收差分信号的第一部分，并在第一输出级输出端提供第一放大信号。 第二输出级放大器被配置为在第二输出级输入处从输入级接收差分信号的第二部分，并在第二输出级输出端提供第二放大信号。 功率限制器电路连接到第一和/或输出级输入，并且被配置为在输出级接收之前限制差分信号的功率电平，使得差分功率放大器和相关滤波器不被损坏，而 差动功率放大器在额定功率下的额定性能没有明显的影响。

公开(公告)号：US09571048B2

公开(公告)日：2017-02-14

申请号：US14715181

申请日：2015-05-18

Applicant: RF Micro Devices, Inc.

Inventor： Jeffery Peter Ortiz

IPC: H03G3/20 ,  H03F3/19 ,  H03F1/02 ,  H03F3/21 ,  H03F3/45 ,  H03F1/56

CPC classification number: H03F3/19 ,  H03F1/0205 ,  H03F1/0211 ,  H03F1/565 ,  H03F3/21 ,  H03F3/245 ,  H03F3/265 ,  H03F3/45076 ,  H03F2200/102 ,  H03F2200/171 ,  H03F2200/451 ,  H03F2200/516 ,  H03F2200/534 ,  H03F2200/537 ,  H03F2200/541 ,  H03F2203/45116 ,  H03F2203/45316

Abstract: A differential power amplifier comprises an envelope tracking power supply configured to provide an envelope power supply signal to the differential power amplifier. The differential power amplifier also comprises an input stage configured to provide a differential signal having a first portion and a second portion to a differential output stage. The differential output stage comprises a first output stage amplifier configured to receive the first portion of the differential signal at a first output stage input and provide a first amplified signal at a first output stage output, as well as a second output stage amplifier configured to receive the second portion of the differential signal at a second output stage input and provide a second amplified signal at a second output stage output. The envelope power supply signal provides power for amplification.

Abstract translation: 差分功率放大器包括被配置为向差分功率放大器提供包络电源信号的包络跟踪电源。 差分功率放大器还包括输入级，其被配置为向差分输出级提供具有第一部分和第二部分的差分信号。 差分输出级包括第一输出级放大器，被配置为在第一输出级输入端接收差分信号的第一部分，并在第一输出级输出端提供第一放大信号，以及第二输出级放大器，被配置为接收 在第二输出级输入的差分信号的第二部分输入，并在第二输出级输出端提供第二放大信号。 信封电源信号提供放大功率。

公开(公告)号：US20170033760A1

公开(公告)日：2017-02-02

申请号：US15141283

申请日：2016-04-28

Applicant: RF Micro Devices, Inc.

Inventor： Drik Robert Walter Leipold ,  George Maxim ,  Marcus Granger-Jones ,  Baker Scott

IPC: H03H7/46 ,  H03H7/01

CPC classification number: H03H7/1775 ,  H03H7/0115 ,  H03H7/0161 ,  H03H7/09 ,  H03H2007/013

Abstract: Embodiments of radio frequency (RF) filtering circuitry are disclosed. In one embodiment, the RF filtering circuitry includes a first port, a second port, a first RF filter path, and a second RF filter path. The first RF filter path is connected between the first port and the second port and includes at least a pair of weakly coupled resonators. The weakly coupled resonators are configured such that a first transfer response between the first port and the second port defines a first passband. The second RF filter path is coupled to the first RF filter path and is configured such that the first transfer response between the first port and the second port defines a stopband adjacent to the first passband without substantially increasing ripple variation of the first passband defined by the first transfer response.

Abstract translation: 公开了射频（RF）滤波电路的实施例。 在一个实施例中，RF滤波电路包括第一端口，第二端口，第一RF滤波器路径和第二RF滤波器路径。 第一RF滤波器路径连接在第一端口和第二端口之间，并且包括至少一对弱耦合谐振器。 弱耦合谐振器被配置为使得第一端口和第二端口之间的第一传输响应限定第一通带。 第二RF滤波器路径被耦合到第一RF滤波器路径并且被配置为使得第一端口和第二端口之间的第一传输响应限定与第一通带相邻的阻带，而基本上不增加由第一通带限定的第一通带的纹波变化 第一传递响应。

公开(公告)号：US20170019141A1

公开(公告)日：2017-01-19

申请号：US15082353

申请日：2016-03-28

Applicant: RF Micro Devices, Inc.

Inventor： Charles Forrest Campbell

IPC: H04B1/44

CPC classification number: H04B1/48

Abstract: A self-activated transfer switch is disclosed. The self-activated transfer switch includes a transmit (TX) switch coupled between a TX port and an antenna port. A receive (RX) switch is coupled between the antenna port and an RX port, and RF-to-bias generator circuitry is coupled to the TX port and the antenna port. The RF-to-bias generator circuitry is configured to generate a bias signal to turn off the RX switch and turn on the TX switch when either of a TX signal is provided at the TX port and a jammer signal is received at the antenna port. The bias signal is generated from energy of at least one of the TX signal and the jammer signal. The TX switch is turned off and the RX switch is turned on when the bias signal is not being generated.

Abstract translation: 公开了一种自激活转印开关。 自激活转移开关包括耦合在TX端口和天线端口之间的发送（TX）开关。 接收（RX）开关耦合在天线端口和RX端口之间，RF到偏置发生器电路耦合到TX端口和天线端口。 RF到偏置发生器电路被配置为产生偏置信号以关闭RX开关并且当在TX​​端口处提供TX信号中的任一个并且在天线端口处接收到干扰信号时，接通TX开关。 偏置信号由TX信号和干扰信号中的至少一个的能量产生。 当不产生偏置信号时，TX开关关闭，RX开关打开。

公开(公告)号：US20160380101A1

公开(公告)日：2016-12-29

申请号：US15133669

申请日：2016-04-20

Applicant: RF Micro Devices, Inc.

Inventor： Philip W. Mason ,  Michael Carroll ,  Julio C. Costa ,  Jan Edward Vandemeer ,  Daniel Charles Kerr

IPC: H01L29/78 ,  H01L27/12 ,  H01L23/66 ,  H01L27/092

CPC classification number: H01L29/7838 ,  H01L23/66 ,  H01L27/092 ,  H01L27/1203 ,  H01L29/78603 ,  H01L29/78654

Abstract: The present disclosure relates to a silicon-on-insulator (SOI) substrate structure with a buried dielectric layer for radio frequency (RF) complementary metal-oxide semiconductor (CMOS) switch fabrications. The buried dielectric layer suppresses back-gate transistors in the RF CMOS switches fabricated on the SOI substrate structure. The SOI substrate structure includes a silicon handle layer, a silicon oxide layer over the silicon handle layer, a buried dielectric layer over the silicon oxide layer, and a silicon epitaxy layer directly over the buried dielectric layer.

Abstract translation: 本公开涉及具有用于射频（RF）互补金属氧化物半导体（CMOS）开关制造的掩埋介电层的绝缘体上硅（SOI）衬底结构。 掩埋介质层抑制在SOI衬底结构上制造的RF CMOS开关中的背栅晶体管。 SOI衬底结构包括硅手柄层，硅手柄层上的氧化硅层，氧化硅层上的掩埋电介质层，以及直接在掩埋电介质层上的硅外延层。