公开(公告)号：US20050136684A1

公开(公告)日：2005-06-23

申请号：US10746695

申请日：2003-12-23

Applicant: Kevin Mukai ,  Kimberly Branshaw ,  Zheng Yuan ,  Xinyun Xia ,  Xiaolin Chen ,  Dongqing Li ,  M. Karim ,  Van Ton ,  Cary Ching ,  Steve Ghanayeim ,  Nitin Ingle

Inventor： Kevin Mukai ,  Kimberly Branshaw ,  Zheng Yuan ,  Xinyun Xia ,  Xiaolin Chen ,  Dongqing Li ,  M. Karim ,  Van Ton ,  Cary Ching ,  Steve Ghanayeim ,  Nitin Ingle

IPC: C23C16/04 ,  C23C16/40 ,  C23C16/505 ,  H01L21/316 ,  H01L21/762 ,  H01L21/768 ,  H01L21/31 ,  H01L21/469

CPC classification number: C23C16/045 ,  C23C16/401 ,  C23C16/505 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/31612 ,  H01L21/76224 ,  H01L21/76828 ,  H01L21/76832 ,  H01L21/76837

Abstract: A variety of techniques may be employed, separately or in combination, to improve the gap-filling performance of a dielectric material formed by chemical vapor deposition (CVD). In one approach, a first dielectric layer is deposited using sub-atmospheric chemical vapor deposition (SACVD), followed by a second dielectric layer deposited by high density plasma chemical vapor deposition (HDP-CVD) or plasma-enhanced chemical vapor deposition (PECVD). In another approach, a SACVD dielectric layer is deposited in the presence of reactive ionic species flowed from a remote plasma chamber into the processing chamber, which performs etching during the deposition process. In still another approach, high aspect trenches may be filled utilizing SACVD in combination with oxide layers deposited at high temperatures.

Abstract translation: 可以单独地或组合地采用各种技术来改善通过化学气相沉积（CVD）形成的电介质材料的间隙填充性能。 在一种方法中，使用次大气化学气相沉积（SACVD）沉积第一介电层，随后通过高密度等离子体化学气相沉积（HDP-CVD）或等离子体增强化学气相沉积（PECVD）沉积的第二介电层， 。 在另一种方法中，在从远程等离子体室流入处理室的反应性离子物质的存在下沉积SACVD介电层，该处理室在沉积过程中执行蚀刻。 在另一种方法中，可以使用SACVD与在高温下沉积的氧化物层组合来填充高方位沟槽。

公开(公告)号：US08999856B2

公开(公告)日：2015-04-07

申请号：US13416277

申请日：2012-03-09

Applicant: Jingchun Zhang ,  Anchuan Wang ,  Nitin Ingle

Inventor： Jingchun Zhang ,  Anchuan Wang ,  Nitin Ingle

IPC: H01L21/302 ,  H01L21/311 ,  H01J37/32

CPC classification number: H01L21/31116 ,  C09K13/00 ,  H01J37/32357 ,  H01J37/32422 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/32135 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/67069

Abstract: A method of selectively etching silicon nitride from a substrate comprising a silicon nitride layer and a silicon oxide layer includes flowing a fluorine-containing gas into a plasma generation region of a substrate processing chamber and applying energy to the fluorine-containing gas to generate a plasma in the plasma generation region. The plasma comprises fluorine radicals and fluorine ions. The method also includes filtering the plasma to provide a reactive gas having a higher concentration of fluorine radicals than fluorine ions and flowing the reactive gas into a gas reaction region of the substrate processing chamber. The method also includes exposing the substrate to the reactive gas in the gas reaction region of the substrate processing chamber. The reactive gas etches the silicon nitride layer at a higher etch rate than the reactive gas etches the silicon oxide layer.

Abstract translation: 从包括氮化硅层和氧化硅层的衬底中选择性地蚀刻氮化硅的方法包括将含氟气体流入衬底处理室的等离子体产生区域并向含氟气体施加能量以产生等离子体 在等离子体产生区域中。 等离子体包括氟自由基和氟离子。 该方法还包括过滤等离子体以提供具有比氟离子更高浓度​​的氟自由基的反应气体，并使反应气体流入基板处理室的气体反应区域。 该方法还包括将衬底暴露于衬底处理室的气体反应区域中的反应气体。 反应气体以比反应气体更高的蚀刻速率蚀刻氮化硅层蚀刻氧化硅层。

公开(公告)号：US08501629B2

公开(公告)日：2013-08-06

申请号：US12646030

申请日：2009-12-23

Applicant: Jing Tang ,  Nitin Ingle ,  Dongqing Yang

Inventor： Jing Tang ,  Nitin Ingle ,  Dongqing Yang

IPC: H01L21/302

CPC classification number: H01L21/31116 ,  H01J37/32357 ,  H01J2237/3341

Abstract: A method of etching silicon-containing material is described and includes a SiConi™ etch having a greater or lesser flow ratio of hydrogen compared to fluorine than that found in the prior art. Modifying the flow rate ratios in this way has been found to reduce roughness of the post-etch surface and to reduce the difference in etch-rate between densely and sparsely patterned areas. Alternative means of reducing post-etch surface roughness include pulsing the flows of the precursors and/or the plasma power, maintaining a relatively high substrate temperature and performing the SiConi™ in multiple steps. Each of these approaches, either alone or in combination, serve to reduce the roughness of the etched surface by limiting solid residue grain size.

Abstract translation: 描述了一种蚀刻含硅材料的方法，并且包括与现有技术中发现的氢相比具有比氟更大或更小的氢流量比的SiConi TM蚀刻。 已经发现以这种方式修改流速比降低了蚀刻后表面的粗糙度并且减少了密集和稀疏图案化区域之间的蚀刻速率差异。 降低蚀刻后表面粗糙度的替代方法包括脉冲前体和/或等离子体功率的流动，维持相对高的衬底温度并以多个步骤执行SiConi TM。 单独或组合的这些方法中的每一种用于通过限制固体残留物颗粒尺寸来减少蚀刻表面的粗糙度。

公开(公告)号：US08435902B2

公开(公告)日：2013-05-07

申请号：US12959155

申请日：2010-12-02

Applicant: Jing Tang ,  Nitin Ingle ,  Dongqing Yang ,  Shankar Venkataraman

Inventor： Jing Tang ,  Nitin Ingle ,  Dongqing Yang ,  Shankar Venkataraman

IPC: H01L21/302 ,  H01L21/461 ,  H01L21/311 ,  C23F3/00

CPC classification number: H01L21/31116 ,  H01J37/32091

Abstract: A method of etching silicon oxide from a narrow trench and a wide trench (or open area) is described which allows the etch in the wide trench to progress further than the etch in the narrow trench. The method includes two dry etch cycles. The first dry etch cycle involves a low intensity or abbreviated sublimation step which leaves solid residue in the narrow trench. The remaining solid residue inhibits etch progress in the narrow trench during the second dry etch cycle allowing the etch in the wide trench to overtake the etch in the narrow trench.

Abstract translation: 描述了从窄沟槽和宽沟槽（或开放区域）中蚀刻氧化硅的方法，其允许宽沟槽中的蚀刻比窄沟槽中的蚀刻进一步进行。 该方法包括两个干蚀刻循环。 第一干蚀刻循环涉及低强度或缩写升华步骤，其在窄沟槽中留下固体残留物。 剩余的固体残余物在第二干蚀刻循环期间抑制窄沟槽中的蚀刻进程，允许宽沟槽中的蚀刻超过窄沟槽中的蚀刻。

公开(公告)号：US20110230052A1

公开(公告)日：2011-09-22

申请号：US12959155

申请日：2010-12-02

Applicant: Jing Tang ,  Nitin Ingle ,  Dongqing Yang ,  Shankar Venkataraman

Inventor： Jing Tang ,  Nitin Ingle ,  Dongqing Yang ,  Shankar Venkataraman

IPC: H01L21/3065

CPC classification number: H01L21/31116 ,  H01J37/32091

Abstract: A method of etching silicon oxide from a narrow trench and a wide trench (or open area) is described which allows the etch in the wide trench to progress further than the etch in the narrow trench. The method includes two dry etch cycles. The first dry etch cycle involves a low intensity or abbreviated sublimation step which leaves solid residue in the narrow trench. The remaining solid residue inhibits etch progress in the narrow trench during the second dry etch cycle allowing the etch in the wide trench to overtake the etch in the narrow trench.

Abstract translation: 描述了从窄沟槽和宽沟槽（或开放区域）中蚀刻氧化硅的方法，其允许宽沟槽中的蚀刻比窄沟槽中的蚀刻进一步进行。 该方法包括两个干蚀刻循环。 第一干蚀刻循环涉及低强度或缩写升华步骤，其在窄沟槽中留下固体残留物。 剩余的固体残余物在第二干蚀刻循环期间抑制窄沟槽中的蚀刻进程，允许宽沟槽中的蚀刻超过窄沟槽中的蚀刻。

公开(公告)号：US20070000897A1

公开(公告)日：2007-01-04

申请号：US11423651

申请日：2006-06-12

Applicant: Nitin Ingle ,  Zheng Yuan ,  Vikash Banthia ,  Xinyun Xia ,  Hali Forstner ,  Rong Pan

Inventor： Nitin Ingle ,  Zheng Yuan ,  Vikash Banthia ,  Xinyun Xia ,  Hali Forstner ,  Rong Pan

IPC: H01L21/324 ,  H05B3/00

CPC classification number: H01L21/324 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/02337 ,  H01L21/31612 ,  H01L21/31662 ,  H01L21/67115 ,  H01L21/76224 ,  H01L21/76283

Abstract: A method of annealing a substrate comprising a trench containing a dielectric material, the method including annealing the substrate at a first temperature of about 200° C. to about 800° C. in a first atmosphere comprising an oxygen containing gas, and annealing the substrate at a second temperature of about 800° C. to about 1400° C. in a second atmosphere lacking oxygen. In addition, a method of annealing a substrate comprising a trench containing a dielectric material, the method including annealing the substrate at a first temperature of about 400° C. to about 800° C. in the presence of an oxygen containing gas, purging the oxygen containing gas away from the substrate, and raising the substrate to a second temperature from about 900° C. to about 1100° C. to further anneal the substrate in an atmosphere that lacks oxygen.

Abstract translation: 一种退火包括含有电介质材料的沟槽的衬底的方法，所述方法包括在包含含氧气体的第一气氛中在大约200℃至大约800℃的第一温度下对衬底退火，以及退火衬底 在约800℃至约1400℃的第二温度下在不含氧气的第二气氛中。 另外，包括含有电介质材料的沟槽的衬底的退火方法，该方法包括在含氧气体存在下，在约400℃至约800℃的第一温度下退火衬底， 含氧气体离开衬底，并将衬底升高至约900℃至约1100℃的第二温度，以在缺氧的气氛中进一步对衬底进行退火。

公开(公告)号：US20060264062A1

公开(公告)日：2006-11-23

申请号：US11493211

申请日：2006-07-25

Applicant: Nitin Ingle ,  Xinyua Xia ,  Zheng Yuan

Inventor： Nitin Ingle ,  Xinyua Xia ,  Zheng Yuan

IPC: H01L21/31

CPC classification number: C23C16/45523 ,  C23C16/045 ,  C23C16/401 ,  C23C16/402 ,  C23C16/45512 ,  C23C16/52 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/31612 ,  H01L21/76801 ,  Y10S438/958

Abstract: Embodiments of the present invention provide methods, apparatuses, and devices related to chemical vapor deposition of silicon oxide. In one embodiment, a single-step deposition process is used to efficiently form a silicon oxide layer exhibiting high conformality and favorable gap-filling properties. During a pre-deposition gas flow stabilization phase and an initial deposition stage, a relatively low ratio of silicon-containing gas:oxidant deposition gas is flowed, resulting in formation of highly conformal silicon oxide at relatively slow rates. Over the course of the deposition process step, the ratio of silicon-containing gas:oxidant gas is increased, resulting in formation of less-conformal oxide material at relatively rapid rates during later stages of the deposition process step.

公开(公告)号：US06793733B2

公开(公告)日：2004-09-21

申请号：US10057280

申请日：2002-01-25

Applicant: Karthik Janakiraman ,  Nitin Ingle ,  Zheng Yuan ,  Steven Gianoulakis

Inventor： Karthik Janakiraman ,  Nitin Ingle ,  Zheng Yuan ,  Steven Gianoulakis

IPC: C23C1600

CPC classification number: C23C16/45565 ,  C23C16/455

Abstract: A gas distribution showerhead for use in a semiconductor fabrication process features a face plate having gas outlet ports in the form of elongated slots or channels. The use of elongated gas outlet ports in accordance with embodiments of the present invention substantially reduces the incidence of undesirable spotting and streaking of deposited material where the showerhead is closely spaced from the wafer. A showerhead featuring a face plate having a tapered profile to reduce edge thickness of deposited material at close face plate-to-wafer spacings is also disclosed.

Abstract translation: 用于半导体制造工艺的气体分配喷头具有面板，该面板具有细长狭槽或通道形式的气体出口。 根据本发明的实施例，使用细长的气体出口端口基本上减少了喷头与晶片紧密隔开的沉积材料的不期望的斑点和条纹的发生。 还公开了一种具有锥形轮廓的面板的喷头，以在近距离的盘对晶片间隔处减小沉积材料的边缘厚度。