公开(公告)号：US20140273340A1

公开(公告)日：2014-09-18

申请号：US14094379

申请日：2013-12-02

Applicant: Intermolecular, Inc.

Inventor： Jeroen Van Duren ,  Sang Lee ,  Minh Huu Le ,  Sandeep Nijhawan ,  Teresa B. Sapirman

IPC: H01L29/66 ,  H01L29/786

CPC classification number: H01L21/30604 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/32134 ,  H01L21/465 ,  H01L21/707 ,  H01L27/1225 ,  H01L27/1262 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/7869

Abstract: Methods for HPC techniques are applied to the processing of site-isolated regions (SIR) on a substrate to form at least a portion of a TFT device used in display applications. The processing may be applied to at least one of gate electrode deposition, gate electrode patterning, gate dielectric deposition, gate dielectric patterning, metal-based semiconductor material (e.g. IGZO) deposition, metal-based semiconductor material (e.g. IGZO) patterning, etch stop deposition, etch stop patterning, source/drain deposition, source/drain patterning, passivation deposition, or passivation patterning. The SIRs may be defined during the deposition process with uniform deposition within each SIR or the SIRs may be defined subsequent to the deposition of layers wherein the layers are deposited with a gradient in one or more properties across the substrate.

Abstract translation: 将HPC技术的方法应用于基板上的位置隔离区域（SIR）的处理，以形成在显示应用中使用的TFT器件的至少一部分。 该处理可以应用于栅电极沉积，栅极电极图案化，栅极介电沉积，栅极电介质图案化，金属基半导体材料（例如IGZO）沉积，金属基半导体材料（例如IGZO）图案化，蚀刻停止 沉积，蚀刻停止构图，源极/漏极沉积，源极/漏极图案化，钝化沉积或钝化图案化。 可以在沉积过程期间限定SIR，每个SIR内均匀沉积，或者可以在层的沉积之后定义SIR，其中层以跨越衬底的一个或多个特性的梯度沉积。

公开(公告)号：US20140273333A1

公开(公告)日：2014-09-18

申请号：US14133203

申请日：2013-12-18

Applicant: Intermolecular Inc.

Inventor： Haifan Liang ,  Jeroen Van Duren

IPC: H01L31/18

CPC classification number: H01L31/022466 ,  H01L31/0747 ,  H01L31/1832 ,  H01L31/1884 ,  Y02E10/50

Abstract: Methods of forming absorber layers in a TFPV device are provided. Methods are described to provide the formation of metal oxide films and heating the metal oxide films in the presence of a chalcogen to form a metal-oxygen-chalcogen alloy. Methods are described to provide the formation of metal oxide films, forming a layer of elemental chalcogen on the metal oxide film, and heating the stack to form a metal-oxygen-chalcogen alloy. In some embodiments, the metal oxide film includes zinc oxide and the chalcogen includes selenium.

Abstract translation: 提供了在TFPV装置中形成吸收层的方法。 描述了提供金属氧化物膜的形成和在硫族元素存在下加热金属氧化物膜以形成金属 - 氧 - 硫族元素合金的方法。 描述了形成金属氧化物膜的方法，在金属氧化物膜上形成元素硫族元素层，并加热该叠层以形成金属 - 氧 - 硫族元素合金。 在一些实施方案中，金属氧化物膜包括氧化锌，硫族元素包括硒。

公开(公告)号：US20140264155A1

公开(公告)日：2014-09-18

申请号：US14132383

申请日：2013-12-18

Applicant: Intermolecular Inc.

Inventor： Jeroen Van Duren ,  Zhi-Wen Wen Sun

IPC: H01L21/306

CPC classification number: H01L21/30604 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/32134 ,  H01L21/465 ,  H01L21/707 ,  H01L27/1225 ,  H01L27/1262 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/7869

Abstract: Methods and formulations for the selective etching of etch stop layers deposited above metal-based semiconductor layers used in the manufacture of TFT-based display devices are presented. The formulations are based on an alkaline solution. Methods and formulations for the selective etching of molybdenum-based and/or copper-based source/drain electrode layers deposited above metal-based semiconductor layers used in the manufacture of TFT-based display devices are presented. The formulations are based on an alkaline solution.

Abstract translation: 提出了用于选择性蚀刻沉积在制造TFT基显示器件中的金属基半导体层之上的蚀刻停止层的方法和配方。 制剂基于碱性溶液。 提出了用于选择性蚀刻沉积在制造TFT基显示装置中的金属基半导体层之上的钼基和/或铜基源/漏电极层的方法和配方。 制剂基于碱性溶液。

公开(公告)号：US20140182670A1

公开(公告)日：2014-07-03

申请号：US13727741

申请日：2012-12-27

Applicant: INTERMOLECULAR INC.

Inventor： Jeroen Van Duren ,  Scott Jewhurst ,  Nikhil Kalyankar

IPC: C09D5/00 ,  H01L31/0216

CPC classification number: C09D5/006 ,  G02B1/111 ,  H01L31/02168 ,  H01L31/02366 ,  H01L31/048 ,  Y02E10/50 ,  Y10T428/2438

Abstract: Light trapping and antireflection coatings are described, together with methods for preparing the coatings. An exemplary method comprises forming a light trapping coating on a substrate and a conformal antireflection coating on the light trapping coating. The light trapping coating comprises particles embedded in a support matrix having a thickness between about one third and two thirds of the mean particle size. The mean particle size is between about 10 μm and about 500 μm. The index of refraction of the particles and support matrix is substantially the same as the index of refraction of the substrate at wavelengths of interest. The index of refraction of the conformal antireflection coating is approximately equal the square root of the index of refraction of the substrate.

Abstract translation: 描述了光捕获和抗反射涂层以及制备涂层的方法。 一种示例性方法包括在基底上形成光捕获涂层，并在光捕获涂层上形成共形抗反射涂层。 光捕获涂层包括嵌入支撑基质中的颗粒，其厚度在平均粒度的约三分之一至三分之二之间。 平均粒径为约10μm至约500μm。 颗粒和载体基质的折射率基本上与感兴趣的波长处的基底的折射率相同。 保形抗反射涂层的折射率近似等于基材的折射率的平方根。

公开(公告)号：US20140158190A1

公开(公告)日：2014-06-12

申请号：US14180120

申请日：2014-02-13

Applicant: Intermolecular, Inc.

Inventor： Haifan Liang ,  Jeroen Van Duren

IPC: H01L31/065 ,  H01L31/032

CPC classification number: H01L31/065 ,  H01L21/02472 ,  H01L21/02485 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02568 ,  H01L21/02614 ,  H01L31/0322 ,  H01L31/0326 ,  H01L31/0749 ,  Y02E10/541

Abstract: Methods are described for forming CIGS absorber layers in TFPV devices with graded compositions and graded band gaps. Methods are described for utilizing Al to increase the band gap at the front surface of the absorber layer. Methods are described for forming a Cu—In—Ga layer followed by partial or full selenization. This results in a higher Ga concentration at the back interface. The substrate is then exposed to an aluminum CVD precursor while the substrate is still in the selenization equipment to deposit a thin Al layer. The substrate is then exposed to a Se source to fully convert the absorber layer. This results in a higher Al concentration at the front of the absorber.

Abstract translation: 描述了用于在具有渐变组成和分级带隙的TFPV装置中形成CIGS吸收层的方法。 描述了利用Al增加吸收层前表面带隙的方法。 描述了用于形成Cu-In-Ga层的方法，然后进行部分或全部硒化。 这导致在后界面处的较高的Ga浓度。 然后将衬底暴露于铝CVD前体，同时衬底仍然在硒化设备中以沉积薄的Al层。 然后将衬底暴露于Se源以完全转换吸收层。 这导致吸收器前面的较高的Al浓度。

公开(公告)号：US20140080250A1

公开(公告)日：2014-03-20

申请号：US13727845

申请日：2012-12-27

Applicant: INTERMOLECULAR, INC.

Inventor： Haifan Liang ,  Jessica Eid ,  Jeroen Van Duren

IPC: H01L31/18

CPC classification number: H01L31/18 ,  H01L21/02551 ,  H01L31/0322 ,  H01L31/03923 ,  H01L31/03928 ,  H01L31/065 ,  H01L31/0749 ,  Y02E10/541

Abstract: A method is disclosed for fabricating high efficiency CIGS solar cells including the deposition of a multi-component metal precursor film on a substrate. The substrate is then inserted into a system suitable for exposing the precursor to a chalcogen to form a chalcogenide TFPV absorber. One or more Na precursors are used to deposit a Na-containing layer on the precursor film in the system. This method eliminates the use of dedicated equipment and processes for introducing Na to the TFPV absorber.

Abstract translation: 公开了一种用于制造高效CIGS太阳能电池的方法，包括在基板上沉积多组分金属前体膜。 然后将基底插入适于将前体暴露于硫属元素的系统中以形成硫族化物TFPV吸收剂。 一种或多种Na前体用于在系统中的前体膜上沉积含Na层。 该方法消除了将Na引入TFPV吸收器的专用设备和方法的使用。

公开(公告)号：US09466499B2

公开(公告)日：2016-10-11

申请号：US14142121

申请日：2013-12-27

Applicant: Intermolecular, Inc.

Inventor： Jeroen Van Duren ,  Minh Huu Le ,  Minh Anh Nguyen ,  Sandeep Nijhawan

IPC: B05D5/06 ,  H01L21/30 ,  B08B3/04 ,  G11C13/00 ,  H01L27/24 ,  C23C14/08 ,  C23C14/22 ,  C23C14/34 ,  H01L21/02 ,  H01L21/66 ,  H01L45/00 ,  H01L21/306 ,  H01L21/67 ,  C23C18/16 ,  C25D17/02 ,  B01J19/00

CPC classification number: H01L21/30 ,  B01J19/0046 ,  B01J2219/00283 ,  B01J2219/00286 ,  B01J2219/00301 ,  B01J2219/00313 ,  B01J2219/0038 ,  B01J2219/00382 ,  B01J2219/00416 ,  B01J2219/00418 ,  B01J2219/00527 ,  B01J2219/00585 ,  B08B3/04 ,  C23C14/08 ,  C23C14/22 ,  C23C14/34 ,  C23C18/1619 ,  C23C18/1682 ,  C25D17/02 ,  G11C13/0004 ,  H01L21/02104 ,  H01L21/30604 ,  H01L21/67051 ,  H01L21/67057 ,  H01L21/6719 ,  H01L22/10 ,  H01L22/12 ,  H01L22/14 ,  H01L27/2463 ,  H01L45/1608

Abstract: A substrate having a plurality of site-isolated regions defined thereon is provided. A first electrochromic material, or a first electrochromic device stack, is formed above a first of the plurality of site-isolated regions using a first set of processing conditions. A second electrochromic material, or a second electrochromic device stack, is formed above a second of the plurality of site-isolated regions using a second set of processing conditions. The second set of processing conditions is different than the first set of processing conditions.

Abstract translation: 提供了具有限定在其上的多个位置隔离区域的基板。 使用第一组处理条件在多个位置隔离区域的第一个上方形成第一电致变色材料或第一电致变色器件堆叠。 使用第二组处理条件在多个位置隔离区域的第二个上方形成第二电致变色材料或第二电致变色器件堆叠。 第二组处理条件与第一组处理条件不同。

公开(公告)号：US09299571B2

公开(公告)日：2016-03-29

申请号：US14134678

申请日：2013-12-19

Applicant: Intermolecular, Inc.

Inventor： Haifan Liang ,  Sang Lee ,  Jeroen Van Duren

IPC: H01L21/00 ,  H01L27/12 ,  H01L21/306 ,  H01L21/02 ,  H01L29/66 ,  H01L29/786 ,  H01L21/465 ,  H01L21/70 ,  H01L29/45

CPC classification number: H01L21/30604 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/32134 ,  H01L21/465 ,  H01L21/707 ,  H01L27/1225 ,  H01L27/1262 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/7869

Abstract: A gradient in the composition of at least one of the elements of a metal-based semiconductor layer is introduced as a function of depth through the layer. The gradient(s) influence the current density response of the device at different gate voltages. In some embodiments, the composition of an element (e.g. Ga) is greater at the interface between the metal-based semiconductor layer and the source/drain layers. The shape of the gradient profile is one of linear, stepped, parabolic, exponential, and the like.

Abstract translation: 作为穿过该层的深度的函数，引入金属基半导体层的至少一个元素的组成的梯度。 梯度影响器件在不同栅极电压下的电流密度响应。 在一些实施例中，元件（例如Ga）的组成在金属基半导体层和源极/漏极层之间的界面处较大。 梯度轮廓的形状是直线，阶梯，抛物线，指数等之一。

公开(公告)号：US09112095B2

公开(公告)日：2015-08-18

申请号：US13716009

申请日：2012-12-14

Applicant: Intermolecular, Inc.

Inventor： Teresa B. Sapirman ,  Philip A. Kraus ,  Sang M. Lee ,  Haifan Liang ,  Jeroen Van Duren

IPC: H01L21/00 ,  H01L31/18

CPC classification number: H01L31/18 ,  C23C14/3464 ,  H01L31/0749 ,  H01L31/1876 ,  Y02E10/541 ,  Y02P70/521

Abstract: In some embodiments, Cu—In—Ga precursor films are deposited by co-sputtering from multiple targets. Specifically, the co-sputtering method is used to form layers that include In. The co-sputtering reduces the tendency for the In component to agglomerate and results in smoother, more uniform films. In some embodiments, the Ga concentration in one or more target(s) is between about 25 atomic % and about 66 atomic %. The deposition may be performed in a batch or in-line deposition system. If an in-line deposition system is used, the movement of the substrates through the system may be continuous or may follow a “stop and soak” method of substrate transport.

Abstract translation: 在一些实施方案中，通过多个靶的共溅射沉积Cu-In-Ga前体膜。 具体地，共溅射法用于形成包括In的层。 共溅射减少了In组分聚集的趋势，并导致更平滑，更均匀的膜。 在一些实施方案中，一个或多个靶中的Ga浓度为约25原子％至约66原子％。 沉积可以在批次或在线沉积系统中进行。 如果使用在线沉积系统，则衬底通过系统的移动可以是连续的，或者可以遵循衬底传送的“停止和浸泡”方法。

公开(公告)号：US20150179839A1

公开(公告)日：2015-06-25

申请号：US14138555

申请日：2013-12-23

Applicant: Intermolecular Inc.

Inventor： Jeroen Van Duren ,  Khaled Ahmed ,  Haifan Liang

IPC: H01L31/0224 ,  H01L31/18

CPC classification number: H01L31/0749 ,  H01L31/022425 ,  H01L31/0322 ,  Y02E10/541 ,  Y02P70/521

Abstract: Solar cells and methods for forming a back contact layer for a solar cell are disclosed. The methods comprise depositing a first layer comprising a conductor on a substrate, depositing a second layer on the first layer, the second layer comprising between about 1 nm and about 25 nm of a metal chalcogenide, and forming a third layer operable as an absorber layer on the second layer. The absorber layer can comprise a photoactive semiconductor layer. In some embodiments, the absorber layer comprises a chalcogenide of copper-indium-gallium. In some embodiments, the absorber layer comprises a chalcogenide of copper-zinc-tin. In some embodiments, the absorber layer comprises CdTe. In some embodiments, the metal comprises Mo, W or Ta. In some embodiments, the metal comprises Mo. In some embodiments, the chalcogenide comprises S or Se or a combination thereof.

Abstract translation: 公开了用于形成太阳能电池的背接触层的太阳能电池和方法。 所述方法包括在衬底上沉积包含导体的第一层，在第一层上沉积第二层，第二层包含约1nm至约25nm的金属硫族化物，以及形成可操作为吸收层的第三层 在第二层。 吸收层可以包括光敏半导体层。 在一些实施例中，吸收层包括铜铟镓的硫族化物。 在一些实施方案中，吸收层包含铜 - 锌 - 锡的硫族化物。 在一些实施例中，吸收层包括CdTe。 在一些实施方案中，金属包括Mo，W或Ta。 在一些实施方案中，金属包含Mo。在一些实施方案中，硫族化物包含S或Se或其组合。