SEMICONDUCTOR STRUCTURES WITH DEEP TRENCH CAPACITOR AND METHODS OF MANUFACTURE
    32.
    发明申请
    SEMICONDUCTOR STRUCTURES WITH DEEP TRENCH CAPACITOR AND METHODS OF MANUFACTURE 审中-公开
    具有深度电容电容器的半导体结构及其制造方法

    公开(公告)号:US20150135156A1

    公开(公告)日:2015-05-14

    申请号:US14601288

    申请日:2015-01-21

    IPC分类号: G06F17/50

    摘要: An integrated FinFET and deep trench capacitor structure and methods of manufacture are disclosed. The method includes forming at least one deep trench capacitor in a silicon on insulator (SOI) substrate. The method further includes simultaneously forming polysilicon fins from material of the at least one deep trench capacitor and SOI fins from the SOI substrate. The method further includes forming an insulator layer on the polysilicon fins. The method further includes forming gate structures over the SOI fins and the insulator layer on the polysilicon fins.

    摘要翻译: 公开了一种集成的FinFET和深沟槽电容器结构及其制造方法。 该方法包括在绝缘体上硅(SOI)衬底上形成至少一个深沟槽电容器。 该方法还包括从SOI衬底同时从至少一个深沟槽电容器的材料和SOI散热片形成多晶硅鳍片。 该方法还包括在多晶硅鳍片上形成绝缘体层。 该方法还包括在多晶硅鳍片上的SOI散热片和绝缘体层上形成栅极结构。

    PROCESS VARIABILITY TOLERANT HARD MASK FOR REPLACEMENT METAL GATE FINFET DEVICES
    33.
    发明申请
    PROCESS VARIABILITY TOLERANT HARD MASK FOR REPLACEMENT METAL GATE FINFET DEVICES 有权
    过程变异耐用硬掩模用于更换金属栅极FINFET器件

    公开(公告)号:US20150064897A1

    公开(公告)日:2015-03-05

    申请号:US14017918

    申请日:2013-09-04

    IPC分类号: H01L21/28 H01L29/66

    摘要: Embodiments include a method comprising depositing a hard mask layer over a first layer, the hard mask layer including; lower hard mask layer, hard mask stop layer, and upper hard mask. The hard mask layer and the first layer are patterned and a spacer deposited on the patterned sidewall. The upper hard mask layer and top portion of the spacer are removed by selective etching with respect to the hard mask stop layer, the remaining spacer material extending to a first predetermined position on the sidewall. The hard mask stop layer is removed by selective etching with respect to the lower hard mask layer and spacer. The first hard mask layer and top portion of the spacer are removed by selectively etching the lower hard mask layer and the spacer with respect to the first layer, the remaining spacer material extending to a second predetermined position on the sidewall.

    摘要翻译: 实施例包括一种方法,包括在第一层上沉积硬掩模层,硬掩模层包括: 下硬掩模层,硬掩模停止层和上硬掩模。 图案化硬掩模层和第一层,并且沉积在图案化侧壁上的间隔物。 通过相对于硬掩模阻挡层的选择性蚀刻去除上部硬掩模层和间隔物的顶部,剩余的间隔物材料延伸到侧壁上的第一预定位置。 通过相对于下部硬掩模层和间隔物的选择性蚀刻除去硬掩模阻挡层。 通过相对于第一层选择性地蚀刻下部硬掩模层和间隔物来去除间隔物的第一硬掩模层和顶部,剩余的间隔物材料延伸到侧壁上的第二预定位置。