公开(公告)号：US07259406B2

公开(公告)日：2007-08-21

申请号：US11263997

申请日：2005-11-02

申请人： Yoshihiko Hanamaki ,  Kenichi Ono ,  Kimio Shigihara ,  Kazushige Kawasaki ,  Kimitaka Shibata ,  Naoyuki Shimada

发明人： Yoshihiko Hanamaki ,  Kenichi Ono ,  Kimio Shigihara ,  Kazushige Kawasaki ,  Kimitaka Shibata ,  Naoyuki Shimada

IPC分类号： H01L29/24 ,  H01L33/00 ,  H01L29/06 ,  H01L29/12 ,  H01L31/0328

CPC分类号： H01S5/22 ,  H01S5/323

摘要： A semiconductor optical element having a includes an n-type GaAs buffer layer, an n-type AlGaInP cladding layer, a first InGaAsP (including zero As content)guide layer without added dopant impurities, an InGaAsP (including zero In content) active layer, a second InGaAsP (including zero As content)guide layer without added dopant impurities, a p-type AlGaInP cladding layer, a p-type band discontinuity reduction layer, and a p-type GaAs contact layer sequentially laminated on an n-type GaAs substrate C or Mg is the dopant impurity in the p-type GaAs contact layer, the p-type band discontinuity reduction layer, and the p-type AlGaInP cladding layer.

摘要翻译： 具有包括n型GaAs缓冲层，n型AlGaInP包层，没有添加掺杂杂质的第一InGaAsP（包括零As含量）引导层的半导体光学元件，InGaAsP（包括0 In含量）有源层， 没有添加掺杂剂杂质的第二InGaAsP（包括零As含量）引导层，顺序地层叠在n型GaAs衬底上的p型AlGaInP包层，p型带不连续性还原层和p型GaAs接触层 C或Mg是p型GaAs接触层中的掺杂剂杂质，p型带不连续性还原层和p型AlGaInP包层。

公开(公告)号：US07751456B2

公开(公告)日：2010-07-06

申请号：US11930395

申请日：2007-10-31

申请人： Kazushige Kawasaki ,  Toshiaki Kitano ,  Takafumi Oka

发明人： Kazushige Kawasaki ,  Toshiaki Kitano ,  Takafumi Oka

IPC分类号： H01S5/00

CPC分类号： H01S5/22 ,  B82Y20/00 ,  H01S5/0425 ,  H01S5/2009 ,  H01S5/2086 ,  H01S5/2214 ,  H01S5/3211 ,  H01S5/34333

摘要： A method for manufacturing an laser diode includes: providing a wafer having thereon a semiconductor structure; depositing an SiO2 film; forming channels and a waveguide ridge between the channels in the wafer; forming an SiO2 film over the wafer; forming a resist pattern covering the SiO2 film in the channels such that the top surfaces of the resist pattern are lower than the top surface of the deposited SiO2 film on the top of the waveguide ridge, the resist pattern exposing the SiO2 film on the top of the waveguide ridge; removing the SiO2 film and the deposited SiO2 film by wet etching, using the resist pattern as a mask, to expose a p-GaN layer in the waveguide ridge; and forming an electrode layer on the top surface of the p-GaN layer.

摘要翻译： 制造激光二极管的方法包括：提供其上具有半导体结构的晶片; 沉积SiO 2膜; 在晶片中的通道之间形成通道和波导脊; 在晶片上形成SiO 2膜; 形成覆盖通道中的SiO 2膜的抗蚀剂图案，使得抗蚀剂图案的顶表面比波导脊顶部的沉积的SiO 2膜的顶表面低，将抗蚀剂图案暴露在波导顶部的SiO 2膜上 波导脊; 通过使用抗蚀剂图案作为掩模，通过湿蚀刻去除SiO 2膜和沉积的SiO 2膜，以暴露波导脊中的p-GaN层; 以及在p-GaN层的顶表面上形成电极层。

公开(公告)号：US20100096744A1

公开(公告)日：2010-04-22

申请号：US12573395

申请日：2009-10-05

申请人： Hiroyuki Mori ,  Kazushige Kawasaki

发明人： Hiroyuki Mori ,  Kazushige Kawasaki

IPC分类号： H01L23/48 ,  H05K1/11 ,  H01K3/10 ,  H01L21/60

CPC分类号： H05K3/4007 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/16 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19106 ,  H01L2924/3025 ,  H05K1/113 ,  H05K3/205 ,  H05K3/421 ,  H05K3/4682 ,  H05K2201/09845 ,  H05K2201/09854 ,  H05K2203/0574 ,  Y10T29/49124 ,  Y10T29/49162 ,  H01L2924/00012 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05666 ,  H01L2224/05671

摘要： Embodiments of the present invention provide a printed wiring board in which solder bumps of a mounted semiconductor chip are less prone to be ruptured. The printed wiring board includes a coreless substrate which includes: a dielectric layer having a main surface and a connecting pad embedded in the dielectric layer. The connecting pad is shaped like a brimmed hat. That is, the connecting pad includes a plate portion whose diameter φ1 is about 95 μm and a contact portion whose diameter φc is about 75 μm. The main surface of the contact portion is exposed at the main surface of the dielectric layer. Since diameter φc of the contact portion is substantially the same as diameter φ2 of an under bump metal at the semiconductor chip side, even if mechanical stress is applied in a direction in which the semiconductor chip is peeled off from the coreless substrate, the stress disperses evenly to both of the connecting pad and the under bump metal, and thus rupture is less prone to occur.

摘要翻译： 本发明的实施例提供了一种印刷线路板，其中安装的半导体芯片的焊料凸块不容易破裂。 印刷电路板包括无芯基板，其包括：具有主表面的电介质层和嵌入在电介质层中的连接焊盘。 连接垫的形状像一顶帽子。 也就是说，连接焊盘包括直径为约95μm的板部分和直径为约75μm的接触部分。 接触部分的主表面在电介质层的主表面露出。 由于接触部的直径＆phcc与半导体芯片侧的凸块下部的直径＆lt; 2＆gt; 2相同，所以即使在半导体芯片从无芯基板剥离的方向上施加机械应力 ，应力均匀地分散到连接焊盘和下凸块金属两者上，因此不容易发生破裂。

公开(公告)号：US20080073796A1

公开(公告)日：2008-03-27

申请号：US11535700

申请日：2006-09-27

申请人： Paul M. Harvey ,  Kazushige Kawasaki ,  Gen Yamada

发明人： Paul M. Harvey ,  Kazushige Kawasaki ,  Gen Yamada

IPC分类号： H01L23/48

CPC分类号： H05K1/116 ,  H01L23/49827 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0219 ,  H05K3/4602 ,  H05K2201/0792 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2201/09718 ,  H05K2201/09781 ,  H05K2201/09809 ,  H01L2924/00

摘要： An electrically optimized and structurally protected micro via structure for high speed signals in multilayer interconnection substrates is provided. The via structure eliminates the overlap of a contact with the reference planes to thereby reduce the via capacitance and thus, the via impedance mismatch in the via structure. As a result, the via structure is electrically optimized. The via structure further comprises one or more floating support members placed in close proximity to the via within a via clearance area between the via and the reference planes. The floating support members are “floating” in the sense that they are not in electrical contact with either the via or the reference planes. Thus, they are not provided for purposes of signal propagation but only for structural support. The floating support members may be connected to one another by way of one or more microvia structures.

摘要翻译： 提供了用于多层互连基板中的高速信号的电学优化和结构保护的微通孔结构。 通孔结构消除了与参考平面的接触的重叠，从而减小了通孔电容，从而减小了通孔结构中的通路阻抗失配。 结果，通孔结构被电学优化。 通孔结构还包括一个或多个浮动支撑构件，该浮动支撑构件在通孔和参考平面之间的通孔间隙区域内靠近通孔放置。 浮动支撑构件在它们不与通孔或参考平面电接触的意义上是“浮动的”。 因此，它们不是用于信号传播的目的，而是仅用于结构支持。 浮动支撑构件可以通过一个或多个微孔结构彼此连接。

公开(公告)号：US20060220037A1

公开(公告)日：2006-10-05

申请号：US11263997

申请日：2005-11-02

申请人： Yoshihiko Hanamaki ,  Kenichi Ono ,  Kimio Shigihara ,  Kazushige Kawasaki ,  Kimitaka Shibata ,  Naoyuki Shimada

发明人： Yoshihiko Hanamaki ,  Kenichi Ono ,  Kimio Shigihara ,  Kazushige Kawasaki ,  Kimitaka Shibata ,  Naoyuki Shimada

IPC分类号： H01L31/12

CPC分类号： H01S5/22 ,  H01S5/323

摘要： A semiconductor optical element having a includes an n-type GaAs buffer layer, an n-type AlGaInP cladding layer, a first InGaAsP (including zero As content) guide layer without added dopant impurities, an InGaAsP (including zero In content) active layer, a second InGaAsP (including zero As content) guide layer without added dopant impurities, a p-type AlGaInP cladding layer, a p-type band discontinuity reduction layer, and a p-type GaAs contact layer sequentially laminated on an n-type GaAs substrate C or Mg is the dopant impurity in the p-type-GaAs contact layer, the p-type band discontinuity reduction layer, and the p-type AlGaInP cladding layer.

摘要翻译： 具有包括n型GaAs缓冲层，n型AlGaInP包层，没有添加掺杂杂质的第一InGaAsP（包括零As含量）引导层的半导体光学元件，InGaAsP（包括0 In含量）有源层， 没有添加掺杂剂杂质的第二InGaAsP（包括零As含量）引导层，顺序地层叠在n型GaAs衬底上的p型AlGaInP包层，p型带不连续性还原层和p型GaAs接触层 C或Mg是p型GaAs接触层中的掺杂剂杂质，p型带不连续性还原层和p型AlGaInP包层。

公开(公告)号：US06970633B2

公开(公告)日：2005-11-29

申请号：US10668185

申请日：2003-09-24

申请人： Kimio Shigihara ,  Kazushige Kawasaki

发明人： Kimio Shigihara ,  Kazushige Kawasaki

IPC分类号： H01S3/08 ,  G02B5/08 ,  G02B6/42 ,  H01S5/028 ,  H01S5/183 ,  G02B6/10 ,  H01L29/04 ,  H01L29/205 ,  H01S5/00 ,  B22B7/02

CPC分类号： H01S5/0287 ,  G02B5/0816 ,  G02B6/4207 ,  Y10T428/2495

摘要： A semiconductor optical device includes a waveguide layer and a reflecting multi-layer film. The waveguide layer includes two cladding layers and an active layer sandwiched between the two cladding layers. The reflecting multi-layer film including multiple layers is on at least one of a pair of opposing end faces of the waveguide layer. A summation Σnidi of products nidi of refractive indexes ni and thicknesses di of the layers denoted i in the reflecting multi-layer film, and a wavelength λ0 of light guided through the waveguide layer satisfies a relationship, Σnidi>λ0/4. A first wavelength bandwidth Δλ is wider than a second wavelength bandwidth ΔΛ. Δλ is a wavelength range including the wavelength λ0 in which a reflectance R of the reflecting multi-layer film is not higher than +2.0% from reflectance R at the wavelength λ0. ΔΛ is a wavelength range including the wavelength λ0 in which a reflectance R′ of a hypothetical layer is not higher than +2.0% from a hypothetical reflectance R′ at the wavelength λ0 of a hypothetical layer having a thickness of 5λ0/(4nf), a refractive index nf, on the at least one of opposing end faces, and satisfying a relationship, R′=((nc−nf2)/(nc+nf2))2, where nc denotes an effective refractive index of the waveguide layer.

摘要翻译： 半导体光学器件包括波导层和反射多层膜。 波导层包括两个包覆层和夹在两个覆层之间的有源层。 包括多层的反射多层膜在波导层的一对相对的端面中的至少一个上。 折射率n i i i i i i i的乘积的总和i i / 并且在反射多层膜中表示为i的层的厚度d 1和厚度d 1，并且通过波导层引导的光的波长λ0 <0>满足关系，Sigman 4/1/2。 第一波长带宽Deltalambda比第二波长带宽DeltaLambda宽。 Deltalλ是包括波长λ<0>的波长范围，其中反射多层膜的反射率R不比波长λ<0的反射率R + + 2.0％ >。 DeltaLambda是包括波长λ<0> 0的波长范围，其中假设层的反射率R'与波长λ0的假想反射率R'不高于+ 2.0％ 具有厚度为5μm/（4n×f））的假想层的折射率n _{在该至少一个 的相对端面，并且满足关系，R'=（（n> c n） 其中，n C表示有效折射率，其中n≥2 波导层。}

公开(公告)号：US20120132463A1

公开(公告)日：2012-05-31

申请号：US13365616

申请日：2012-02-03

申请人： Hiroyuki Mori ,  Kazushige Kawasaki

发明人： Hiroyuki Mori ,  Kazushige Kawasaki

IPC分类号： H05K1/18 ,  H01L21/50 ,  H05K1/11 ,  H01L23/498

CPC分类号： H05K3/4007 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/16 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19106 ,  H01L2924/3025 ,  H05K1/113 ,  H05K3/205 ,  H05K3/421 ,  H05K3/4682 ,  H05K2201/09845 ,  H05K2201/09854 ,  H05K2203/0574 ,  Y10T29/49124 ,  Y10T29/49162 ,  H01L2924/00012 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05666 ,  H01L2224/05671

摘要： Embodiments of the present invention provide a printed wiring board in which solder bumps of a mounted semiconductor chip are less prone to be ruptured. The printed wiring board includes a dielectric layer having a main surface and a connecting pad embedded in the dielectric layer. The connecting pad is shaped like a brimmed hat. That is, the connecting pad includes a plate portion whose diameter is larger than that of a contact portion. The main surface of the contact portion is exposed at the main surface of the dielectric layer. Diameter of the contact portion is substantially the same as diameter of an under bump metal at the semiconductor chip side, when mechanical stress is applied, the stress disperses evenly to both of the connecting pad and the under bump metal, and thus rupture is less prone to occur.

摘要翻译： 本发明的实施例提供了一种印刷线路板，其中安装的半导体芯片的焊料凸块不容易破裂。 印刷电路板包括具有主表面的电介质层和嵌入电介质层中的连接焊盘。 连接垫的形状像一顶帽子。 也就是说，连接焊盘包括其直径大于接触部分的直径的板部分。 接触部分的主表面在电介质层的主表面露出。 接触部的直径与半导体芯片侧的凸块状金属的直径基本相同，当施加机械应力时，应力均匀地分散到连接焊盘和下凸块金属两者上，因此破裂不容易 发生。

公开(公告)号：US20110177679A1

公开(公告)日：2011-07-21

申请号：US12889474

申请日：2010-09-24

申请人： Akihito Ohno ,  Kazushige Kawasaki

发明人： Akihito Ohno ,  Kazushige Kawasaki

IPC分类号： H01L21/20

CPC分类号： H01L21/02639 ,  H01L21/02389 ,  H01L21/0254

摘要： A method for manufacturing a semiconductor device includes preparing a substrate having a low-dislocation region and a high-dislocation region having a higher dislocation density than dislocation density of the low-dislocation region; forming an insulating film on the low-dislocation region surrounding the high-dislocation region but not covering the high-dislocation region; and forming a nitride-based semiconductor layer on the substrate, after forming the insulating film.

摘要翻译： 一种制造半导体器件的方法包括制备具有低位错区域和位错密度高于低位错区域位错密度的高位错区域的衬底; 在高错位区域周围的低位错区域上形成绝缘膜，但不覆盖高位错区域; 在形成绝缘膜之后，在基板上形成氮化物系半导体层。

公开(公告)号：US07577173B2

公开(公告)日：2009-08-18

申请号：US11938845

申请日：2007-11-13

申请人： Kazushige Kawasaki ,  Yasuyuki Nakagawa ,  Hiromasu Matsuoka

发明人： Kazushige Kawasaki ,  Yasuyuki Nakagawa ,  Hiromasu Matsuoka

IPC分类号： H01S5/00

CPC分类号： H01S5/028 ,  H01S5/0287 ,  H01S5/32341

摘要： A semiconductor laser device comprises a GaN substrate having a refractive index of 3.5 or below, a semiconductor layer laminated on the substrate, and a pair of facets forming a resonator and in face-to-face-relation to each other in a direction perpendicular to the direction of the laminated layer. One of the facets of the resonator includes a low reflection film, of a first dielectric film, a second dielectric film, a third dielectric film, and a fourth dielectric film. When the refractive indexes of these films are taken as n1, n2, n3, and n4, n1=n3 and n2=n4. The following relationship between the first dielectric film and the third dielectric film, and between the second dielectric film and the fourth dielectric film is established, nd+n′d′=pλ/4, where p is an integer, and λ is oscillation wavelength of a laser beam generated by the semiconductor laser device.

摘要翻译： 半导体激光装置包括折射率为3.5以下的GaN衬底，层叠在衬底上的半导体层和形成谐振器的一对面，并且在垂直于该衬底的方向上彼此面对面 层压层的方向。 谐振器的一个面包括第一电介质膜，第二电介质膜，第三电介质膜和第四电介质膜的低反射膜。 当这些膜的折射率取为n1，n2，n3和n4时，n1 = n3，n2 = n4。 建立第一电介质膜和第三电介质膜之间以及第二电介质膜和第四介电膜之间的以下关系，nd + n'd'=λ/ 4，其中p是整数，λ是振荡波长 由半导体激光装置产生的激光束。

公开(公告)号：US07289546B1

公开(公告)日：2007-10-30

申请号：US11550841

申请日：2006-10-19

申请人： Kimio Shigihara ,  Yoshihiko Hanamaki ,  Kimitaka Shibata ,  Kazushige Kawasaki

发明人： Kimio Shigihara ,  Yoshihiko Hanamaki ,  Kimitaka Shibata ,  Kazushige Kawasaki

IPC分类号： H01S5/00

CPC分类号： H01S5/20 ,  B82Y20/00 ,  H01S5/2004 ,  H01S5/2036 ,  H01S5/2059 ,  H01S5/3211 ,  H01S5/34313 ,  H01S5/34373

摘要： An n-type first cladding layer, a first guide layer, a first enhancing layer, an active layer, a second enhancing layer, a second guide layer, and a p-type second cladding layer are sequentially stacked on an n-type GaAs substrate. The thickness of each of the first guide layer and the second guide layer is 100 nm or more. In such a semiconductor laser, the difference between the Eg (band gap energy) of the first guide layer and the Eg of the active layer (or the difference between the Eg of the second guide layer and the Eg of the active layer) is made 0.66 times or less of the difference between the Eg of the first cladding layer and the Eg of the active layer (or the difference between the Eg of the second cladding layer and the Eg of the active layer).

摘要翻译： 在n型GaAs衬底上顺序层叠n型第一包层，第一引导层，第一增强层，有源层，第二增强层，第二引导层和p型第二包覆层 。 第一引导层和第二引导层的厚度为100nm以上。 在这种半导体激光器中，使第一引导层的Eg（带隙能量）与有源层的Eg（或第二导向层的Eg与有源层的Eg之间的差）之间的差异 第一包层的Eg与有源层的Eg（或第二包层的Eg与活性层的Eg之间的差）的差为0.66倍以下。