公开(公告)号：US20020187600A1

公开(公告)日：2002-12-12

申请号：US10207210

申请日：2002-07-30

Applicant: MOTOROLA, INC.

Inventor： Zhiyi Yu ,  Ravindranath Droopad

IPC: H01L021/8238

CPC classification number: H01L21/28194 ,  H01L29/513 ,  H01L29/517

Abstract: A semiconductor structure exhibiting reduced leakage current is formed of a monocrystalline substrate (101) and a strained-layer heterostructure (105). The strained-layer heterostructure has a first layer (102) formed of a first monocrystalline oxide material having a first lattice constant and a second layer (104) formed of a second monocrystalline oxide material overlying the first layer and having a second lattice constant. The second lattice constant is different from the first lattice constant. The second layer creates strain within the oxide material layers, at the interface between the first and second oxide material layers of the heterostructure, and at the interface of the substrate and the first layer, which changes the energy band offset at the interface of the substrate and the first layer.

Abstract translation: 显示出减小的漏电流的半导体结构由单晶衬底（101）和应变层异质结构（105）形成。 应变层异质结构具有由具有第一晶格常数的第一单晶氧化物材料形成的第一层（102）和由第二单晶氧化物材料形成并具有第二晶格常数的第二单晶氧化物材料形成的第二层（104）。 第二晶格常数与第一晶格常数不同。 第二层在异质结构的第一和第二氧化物层之间的界面处以及衬底和第一层的界面处在氧化物材料层内产生应变，这改变了衬底界面处的能带偏移 和第一层。

公开(公告)号：US20020009612A1

公开(公告)日：2002-01-24

申请号：US09912994

申请日：2001-07-25

Applicant: Motorola, Inc.

Inventor： Ramamoorthy Ramesh ,  Yu Wang ,  Jeffrey M. Finder ,  Zhiyi Yu ,  Ravindranath Droopad ,  Kurt Eisenbeiser

IPC: B32B003/00 ,  B32B007/00 ,  B32B015/00 ,  B32B009/00 ,  B32B019/00

CPC classification number: H01L21/02197 ,  B32B9/00 ,  H01L21/02293 ,  H01L21/31691 ,  H01L28/56 ,  H01L41/0478 ,  H01L41/1875 ,  H01L41/1876 ,  H01L41/29 ,  H01L41/319 ,  Y10T428/24917

Abstract: A high quality epitaxial layer of monocrystalline Pb(Mg,Nb)O3nullPbTiO3 or Pb(Mg1-x-Nbx)O3nullPbTiO3 can be grown overlying large silicon wafers by first growing an strontium titanate layer on a silicon wafer. The strontium titanate layer is a monocrystalline layer spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide.

Abstract translation: 首先在硅晶片上生长钛酸锶层，可以将大量的单晶Pb（Mg，Nb）O3-PbTiO3或Pb（Mg1-x-Nbx）O3-PbTiO3）的外延层生长在大的硅晶片上。 钛酸锶层是通过硅氧化物的非晶界面层与硅晶片隔开的单晶层。

公开(公告)号：US20010013313A1

公开(公告)日：2001-08-16

申请号：US09780119

申请日：2001-02-09

Applicant: Motorola, Inc.

Inventor： Ravindranath Droopad ,  Zhiyi Yu ,  William J. Ooms ,  Jamal Ramdani

IPC: C30B035/00 ,  H01L029/04 ,  H01L031/036

CPC classification number: C30B25/18 ,  C23C14/024 ,  C23C14/568 ,  C30B23/02 ,  H01L21/02373 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02521 ,  H01L21/31691 ,  H01L21/8252 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/15 ,  H01L33/16 ,  H01L33/30 ,  Y10T117/10

Abstract: An apparatus (100) and method (800) for forming high quality epitaxial layers of monocrystalline materials grown overlying monocrystalline substrates (310) such as large silicon wafers is provided. The apparatus (100) includes at least two deposition chambers (110) and (140) that are coupled together. The first chamber (110) is used to form an accommodating buffer layer (320) on the substrate (310) and the second (140) is used to form a layer of monocrystalline material (330) overlying the accommodating buffer layer (320).

Abstract translation: 提供一种用于形成生长在单晶衬底（310）如大硅晶片上的单晶材料的高质量外延层的装置（100）和方法（800）。 装置（100）包括耦合在一起的至少两个沉积室（110）和（140）。 第一腔室（110）用于在衬底（310）上形成容纳缓冲层（320），并且第二腔室（140）用于形成覆盖容纳缓冲层（320）的单晶材料层（330）。

公开(公告)号：US20040150003A1

公开(公告)日：2004-08-05

申请号：US10767996

申请日：2004-02-02

Applicant: MOTOROLA, INC.

Inventor： Jamal Ramdani ,  Ravindranath Droopad ,  Lyndee L. Hilt ,  Kurt William Einsebeiser

IPC: H01L031/0328 ,  H01L031/0336 ,  H01L031/072 ,  H01L031/109

CPC classification number: H01S5/0261 ,  C30B25/18 ,  H01L21/02197 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02439 ,  H01L21/02472 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/31691 ,  H01L21/8252 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/15 ,  H01L33/16 ,  H01L33/30 ,  H01L2924/0002 ,  H01S5/021 ,  H01L2924/00

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

公开(公告)号：US20040149202A1

公开(公告)日：2004-08-05

申请号：US10767994

申请日：2004-02-02

Applicant: MOTOROLA, INC.

Inventor： Jamal Ramdani ,  Ravindranath Droopad ,  Lyndee L. Hilt ,  Kurt William Eisenbeiser

IPC: C30B023/00 ,  C30B025/00 ,  C30B028/12 ,  C30B028/14

CPC classification number: H01S5/0261 ,  C30B25/18 ,  H01L21/02197 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02439 ,  H01L21/02472 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02557 ,  H01L21/0256 ,  H01L21/31691 ,  H01L21/8252 ,  H01L21/8258 ,  H01L27/0605 ,  H01L27/15 ,  H01L33/16 ,  H01L33/30 ,  H01L2924/0002 ,  H01S5/021 ,  H01L2924/00

Abstract: High quality epitaxial layers of compound semiconductor materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline compound semiconductor layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

公开(公告)号：US20030082833A1

公开(公告)日：2003-05-01

申请号：US09983869

申请日：2001-10-26

Applicant: MOTOROLA, INC.

Inventor： Zhiyi Yu ,  Ravindranath Droopad ,  Albert Alec Talin

IPC: H01L021/00

CPC classification number: C30B25/18 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. A template layer, incorporating a wetting layer caps the accommodating buffer layer and initiates monocrystalline growth of the overlying layer. The wetting layer promotes two dimensional, layer by layer growth of the monocrystalline layer.

Abstract translation: 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 掺入润湿层的模板层覆盖容纳缓冲层并引发上层的单晶生长。 润湿层促进单晶层的二维逐层生长。

公开(公告)号：US20030017661A1

公开(公告)日：2003-01-23

申请号：US09910018

申请日：2001-07-23

Applicant: MOTOROLA, INC.

Inventor： Ravindranath Droopad ,  Albert A. Talin ,  Barbara F. Barenburg ,  Lyndee L. Hilt

IPC: H01L021/337

CPC classification number: H01L21/268 ,  C30B25/18 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02521

Abstract: Semiconductor structures are provided with high quality epitaxial layers of monocrystalline materials grown over monocrystalline substrates such as large silicon wafers utilizing a compliant substrate. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer on a silicon wafer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and an overlying monocrystalline material layer. With laser assisted fabrication, a laser energy source is used to preclean the accommodating buffer layer, to excite the accommodating buffer layer to higher energy to promote two-dimensional growth, and to amorphize the accommodating buffer layer, without requiring transport of the semiconductor structure from one environment to another. When chemical vapor deposition is utilized, the laser radiation source can also be employed to crack volatile chemical precursors and to enable selective deposition.

Abstract translation: 半导体结构设置有在单晶衬底上生长的单晶材料的高质量外延层，例如使用顺应衬底的大硅晶片。 实现顺应性衬底的形成的一种方式包括首先在硅晶片上生长容纳缓冲层。 容纳缓冲层与下面的硅晶片和上覆单晶材料层晶格匹配。 通过激光辅助制造，使用激光能量源来清除容纳缓冲层，将容纳缓冲层激发到更高的能量以促进二维生长，并使收容缓冲层非晶化，而不需要将半导体结构从 一个环境到另一个环境。 当使用化学气相沉积时，也可以使用激光辐射源来破坏挥发性化学前体并实现选择性沉积。

公开(公告)号：US20030015702A1

公开(公告)日：2003-01-23

申请号：US09908707

申请日：2001-07-20

Applicant: MOTOROLA, INC.

Inventor： Kurt W. Eisenbeiser ,  Zhiyi Yu ,  Ravindranath Droopad

IPC: H01L021/00 ,  H01L021/30

CPC classification number: H01L21/7624 ,  C30B25/18 ,  H01L21/02381 ,  H01L21/02439 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02532

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. A monocrystalline layer is then formed over the accommodating buffer layer, such that a lattice constant of the monocrystalline layer substantially matches the lattice constant of a subsequently grown monocrystalline film.

Abstract translation: 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 容纳缓冲层包括通过硅氧化物的非晶界面层与硅晶片间隔开的单晶氧化物层。 非晶界面层消耗应变并允许高质量单晶氧化物容纳缓冲层的生长。 容纳缓冲层与下面的硅晶片和上覆的单晶材料层晶格匹配。 然后在容纳缓冲层上形成单晶层，使得单晶层的晶格常数与随后生长的单晶膜的晶格常数基本一致。

公开(公告)号：US20020179936A1

公开(公告)日：2002-12-05

申请号：US09870828

申请日：2001-06-01

Applicant: MOTOROLA, INC.

Inventor： Ravindranath Droopad

IPC: H01L031/0328 ,  H01L031/0336 ,  H01L031/072 ,  H01L031/109

CPC classification number: H01L21/02488 ,  C30B25/18 ,  G02B6/12004 ,  G02B6/131 ,  G02B6/132 ,  G02B6/42 ,  G02B2006/12035 ,  G02B2006/12038 ,  G02B2006/12061 ,  G02B2006/12078 ,  G02B2006/12169 ,  H01L21/0237 ,  H01L21/02463 ,  H01L21/02477 ,  H01L21/02485 ,  H01L21/02505 ,  H01L21/0256 ,  H01L21/02568 ,  H01L31/02966 ,  H01L31/105 ,  H01L31/1836 ,  Y02E10/50

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. The compliant substrate is utilized in fabrication methods and devices for growing quaternary chalcogenides on silicon

Abstract translation: 通过形成用于生长单晶层的柔性衬底，可以将单晶材料的高质量外延层生长在覆盖单晶衬底（例如大硅晶片）上。 柔性衬底用于在硅上生长季硫族化物的制造方法和装置

公开(公告)号：US20020146895A1

公开(公告)日：2002-10-10

申请号：US10166196

申请日：2002-06-11

Applicant: MOTOROLA, INC.

Inventor： Jamal Ramdani ,  Ravindranath Droopad ,  Zhiyi Yu

IPC: H01L021/20

CPC classification number: C30B25/02 ,  C30B29/16 ,  C30B29/32

Abstract: A method of fabricating a semiconductor structure including the steps of providing a silicon substrate (10) having a surface (12), forming on the surface (12) of the silicon substrate (10), by atomic layer deposition (ALD), a seed layer (20;21null) comprising a silicate material and forming, by atomic layer deposition (ALD) one or more layers of a high dielectric constant oxide (42) on the seed layer (20;21null).

Abstract translation: 一种制造半导体结构的方法，包括以下步骤：提供具有表面（12）的硅衬底（10），通过原子层沉积（ALD）在硅衬底（10）的表面（12）上形成，种子 层（20; 21'），其包括硅酸盐材料，并且通过原子层沉积（ALD）在种子层（20; 21'）上形成一层或多层高介电常数氧化物（42）。